c6dofimu4  2.0.0.0
c6dofimu4.h
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1 /*
2  * MikroSDK - MikroE Software Development Kit
3  * Copyright (c) 2019, MikroElektronika - www.mikroe.com
4  * All rights reserved.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22  * SOFTWARE.
23  */
24 
33 // ----------------------------------------------------------------------------
34 
35 #ifndef C6DOFIMU4_H
36 #define C6DOFIMU4_H
37 
38 #include "drv_digital_out.h"
39 #include "drv_digital_in.h"
40 #include "drv_i2c_master.h"
41 #include "drv_spi_master.h"
42 
43 // -------------------------------------------------------------- PUBLIC MACROS
53 #define C6DOFIMU4_MAP_MIKROBUS( cfg, mikrobus ) \
54  cfg.scl = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
55  cfg.sda = MIKROBUS( mikrobus, MIKROBUS_SDA ); \
56  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
57  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
58  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
59  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
60  cfg.syn = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
61  cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
62 
68 #define C6DOFIMU4_MASTER_I2C 0
69 #define C6DOFIMU4_MASTER_SPI 1
70 
76 #define C6DOFIMU4_RETVAL uint8_t
77 
78 #define C6DOFIMU4_OK 0x00
79 #define C6DOFIMU4_INIT_ERROR 0xFF
80 
86 #define C6DOFIMU4_DEVICE_ADDR 0x68
87 
93 #define C6DOFIMU4_XG_OFFS_TC_REG 0x04
94 #define C6DOFIMU4_YG_OFFS_TC_REG 0x07
95 #define C6DOFIMU4_ZG_OFFS_TC_REG 0x0A
96 #define C6DOFIMU4_SELF_TEST_X_REG 0x0D
97 #define C6DOFIMU4_SELF_TEST_Y_REG 0x0E
98 #define C6DOFIMU4_SELF_TEST_Z_REG 0x0F
99 #define C6DOFIMU4_XG_OFFS_USR_REG 0x13
100 #define C6DOFIMU4_YG_OFFS_USR_REG 0x15
101 #define C6DOFIMU4_ZG_OFFS_USR_REG 0x17
102 #define C6DOFIMU4_SMPLRT_DIV_REG 0x19
103 #define C6DOFIMU4_CONFIG_REG 0x1A
104 #define C6DOFIMU4_GYRO_CONFIG_REG 0x1B
105 #define C6DOFIMU4_ACCEL_CONFIG_REG 0x1C
106 #define C6DOFIMU4_ACCEL_CONFIG2_REG 0x1D
107 #define C6DOFIMU4_LP_MODE_CFG_REG 0x1E
108 #define C6DOFIMU4_ACCEL_WOM_X_THR_REG 0x20
109 #define C6DOFIMU4_ACCEL_WOM_Y_THR_REG 0x21
110 #define C6DOFIMU4_ACCEL_WOM_Z_THR_REG 0x22
111 #define C6DOFIMU4_FIFO_EN_REG 0x23
112 #define C6DOFIMU4_FSYNC_INT_REG 0x36
113 #define C6DOFIMU4_INT_PIN_CFG_REG 0x37
114 #define C6DOFIMU4_INT_ENABLE_REG 0x38
115 #define C6DOFIMU4_FIFO_WM_INT_STATUS_REG 0x39
116 #define C6DOFIMU4_INT_STATUS_REG 0x3A
117 #define C6DOFIMU4_ACCEL_XOUT_REG 0x3B
118 #define C6DOFIMU4_ACCEL_YOUT_REG 0x3D
119 #define C6DOFIMU4_ACCEL_ZOUT_REG 0x3F
120 #define C6DOFIMU4_TEMP_OUT_REG 0x41
121 #define C6DOFIMU4_GYRO_XOUT_REG 0x43
122 #define C6DOFIMU4_GYRO_YOUT_REG 0x45
123 #define C6DOFIMU4_GYRO_ZOUT_REG 0x47
124 #define C6DOFIMU4_SELF_TEST_X_GYRO_REG 0x50
125 #define C6DOFIMU4_SELF_TEST_Y_GYRO_REG 0x51
126 #define C6DOFIMU4_SELF_TEST_Z_GYRO_REG 0x52
127 #define C6DOFIMU4_FIFO_WM_TH_REG 0x60
128 #define C6DOFIMU4_SIGNAL_PATH_RESET_REG 0x68
129 #define C6DOFIMU4_ACCEL_INTEL_CTRL_REG 0x69
130 #define C6DOFIMU4_USER_CTRL_REG 0x6A
131 #define C6DOFIMU4_PWR_MGMT_1_REG 0x6B
132 #define C6DOFIMU4_PWR_MGMT_2_REG 0x6C
133 #define C6DOFIMU4_I2C_IF_REG 0x70
134 #define C6DOFIMU4_FIFO_COUNT_REG 0x72
135 #define C6DOFIMU4_FIFO_R_W_REG 0x74
136 #define C6DOFIMU4_WHO_AM_I_REG 0x75
137 #define C6DOFIMU4_XA_OFFSET_REG 0x77
138 #define C6DOFIMU4_YA_OFFSET_REG 0x7A
139 #define C6DOFIMU4_ZA_OFFSET_REG 0x7D
140 
146 #define C6DOFIMU4_FIFO_REPLACING_DIS 0x40
147 #define C6DOFIMU4_EXT_SYNC_FUNC_DIS 0x00
148 #define C6DOFIMU4_EXT_SYNC_TEMP_OUT_L 0x08
149 #define C6DOFIMU4_EXT_SYNC_GYRO_XOUT_L 0x10
150 #define C6DOFIMU4_EXT_SYNC_GYRO_YOUT_L 0x18
151 #define C6DOFIMU4_EXT_SYNC_GYRO_ZOUT_L 0x20
152 #define C6DOFIMU4_EXT_SYNC_ACCEL_XOUT_L 0x28
153 #define C6DOFIMU4_EXT_SYNC_ACCEL_YOUT_L 0x30
154 #define C6DOFIMU4_EXT_SYNC_ACCEL_ZOUT_L 0x38
155 #define C6DOFIMU4_FCHOICE_8173_HZ 0x01
156 #define C6DOFIMU4_GYRO_FCHOICE_3281_HZ 0x02
157 #define C6DOFIMU4_G_DLPF_CFG_250_HZ 0x00
158 #define C6DOFIMU4_G_DLPF_CFG_176_HZ 0x01
159 #define C6DOFIMU4_G_DLPF_CFG_92_HZ 0x02
160 #define C6DOFIMU4_G_DLPF_CFG_41_HZ 0x03
161 #define C6DOFIMU4_G_DLPF_CFG_20_HZ 0x04
162 #define C6DOFIMU4_G_DLPF_CFG_10_HZ 0x05
163 #define C6DOFIMU4_G_DLPF_CFG_5_HZ 0x06
164 #define C6DOFIMU4_G_DLPF_CFG_3281_HZ 0x07
165 #define C6DOFIMU4_XG_ST 0x80
166 #define C6DOFIMU4_YG_ST 0x40
167 #define C6DOFIMU4_ZG_ST 0x20
168 #define C6DOFIMU4_GYRO_FS_SEL_250_DPS 0x00
169 #define C6DOFIMU4_GYRO_FS_SEL_500_DPS 0x01
170 #define C6DOFIMU4_GYRO_FS_SEL_1000_DPS 0x02
171 #define C6DOFIMU4_GYRO_FS_SEL_2000_DPS 0x03
172 #define C6DOFIMU4_XA_ST 0x80
173 #define C6DOFIMU4_YA_ST 0x40
174 #define C6DOFIMU4_ZA_ST 0x20
175 #define C6DOFIMU4_ACCEL_FS_SEL_2_G 0x00
176 #define C6DOFIMU4_ACCEL_FS_SEL_4_G 0x01
177 #define C6DOFIMU4_ACCEL_FS_SEL_8_G 0x02
178 #define C6DOFIMU4_ACCEL_FS_SEL_16_G 0x03
179 #define C6DOFIMU4_ACCEL_AVRG_CFG_4_SAMPLES 0x00
180 #define C6DOFIMU4_ACCEL_AVRG_CFG_8_SAMPLES 0x10
181 #define C6DOFIMU4_ACCEL_AVRG_CFG_16_SAMPLES 0x20
182 #define C6DOFIMU4_ACCEL_AVRG_CFG_32_SAMPLES 0x30
183 #define C6DOFIMU4_ACCEL_FCHOICE_1046_HZ 0x08
184 #define C6DOFIMU4_A_DLPF_CFG_218_HZ 0x01
185 #define C6DOFIMU4_A_DLPF_CFG_99_HZ 0x02
186 #define C6DOFIMU4_A_DLPF_CFG_44_HZ 0x03
187 #define C6DOFIMU4_A_DLPF_CFG_21_HZ 0x04
188 #define C6DOFIMU4_A_DLPF_CFG_10_HZ 0x05
189 #define C6DOFIMU4_A_DLPF_CFG_5_HZ 0x06
190 #define C6DOFIMU4_A_DLPF_CFG_420_HZ 0x07
191 #define C6DOFIMU4_GYRO_LP_MODE_EN 0x80
192 #define C6DOFIMU4_G_AVGCFG_1X_622HZ 0x00
193 #define C6DOFIMU4_G_AVGCFG_2X_391HZ 0x10
194 #define C6DOFIMU4_G_AVGCFG_4X_211HZ 0x20
195 #define C6DOFIMU4_G_AVGCFG_8X_108HZ 0x30
196 #define C6DOFIMU4_G_AVGCFG_16X_54HZ 0x40
197 #define C6DOFIMU4_G_AVGCFG_32X_27HZ 0x50
198 #define C6DOFIMU4_G_AVGCFG_64X_14HZ 0x60
199 #define C6DOFIMU4_G_AVGCFG_128X_7HZ 0x70
200 #define C6DOFIMU4_GYRO_FIFO_EN 0x10
201 #define C6DOFIMU4_ACCEL_FIFO_EN 0x08
202 #define C6DOFIMU4_FSYNC_INT_MASK 0x80
203 #define C6DOFIMU4_FSYNC_INT_OCCURED 0x80
204 #define C6DOFIMU4_FSYNC_INT_NOT_OCCURED 0x00
205 #define C6DOFIMU4_INT_DRDY_PIN_ACT_LOW 0x80
206 #define C6DOFIMU4_INT_DRDY_PIN_ACT_HIGH 0x00
207 #define C6DOFIMU4_INT_DRDY_PIN_OPEN_DRAIN 0x40
208 #define C6DOFIMU4_INT_DRDY_PIN_PUSH_PULL 0x00
209 #define C6DOFIMU4_INT_DRDY_PIN_STAT_CLEARED 0x20
210 #define C6DOFIMU4_INT_DRDY_PIN_PULSE 0x00
211 #define C6DOFIMU4_INT_STAT_CLEARED_ANY_READ 0x10
212 #define C6DOFIMU4_INT_STAT_CLEARED_STAT_REG_READ 0x00
213 #define C6DOFIMU4_FSYNC_PIN_INT_ACT_LOW 0x08
214 #define C6DOFIMU4_FSYNC_PIN_INT_ACT_HIGH 0x00
215 #define C6DOFIMU4_FSYNC_INT_MODE_EN 0x04
216 #define C6DOFIMU4_FIFO_WM_INT_MASK 0x40
217 #define C6DOFIMU4_FIFO_WM_INT_OCCURED 0x40
218 #define C6DOFIMU4_FIFO_WM_INT_NOT_OCCURED 0x00
219 #define C6DOFIMU4_WOM_X_INT_MASK 0x80
220 #define C6DOFIMU4_WOM_X_INT_OCCURED 0x80
221 #define C6DOFIMU4_WOM_Y_INT_MASK 0x40
222 #define C6DOFIMU4_WOM_Y_INT_OCCURED 0x40
223 #define C6DOFIMU4_WOM_Z_INT_MASK 0x20
224 #define C6DOFIMU4_WOM_Z_INT_OCCURED 0x20
225 #define C6DOFIMU4_FIFO_OFLOW_INT_MASK 0x10
226 #define C6DOFIMU4_FIFO_OFLOW_INT_OCCURED 0x10
227 #define C6DOFIMU4_GDRIVE_INT_MASK 0x04
228 #define C6DOFIMU4_GDRIVE_INT_OCCURED 0x04
229 #define C6DOFIMU4_DATA_RDY_INT_MASK 0x01
230 #define C6DOFIMU4_DATA_RDY_INT_OCCURED 0x01
231 #define C6DOFIMU4_INT_STATUS_NOT_OCCURED 0x00
232 #define C6DOFIMU4_ACCEL_RST 0x02
233 #define C6DOFIMU4_TEMP_RST 0x01
234 #define C6DOFIMU4_ACCEL_INTEL_WOM_DET_LOGIC_EN 0x80
235 #define C6DOFIMU4_ACCEL_INTEL_MODE_NOT_USE 0x00
236 #define C6DOFIMU4_ACCEL_INTEL_MODE_COMPARE 0x40
237 #define C6DOFIMU4_OUTPUT_LIMIT_EN 0x02
238 #define C6DOFIMU4_WOM_TH_MODE_OR 0x00
239 #define C6DOFIMU4_WOM_TH_MODE_AND 0x01
240 #define C6DOFIMU4_FIFO_EN 0x40
241 #define C6DOFIMU4_FIFO_RST 0x04
242 #define C6DOFIMU4_ALL_DIG_SIG_PATH_RST 0x01
243 #define C6DOFIMU4_DEVICE_RST 0x80
244 #define C6DOFIMU4_SLEEP 0x40
245 #define C6DOFIMU4_CYCLE 0x20
246 #define C6DOFIMU4_GYRO_STANDBY 0x10
247 #define C6DOFIMU4_TEMP_DIS 0x08
248 #define C6DOFIMU4_CLKSEL_AUTO_SELECT 0x05
249 #define C6DOFIMU4_CLKSEL_INTERNAL_20_MHZ 0x06
250 #define C6DOFIMU4_CLKSEL_STOP_CLOCK 0x07
251 #define C6DOFIMU4_STBY_XA 0x20
252 #define C6DOFIMU4_STBY_YA 0x10
253 #define C6DOFIMU4_STBY_ZA 0x08
254 #define C6DOFIMU4_STBY_XG 0x04
255 #define C6DOFIMU4_STBY_YG 0x02
256 #define C6DOFIMU4_STBY_ZG 0x01
257 #define C6DOFIMU4_ALL_AXIS_EN 0x00
258 #define C6DOFIMU4_I2C_IF_DIS 0x40
259 #define C6DOFIMU4_I2C_IF_EN 0x00
260 
266 #define C6DOFIMU4_OK 0x00
267 #define C6DOFIMU4_INT_OCCURED 0x01
268 #define C6DOFIMU4_ADDR_ERROR 0x02
269 #define C6DOFIMU4_SENS_RESOLUTION_ERROR 0x03
270 
276 #define C6DOFIMU4_LOG_HIGH 0x01
277 #define C6DOFIMU4_LOG_LOW 0x00
278  // End group macro
281 // --------------------------------------------------------------- PUBLIC TYPES
290 typedef uint8_t c6dofimu4_select_t;
291 
295 typedef void ( *c6dofimu4_master_io_t )( struct c6dofimu4_s*, uint8_t, uint8_t*, uint8_t );
296 
297 typedef struct {
298 
299  double x;
300  double y;
301  double z;
302 
304 
308 typedef struct c6dofimu4_s
309 {
310  // Output pins
311 
312  digital_out_t syn;
313 
314  // Input pins
315 
316  digital_in_t int_pin;
317 
318  // Modules
319 
320  i2c_master_t i2c;
321  spi_master_t spi;
322 
323  // ctx variable
324 
325  hal_i2c_address_t slave_address;
329 
330  uint8_t gyro_res;
331  uint8_t accel_res;
332 
333 } c6dofimu4_t;
334 
338 typedef struct
339 {
340  // Communication gpio pins
341 
342  pin_name_t scl;
343  pin_name_t sda;
344  pin_name_t miso;
345  pin_name_t mosi;
346  pin_name_t sck;
347  pin_name_t cs;
348 
349  // Additional gpio pins
350 
351  pin_name_t syn;
352  pin_name_t int_pin;
353 
354  // static variable
355 
356  hal_i2c_speed_t i2c_speed;
357  hal_i2c_address_t i2c_address;
358  hal_spi_speed_t spi_speed;
359  hal_spi_mode_t spi_mode;
360 
362 
363  uint8_t dev_gyro_res;
364  uint8_t dev_accel_res;
365 
367  // End types group
369 // ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
375 #ifdef __cplusplus
376 extern "C"{
377 #endif
378 
388 
398 
422 void c6dofimu4_default_cfg ( c6dofimu4_t *ctx );
423 
434 void c6dofimu4_generic_write ( c6dofimu4_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len );
435 
446 void c6dofimu4_generic_read ( c6dofimu4_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len );
447 
459 uint8_t c6dofimu4_write_byte ( c6dofimu4_t *ctx, uint8_t reg_addr, uint8_t data_in );
460 
472 uint8_t c6dofimu4_read_byte ( c6dofimu4_t *ctx, uint8_t reg_addr, uint8_t *data_out );
473 
485 uint8_t c6dofimu4_write_word ( c6dofimu4_t *ctx, uint8_t reg_addr, uint16_t data_in );
486 
498 uint8_t c6dofimu4_read_word( c6dofimu4_t *ctx, uint8_t reg_addr, uint16_t *data_out );
499 
512 uint8_t c6dofimu4_write_bytes ( c6dofimu4_t *ctx, uint8_t start_addr, uint8_t *data_in, uint8_t n_bytes );
513 
526 uint8_t c6dofimu4_read_bytes ( c6dofimu4_t *ctx, uint8_t start_addr, uint8_t *data_out, uint8_t n_bytes );
527 
535 void c6dofimu4_reset ( c6dofimu4_t *ctx );
536 
545 void c6dofimu4_set_sync_pin ( c6dofimu4_t *ctx, uint8_t state );
546 
556 uint8_t c6dofimu4_get_int_pin ( c6dofimu4_t *ctx );
557 
568 uint8_t c6dofimu4_get_status ( c6dofimu4_t *ctx, uint8_t bit_mask );
569 
580 void c6dofimu4_get_data ( c6dofimu4_t *ctx, c6dofimu4_axis_t *accel_out, c6dofimu4_axis_t *gyro_out, int8_t *temp_out );
581 
593 uint8_t c6dofimu4_set_fsr ( c6dofimu4_t *ctx, uint8_t gyro_resol, uint8_t accel_resol );
594 
595 
596 #ifdef __cplusplus
597 }
598 #endif
599 #endif // _C6DOFIMU4_H_
600  // End public_function group
603 
604 // ------------------------------------------------------------------------- END
void c6dofimu4_generic_read(c6dofimu4_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len)
Generic read function.
void(* c6dofimu4_master_io_t)(struct c6dofimu4_s *, uint8_t, uint8_t *, uint8_t)
Master Input/Output type.
Definition: c6dofimu4.h:295
pin_name_t int_pin
Definition: c6dofimu4.h:352
i2c_master_t i2c
Definition: c6dofimu4.h:320
uint8_t dev_accel_res
Definition: c6dofimu4.h:364
struct c6dofimu4_s c6dofimu4_t
Click ctx object definition.
pin_name_t sck
Definition: c6dofimu4.h:346
double y
Definition: c6dofimu4.h:300
uint8_t accel_res
Definition: c6dofimu4.h:331
uint8_t c6dofimu4_read_bytes(c6dofimu4_t *ctx, uint8_t start_addr, uint8_t *data_out, uint8_t n_bytes)
Generic Sequential Read function.
pin_name_t sda
Definition: c6dofimu4.h:343
Definition: c6dofimu4.h:297
uint8_t c6dofimu4_write_bytes(c6dofimu4_t *ctx, uint8_t start_addr, uint8_t *data_in, uint8_t n_bytes)
Generic Sequential Write function.
c6dofimu4_master_io_t read_f
Definition: c6dofimu4.h:327
uint8_t c6dofimu4_set_fsr(c6dofimu4_t *ctx, uint8_t gyro_resol, uint8_t accel_resol)
Full Scale Setting function.
uint8_t gyro_res
Definition: c6dofimu4.h:330
void c6dofimu4_default_cfg(c6dofimu4_t *ctx)
Click Default Configuration function.
uint8_t dev_gyro_res
Definition: c6dofimu4.h:363
pin_name_t mosi
Definition: c6dofimu4.h:345
double z
Definition: c6dofimu4.h:301
double x
Definition: c6dofimu4.h:299
uint8_t c6dofimu4_select_t
Communication type.
Definition: c6dofimu4.h:290
uint8_t c6dofimu4_get_int_pin(c6dofimu4_t *ctx)
Int Pin Check function.
uint8_t c6dofimu4_write_word(c6dofimu4_t *ctx, uint8_t reg_addr, uint16_t data_in)
Generic Word Write function.
pin_name_t scl
Definition: c6dofimu4.h:342
uint8_t c6dofimu4_read_byte(c6dofimu4_t *ctx, uint8_t reg_addr, uint8_t *data_out)
Generic Single Byte Read function.
digital_in_t int_pin
Definition: c6dofimu4.h:316
c6dofimu4_select_t master_sel
Definition: c6dofimu4.h:328
void c6dofimu4_get_data(c6dofimu4_t *ctx, c6dofimu4_axis_t *accel_out, c6dofimu4_axis_t *gyro_out, int8_t *temp_out)
Data Get function.
C6DOFIMU4_RETVAL c6dofimu4_init(c6dofimu4_t *ctx, c6dofimu4_cfg_t *cfg)
Initialization function.
pin_name_t cs
Definition: c6dofimu4.h:347
#define C6DOFIMU4_RETVAL
Definition: c6dofimu4.h:76
spi_master_t spi
Definition: c6dofimu4.h:321
uint8_t c6dofimu4_read_word(c6dofimu4_t *ctx, uint8_t reg_addr, uint16_t *data_out)
Generic Word Read function.
pin_name_t syn
Definition: c6dofimu4.h:351
void c6dofimu4_set_sync_pin(c6dofimu4_t *ctx, uint8_t state)
Sync Pin Setting function.
Click ctx object definition.
Definition: c6dofimu4.h:308
uint8_t c6dofimu4_write_byte(c6dofimu4_t *ctx, uint8_t reg_addr, uint8_t data_in)
Generic Single Byte Write function.
void c6dofimu4_generic_write(c6dofimu4_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len)
Generic write function.
void c6dofimu4_reset(c6dofimu4_t *ctx)
Device Reset function.
hal_spi_speed_t spi_speed
Definition: c6dofimu4.h:358
c6dofimu4_master_io_t write_f
Definition: c6dofimu4.h:326
digital_out_t syn
Definition: c6dofimu4.h:312
hal_i2c_address_t i2c_address
Definition: c6dofimu4.h:357
hal_i2c_speed_t i2c_speed
Definition: c6dofimu4.h:356
uint8_t c6dofimu4_get_status(c6dofimu4_t *ctx, uint8_t bit_mask)
Status Check function.
c6dofimu4_select_t sel
Definition: c6dofimu4.h:361
Click configuration structure definition.
Definition: c6dofimu4.h:338
void c6dofimu4_cfg_setup(c6dofimu4_cfg_t *cfg)
Config Object Initialization function.
pin_name_t miso
Definition: c6dofimu4.h:344
hal_spi_mode_t spi_mode
Definition: c6dofimu4.h:359
hal_i2c_address_t slave_address
Definition: c6dofimu4.h:325