c6dofimu4  2.0.0.0
c6dofimu4.h
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1 /*
2  * MikroSDK - MikroE Software Development Kit
3  * Copyright© 2020 MikroElektronika d.o.o.
4  *
5  * Permission is hereby granted, free of charge, to any person
6  * obtaining a copy of this software and associated documentation
7  * files (the "Software"), to deal in the Software without restriction,
8  * including without limitation the rights to use, copy, modify, merge,
9  * publish, distribute, sublicense, and/or sell copies of the Software,
10  * and to permit persons to whom the Software is furnished to do so,
11  * subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be
14  * included in all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19  * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22  * OR OTHER DEALINGS IN THE SOFTWARE.
23  */
24 
33 // ----------------------------------------------------------------------------
34 
35 #ifndef C6DOFIMU4_H
36 #define C6DOFIMU4_H
37 
42 #ifdef PREINIT_SUPPORTED
43 #include "preinit.h"
44 #endif
45 
46 #ifdef MikroCCoreVersion
47  #if MikroCCoreVersion >= 1
48  #include "delays.h"
49  #endif
50 #endif
51 
52 #include "drv_digital_out.h"
53 #include "drv_digital_in.h"
54 #include "drv_i2c_master.h"
55 #include "drv_spi_master.h"
56 
57 // -------------------------------------------------------------- PUBLIC MACROS
67 #define C6DOFIMU4_MAP_MIKROBUS( cfg, mikrobus ) \
68  cfg.scl = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
69  cfg.sda = MIKROBUS( mikrobus, MIKROBUS_SDA ); \
70  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
71  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
72  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
73  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
74  cfg.syn = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
75  cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
76 
82 #define C6DOFIMU4_MASTER_I2C 0
83 #define C6DOFIMU4_MASTER_SPI 1
84 
90 #define C6DOFIMU4_RETVAL uint8_t
91 
92 #define C6DOFIMU4_OK 0x00
93 #define C6DOFIMU4_INIT_ERROR 0xFF
94 
100 #define C6DOFIMU4_DEVICE_ADDR 0x68
101 
107 #define C6DOFIMU4_XG_OFFS_TC_REG 0x04
108 #define C6DOFIMU4_YG_OFFS_TC_REG 0x07
109 #define C6DOFIMU4_ZG_OFFS_TC_REG 0x0A
110 #define C6DOFIMU4_SELF_TEST_X_REG 0x0D
111 #define C6DOFIMU4_SELF_TEST_Y_REG 0x0E
112 #define C6DOFIMU4_SELF_TEST_Z_REG 0x0F
113 #define C6DOFIMU4_XG_OFFS_USR_REG 0x13
114 #define C6DOFIMU4_YG_OFFS_USR_REG 0x15
115 #define C6DOFIMU4_ZG_OFFS_USR_REG 0x17
116 #define C6DOFIMU4_SMPLRT_DIV_REG 0x19
117 #define C6DOFIMU4_CONFIG_REG 0x1A
118 #define C6DOFIMU4_GYRO_CONFIG_REG 0x1B
119 #define C6DOFIMU4_ACCEL_CONFIG_REG 0x1C
120 #define C6DOFIMU4_ACCEL_CONFIG2_REG 0x1D
121 #define C6DOFIMU4_LP_MODE_CFG_REG 0x1E
122 #define C6DOFIMU4_ACCEL_WOM_X_THR_REG 0x20
123 #define C6DOFIMU4_ACCEL_WOM_Y_THR_REG 0x21
124 #define C6DOFIMU4_ACCEL_WOM_Z_THR_REG 0x22
125 #define C6DOFIMU4_FIFO_EN_REG 0x23
126 #define C6DOFIMU4_FSYNC_INT_REG 0x36
127 #define C6DOFIMU4_INT_PIN_CFG_REG 0x37
128 #define C6DOFIMU4_INT_ENABLE_REG 0x38
129 #define C6DOFIMU4_FIFO_WM_INT_STATUS_REG 0x39
130 #define C6DOFIMU4_INT_STATUS_REG 0x3A
131 #define C6DOFIMU4_ACCEL_XOUT_REG 0x3B
132 #define C6DOFIMU4_ACCEL_YOUT_REG 0x3D
133 #define C6DOFIMU4_ACCEL_ZOUT_REG 0x3F
134 #define C6DOFIMU4_TEMP_OUT_REG 0x41
135 #define C6DOFIMU4_GYRO_XOUT_REG 0x43
136 #define C6DOFIMU4_GYRO_YOUT_REG 0x45
137 #define C6DOFIMU4_GYRO_ZOUT_REG 0x47
138 #define C6DOFIMU4_SELF_TEST_X_GYRO_REG 0x50
139 #define C6DOFIMU4_SELF_TEST_Y_GYRO_REG 0x51
140 #define C6DOFIMU4_SELF_TEST_Z_GYRO_REG 0x52
141 #define C6DOFIMU4_FIFO_WM_TH_REG 0x60
142 #define C6DOFIMU4_SIGNAL_PATH_RESET_REG 0x68
143 #define C6DOFIMU4_ACCEL_INTEL_CTRL_REG 0x69
144 #define C6DOFIMU4_USER_CTRL_REG 0x6A
145 #define C6DOFIMU4_PWR_MGMT_1_REG 0x6B
146 #define C6DOFIMU4_PWR_MGMT_2_REG 0x6C
147 #define C6DOFIMU4_I2C_IF_REG 0x70
148 #define C6DOFIMU4_FIFO_COUNT_REG 0x72
149 #define C6DOFIMU4_FIFO_R_W_REG 0x74
150 #define C6DOFIMU4_WHO_AM_I_REG 0x75
151 #define C6DOFIMU4_XA_OFFSET_REG 0x77
152 #define C6DOFIMU4_YA_OFFSET_REG 0x7A
153 #define C6DOFIMU4_ZA_OFFSET_REG 0x7D
154 
160 #define C6DOFIMU4_FIFO_REPLACING_DIS 0x40
161 #define C6DOFIMU4_EXT_SYNC_FUNC_DIS 0x00
162 #define C6DOFIMU4_EXT_SYNC_TEMP_OUT_L 0x08
163 #define C6DOFIMU4_EXT_SYNC_GYRO_XOUT_L 0x10
164 #define C6DOFIMU4_EXT_SYNC_GYRO_YOUT_L 0x18
165 #define C6DOFIMU4_EXT_SYNC_GYRO_ZOUT_L 0x20
166 #define C6DOFIMU4_EXT_SYNC_ACCEL_XOUT_L 0x28
167 #define C6DOFIMU4_EXT_SYNC_ACCEL_YOUT_L 0x30
168 #define C6DOFIMU4_EXT_SYNC_ACCEL_ZOUT_L 0x38
169 #define C6DOFIMU4_FCHOICE_8173_HZ 0x01
170 #define C6DOFIMU4_GYRO_FCHOICE_3281_HZ 0x02
171 #define C6DOFIMU4_G_DLPF_CFG_250_HZ 0x00
172 #define C6DOFIMU4_G_DLPF_CFG_176_HZ 0x01
173 #define C6DOFIMU4_G_DLPF_CFG_92_HZ 0x02
174 #define C6DOFIMU4_G_DLPF_CFG_41_HZ 0x03
175 #define C6DOFIMU4_G_DLPF_CFG_20_HZ 0x04
176 #define C6DOFIMU4_G_DLPF_CFG_10_HZ 0x05
177 #define C6DOFIMU4_G_DLPF_CFG_5_HZ 0x06
178 #define C6DOFIMU4_G_DLPF_CFG_3281_HZ 0x07
179 #define C6DOFIMU4_XG_ST 0x80
180 #define C6DOFIMU4_YG_ST 0x40
181 #define C6DOFIMU4_ZG_ST 0x20
182 #define C6DOFIMU4_GYRO_FS_SEL_250_DPS 0x00
183 #define C6DOFIMU4_GYRO_FS_SEL_500_DPS 0x01
184 #define C6DOFIMU4_GYRO_FS_SEL_1000_DPS 0x02
185 #define C6DOFIMU4_GYRO_FS_SEL_2000_DPS 0x03
186 #define C6DOFIMU4_XA_ST 0x80
187 #define C6DOFIMU4_YA_ST 0x40
188 #define C6DOFIMU4_ZA_ST 0x20
189 #define C6DOFIMU4_ACCEL_FS_SEL_2_G 0x00
190 #define C6DOFIMU4_ACCEL_FS_SEL_4_G 0x01
191 #define C6DOFIMU4_ACCEL_FS_SEL_8_G 0x02
192 #define C6DOFIMU4_ACCEL_FS_SEL_16_G 0x03
193 #define C6DOFIMU4_ACCEL_AVRG_CFG_4_SAMPLES 0x00
194 #define C6DOFIMU4_ACCEL_AVRG_CFG_8_SAMPLES 0x10
195 #define C6DOFIMU4_ACCEL_AVRG_CFG_16_SAMPLES 0x20
196 #define C6DOFIMU4_ACCEL_AVRG_CFG_32_SAMPLES 0x30
197 #define C6DOFIMU4_ACCEL_FCHOICE_1046_HZ 0x08
198 #define C6DOFIMU4_A_DLPF_CFG_218_HZ 0x01
199 #define C6DOFIMU4_A_DLPF_CFG_99_HZ 0x02
200 #define C6DOFIMU4_A_DLPF_CFG_44_HZ 0x03
201 #define C6DOFIMU4_A_DLPF_CFG_21_HZ 0x04
202 #define C6DOFIMU4_A_DLPF_CFG_10_HZ 0x05
203 #define C6DOFIMU4_A_DLPF_CFG_5_HZ 0x06
204 #define C6DOFIMU4_A_DLPF_CFG_420_HZ 0x07
205 #define C6DOFIMU4_GYRO_LP_MODE_EN 0x80
206 #define C6DOFIMU4_G_AVGCFG_1X_622HZ 0x00
207 #define C6DOFIMU4_G_AVGCFG_2X_391HZ 0x10
208 #define C6DOFIMU4_G_AVGCFG_4X_211HZ 0x20
209 #define C6DOFIMU4_G_AVGCFG_8X_108HZ 0x30
210 #define C6DOFIMU4_G_AVGCFG_16X_54HZ 0x40
211 #define C6DOFIMU4_G_AVGCFG_32X_27HZ 0x50
212 #define C6DOFIMU4_G_AVGCFG_64X_14HZ 0x60
213 #define C6DOFIMU4_G_AVGCFG_128X_7HZ 0x70
214 #define C6DOFIMU4_GYRO_FIFO_EN 0x10
215 #define C6DOFIMU4_ACCEL_FIFO_EN 0x08
216 #define C6DOFIMU4_FSYNC_INT_MASK 0x80
217 #define C6DOFIMU4_FSYNC_INT_OCCURED 0x80
218 #define C6DOFIMU4_FSYNC_INT_NOT_OCCURED 0x00
219 #define C6DOFIMU4_INT_DRDY_PIN_ACT_LOW 0x80
220 #define C6DOFIMU4_INT_DRDY_PIN_ACT_HIGH 0x00
221 #define C6DOFIMU4_INT_DRDY_PIN_OPEN_DRAIN 0x40
222 #define C6DOFIMU4_INT_DRDY_PIN_PUSH_PULL 0x00
223 #define C6DOFIMU4_INT_DRDY_PIN_STAT_CLEARED 0x20
224 #define C6DOFIMU4_INT_DRDY_PIN_PULSE 0x00
225 #define C6DOFIMU4_INT_STAT_CLEARED_ANY_READ 0x10
226 #define C6DOFIMU4_INT_STAT_CLEARED_STAT_REG_READ 0x00
227 #define C6DOFIMU4_FSYNC_PIN_INT_ACT_LOW 0x08
228 #define C6DOFIMU4_FSYNC_PIN_INT_ACT_HIGH 0x00
229 #define C6DOFIMU4_FSYNC_INT_MODE_EN 0x04
230 #define C6DOFIMU4_FIFO_WM_INT_MASK 0x40
231 #define C6DOFIMU4_FIFO_WM_INT_OCCURED 0x40
232 #define C6DOFIMU4_FIFO_WM_INT_NOT_OCCURED 0x00
233 #define C6DOFIMU4_WOM_X_INT_MASK 0x80
234 #define C6DOFIMU4_WOM_X_INT_OCCURED 0x80
235 #define C6DOFIMU4_WOM_Y_INT_MASK 0x40
236 #define C6DOFIMU4_WOM_Y_INT_OCCURED 0x40
237 #define C6DOFIMU4_WOM_Z_INT_MASK 0x20
238 #define C6DOFIMU4_WOM_Z_INT_OCCURED 0x20
239 #define C6DOFIMU4_FIFO_OFLOW_INT_MASK 0x10
240 #define C6DOFIMU4_FIFO_OFLOW_INT_OCCURED 0x10
241 #define C6DOFIMU4_GDRIVE_INT_MASK 0x04
242 #define C6DOFIMU4_GDRIVE_INT_OCCURED 0x04
243 #define C6DOFIMU4_DATA_RDY_INT_MASK 0x01
244 #define C6DOFIMU4_DATA_RDY_INT_OCCURED 0x01
245 #define C6DOFIMU4_INT_STATUS_NOT_OCCURED 0x00
246 #define C6DOFIMU4_ACCEL_RST 0x02
247 #define C6DOFIMU4_TEMP_RST 0x01
248 #define C6DOFIMU4_ACCEL_INTEL_WOM_DET_LOGIC_EN 0x80
249 #define C6DOFIMU4_ACCEL_INTEL_MODE_NOT_USE 0x00
250 #define C6DOFIMU4_ACCEL_INTEL_MODE_COMPARE 0x40
251 #define C6DOFIMU4_OUTPUT_LIMIT_EN 0x02
252 #define C6DOFIMU4_WOM_TH_MODE_OR 0x00
253 #define C6DOFIMU4_WOM_TH_MODE_AND 0x01
254 #define C6DOFIMU4_FIFO_EN 0x40
255 #define C6DOFIMU4_FIFO_RST 0x04
256 #define C6DOFIMU4_ALL_DIG_SIG_PATH_RST 0x01
257 #define C6DOFIMU4_DEVICE_RST 0x80
258 #define C6DOFIMU4_SLEEP 0x40
259 #define C6DOFIMU4_CYCLE 0x20
260 #define C6DOFIMU4_GYRO_STANDBY 0x10
261 #define C6DOFIMU4_TEMP_DIS 0x08
262 #define C6DOFIMU4_CLKSEL_AUTO_SELECT 0x05
263 #define C6DOFIMU4_CLKSEL_INTERNAL_20_MHZ 0x06
264 #define C6DOFIMU4_CLKSEL_STOP_CLOCK 0x07
265 #define C6DOFIMU4_STBY_XA 0x20
266 #define C6DOFIMU4_STBY_YA 0x10
267 #define C6DOFIMU4_STBY_ZA 0x08
268 #define C6DOFIMU4_STBY_XG 0x04
269 #define C6DOFIMU4_STBY_YG 0x02
270 #define C6DOFIMU4_STBY_ZG 0x01
271 #define C6DOFIMU4_ALL_AXIS_EN 0x00
272 #define C6DOFIMU4_I2C_IF_DIS 0x40
273 #define C6DOFIMU4_I2C_IF_EN 0x00
274 
280 #define C6DOFIMU4_OK 0x00
281 #define C6DOFIMU4_INT_OCCURED 0x01
282 #define C6DOFIMU4_ADDR_ERROR 0x02
283 #define C6DOFIMU4_SENS_RESOLUTION_ERROR 0x03
284 
290 #define C6DOFIMU4_LOG_HIGH 0x01
291 #define C6DOFIMU4_LOG_LOW 0x00
292  // End group macro
295 // --------------------------------------------------------------- PUBLIC TYPES
304 typedef uint8_t c6dofimu4_select_t;
305 
309 typedef void ( *c6dofimu4_master_io_t )( struct c6dofimu4_s*, uint8_t, uint8_t*, uint8_t );
310 
311 typedef struct {
312 
313  double x;
314  double y;
315  double z;
316 
318 
322 typedef struct c6dofimu4_s
323 {
324  // Output pins
325 
326  digital_out_t syn;
327  digital_out_t cs;
328 
329  // Input pins
330 
331  digital_in_t int_pin;
332 
333  // Modules
334 
335  i2c_master_t i2c;
336  spi_master_t spi;
337 
338  // ctx variable
339 
340  uint8_t slave_address;
341  pin_name_t chip_select;
345 
346  uint8_t gyro_res;
347  uint8_t accel_res;
348 
350 
354 typedef struct
355 {
356  // Communication gpio pins
357 
358  pin_name_t scl;
359  pin_name_t sda;
360  pin_name_t miso;
361  pin_name_t mosi;
362  pin_name_t sck;
363  pin_name_t cs;
364 
365  // Additional gpio pins
366 
367  pin_name_t syn;
368  pin_name_t int_pin;
369 
370  // static variable
371 
372  uint32_t i2c_speed;
373  uint8_t i2c_address;
374  uint32_t spi_speed;
375  uint8_t spi_mode;
376  spi_master_chip_select_polarity_t cs_polarity;
377 
379 
380  uint8_t dev_gyro_res;
381  uint8_t dev_accel_res;
382 
384  // End types group
386 // ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
392 #ifdef __cplusplus
393 extern "C"{
394 #endif
395 
405 
415 
440 
451 void c6dofimu4_generic_write ( c6dofimu4_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len );
452 
463 void c6dofimu4_generic_read ( c6dofimu4_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len );
464 
476 uint8_t c6dofimu4_write_byte ( c6dofimu4_t *ctx, uint8_t reg_addr, uint8_t data_in );
477 
489 uint8_t c6dofimu4_read_byte ( c6dofimu4_t *ctx, uint8_t reg_addr, uint8_t *data_out );
490 
502 uint8_t c6dofimu4_write_word ( c6dofimu4_t *ctx, uint8_t reg_addr, uint16_t data_in );
503 
515 uint8_t c6dofimu4_read_word( c6dofimu4_t *ctx, uint8_t reg_addr, uint16_t *data_out );
516 
529 uint8_t c6dofimu4_write_bytes ( c6dofimu4_t *ctx, uint8_t start_addr, uint8_t *data_in, uint8_t n_bytes );
530 
543 uint8_t c6dofimu4_read_bytes ( c6dofimu4_t *ctx, uint8_t start_addr, uint8_t *data_out, uint8_t n_bytes );
544 
553 
562 void c6dofimu4_set_sync_pin ( c6dofimu4_t *ctx, uint8_t state );
563 
574 
585 uint8_t c6dofimu4_get_status ( c6dofimu4_t *ctx, uint8_t bit_mask );
586 
597 void c6dofimu4_get_data ( c6dofimu4_t *ctx, c6dofimu4_axis_t *accel_out, c6dofimu4_axis_t *gyro_out, int8_t *temp_out );
598 
610 uint8_t c6dofimu4_set_fsr ( c6dofimu4_t *ctx, uint8_t gyro_resol, uint8_t accel_resol );
611 
612 
613 #ifdef __cplusplus
614 }
615 #endif
616 #endif // _C6DOFIMU4_H_
617  // End public_function group
620 
621 // ------------------------------------------------------------------------- END
c6dofimu4_init
C6DOFIMU4_RETVAL c6dofimu4_init(c6dofimu4_t *ctx, c6dofimu4_cfg_t *cfg)
Initialization function.
c6dofimu4_cfg_t::i2c_address
uint8_t i2c_address
Definition: c6dofimu4.h:373
c6dofimu4_s::spi
spi_master_t spi
Definition: c6dofimu4.h:336
c6dofimu4_s
Click ctx object definition.
Definition: c6dofimu4.h:323
c6dofimu4_cfg_t::mosi
pin_name_t mosi
Definition: c6dofimu4.h:361
c6dofimu4_get_int_pin
uint8_t c6dofimu4_get_int_pin(c6dofimu4_t *ctx)
Int Pin Check function.
c6dofimu4_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: c6dofimu4.h:376
c6dofimu4_s::int_pin
digital_in_t int_pin
Definition: c6dofimu4.h:331
c6dofimu4_cfg_t::cs
pin_name_t cs
Definition: c6dofimu4.h:363
c6dofimu4_axis_t::z
double z
Definition: c6dofimu4.h:315
c6dofimu4_get_status
uint8_t c6dofimu4_get_status(c6dofimu4_t *ctx, uint8_t bit_mask)
Status Check function.
c6dofimu4_read_bytes
uint8_t c6dofimu4_read_bytes(c6dofimu4_t *ctx, uint8_t start_addr, uint8_t *data_out, uint8_t n_bytes)
Generic Sequential Read function.
c6dofimu4_s::read_f
c6dofimu4_master_io_t read_f
Definition: c6dofimu4.h:343
c6dofimu4_write_bytes
uint8_t c6dofimu4_write_bytes(c6dofimu4_t *ctx, uint8_t start_addr, uint8_t *data_in, uint8_t n_bytes)
Generic Sequential Write function.
c6dofimu4_s::slave_address
uint8_t slave_address
Definition: c6dofimu4.h:340
c6dofimu4_generic_write
void c6dofimu4_generic_write(c6dofimu4_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len)
Generic write function.
c6dofimu4_s::master_sel
c6dofimu4_select_t master_sel
Definition: c6dofimu4.h:344
c6dofimu4_cfg_t
Click configuration structure definition.
Definition: c6dofimu4.h:355
c6dofimu4_cfg_setup
void c6dofimu4_cfg_setup(c6dofimu4_cfg_t *cfg)
Config Object Initialization function.
c6dofimu4_default_cfg
void c6dofimu4_default_cfg(c6dofimu4_t *ctx)
Click Default Configuration function.
c6dofimu4_s::cs
digital_out_t cs
Definition: c6dofimu4.h:327
c6dofimu4_axis_t::x
double x
Definition: c6dofimu4.h:313
c6dofimu4_axis_t
Definition: c6dofimu4.h:311
c6dofimu4_cfg_t::syn
pin_name_t syn
Definition: c6dofimu4.h:367
c6dofimu4_s::syn
digital_out_t syn
Definition: c6dofimu4.h:326
c6dofimu4_cfg_t::dev_gyro_res
uint8_t dev_gyro_res
Definition: c6dofimu4.h:380
c6dofimu4_t
struct c6dofimu4_s c6dofimu4_t
Click ctx object definition.
c6dofimu4_write_byte
uint8_t c6dofimu4_write_byte(c6dofimu4_t *ctx, uint8_t reg_addr, uint8_t data_in)
Generic Single Byte Write function.
c6dofimu4_s::gyro_res
uint8_t gyro_res
Definition: c6dofimu4.h:346
c6dofimu4_cfg_t::i2c_speed
uint32_t i2c_speed
Definition: c6dofimu4.h:372
c6dofimu4_cfg_t::spi_mode
uint8_t spi_mode
Definition: c6dofimu4.h:375
c6dofimu4_select_t
uint8_t c6dofimu4_select_t
Communication type.
Definition: c6dofimu4.h:304
c6dofimu4_s::chip_select
pin_name_t chip_select
Definition: c6dofimu4.h:341
c6dofimu4_s::write_f
c6dofimu4_master_io_t write_f
Definition: c6dofimu4.h:342
c6dofimu4_set_sync_pin
void c6dofimu4_set_sync_pin(c6dofimu4_t *ctx, uint8_t state)
Sync Pin Setting function.
c6dofimu4_s::accel_res
uint8_t accel_res
Definition: c6dofimu4.h:347
C6DOFIMU4_RETVAL
#define C6DOFIMU4_RETVAL
Definition: c6dofimu4.h:90
c6dofimu4_s::i2c
i2c_master_t i2c
Definition: c6dofimu4.h:335
c6dofimu4_cfg_t::scl
pin_name_t scl
Definition: c6dofimu4.h:358
c6dofimu4_set_fsr
uint8_t c6dofimu4_set_fsr(c6dofimu4_t *ctx, uint8_t gyro_resol, uint8_t accel_resol)
Full Scale Setting function.
c6dofimu4_write_word
uint8_t c6dofimu4_write_word(c6dofimu4_t *ctx, uint8_t reg_addr, uint16_t data_in)
Generic Word Write function.
c6dofimu4_cfg_t::miso
pin_name_t miso
Definition: c6dofimu4.h:360
c6dofimu4_cfg_t::sel
c6dofimu4_select_t sel
Definition: c6dofimu4.h:378
c6dofimu4_master_io_t
void(* c6dofimu4_master_io_t)(struct c6dofimu4_s *, uint8_t, uint8_t *, uint8_t)
Master Input/Output type.
Definition: c6dofimu4.h:309
c6dofimu4_cfg_t::spi_speed
uint32_t spi_speed
Definition: c6dofimu4.h:374
c6dofimu4_cfg_t::int_pin
pin_name_t int_pin
Definition: c6dofimu4.h:368
c6dofimu4_reset
void c6dofimu4_reset(c6dofimu4_t *ctx)
Device Reset function.
c6dofimu4_generic_read
void c6dofimu4_generic_read(c6dofimu4_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len)
Generic read function.
c6dofimu4_cfg_t::sck
pin_name_t sck
Definition: c6dofimu4.h:362
c6dofimu4_cfg_t::dev_accel_res
uint8_t dev_accel_res
Definition: c6dofimu4.h:381
c6dofimu4_read_byte
uint8_t c6dofimu4_read_byte(c6dofimu4_t *ctx, uint8_t reg_addr, uint8_t *data_out)
Generic Single Byte Read function.
c6dofimu4_get_data
void c6dofimu4_get_data(c6dofimu4_t *ctx, c6dofimu4_axis_t *accel_out, c6dofimu4_axis_t *gyro_out, int8_t *temp_out)
Data Get function.
c6dofimu4_read_word
uint8_t c6dofimu4_read_word(c6dofimu4_t *ctx, uint8_t reg_addr, uint16_t *data_out)
Generic Word Read function.
c6dofimu4_cfg_t::sda
pin_name_t sda
Definition: c6dofimu4.h:359
c6dofimu4_axis_t::y
double y
Definition: c6dofimu4.h:314