mram  2.0.0.0
mram.h
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1 /*
2  * MikroSDK - MikroE Software Development Kit
3  * Copyright (c) 2019, MikroElektronika - www.mikroe.com
4  * All rights reserved.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
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10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22  * SOFTWARE.
23  */
24 
33 // ----------------------------------------------------------------------------
34 
35 #ifndef MRAM_H
36 #define MRAM_H
37 
38 #include "drv_digital_out.h"
39 #include "drv_digital_in.h"
40 #include "drv_spi_master.h"
41 
42 
43 // -------------------------------------------------------------- PUBLIC MACROS
54 #define MRAM_MAP_MIKROBUS( cfg, mikrobus ) \
55  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
56  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
57  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
58  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
59  cfg.wp = MIKROBUS( mikrobus, MIKROBUS_RST ); \
60  cfg.hld = MIKROBUS( mikrobus, MIKROBUS_INT )
61 
67 #define MRAM_RETVAL uint8_t
68 #define MRAM_OK 0x00
69 #define MRAM_INIT_ERROR 0xFF
70 
76 #define MRAM_WRITE_ENABLE_BIT 0x02
77 #define MRAM_MEMORY_BLOCK_BIT0 0x04
78 #define MRAM_MEMORY_BLOCK_BIT1 0x08
79 #define MRAM_STATUS_WRITE_DISABLE_BIT 0x80
80 #define MRAM_FIRST_ADDRESS_LOCATION 0x0000
81 #define MRAM_ADDRESS_LOCATION_0 0x000F
82 #define MRAM_ADDRESS_LOCATION_1 0x00FF
83 #define MRAM_ADDRESS_LOCATION_2 0x0FFF
84 #define MRAM_LAST_ADDRESS_LOCATION 0x7FFF
85 #define MRAM_LOGIC_HIGH 0x01
86 #define MRAM_LOGIC_LOW 0x00
87 #define MRAM_NONE_PROTECTED_MEMORY 0x82
88 #define MRAM_UPPER_QUARTER_PROTECTED_MEMORY 0x86
89 #define MRAM_UPPER_HALF_PROTECTED_MEMORY 0x8A
90 #define MRAM_ALL_PROTECTED_MEMORY 0x8E
91  // End group macro
94 // --------------------------------------------------------------- PUBLIC TYPES
103 typedef struct
104 {
105  // Output pins
106 
107  digital_out_t wp;
108  digital_out_t hld;
109 
110  // Modules
111  spi_master_t spi;
112 
113 } mram_t;
114 
118 typedef struct
119 {
120  // Communication gpio pins
121 
122  pin_name_t miso;
123  pin_name_t mosi;
124  pin_name_t sck;
125  pin_name_t cs;
126 
127  // Additional gpio pins
128 
129  pin_name_t wp;
130  pin_name_t hld;
131 
132  // static variable
133 
134  hal_spi_speed_t spi_speed;
135  hal_spi_mode_t spi_mode;
136 
137 } mram_cfg_t;
138  // End types group
140 
141 // ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
142 
147 #ifdef __cplusplus
148 extern "C"{
149 #endif
150 
159 void mram_cfg_setup ( mram_cfg_t *cfg );
160 
168 MRAM_RETVAL mram_init ( mram_t *ctx, mram_cfg_t *cfg );
169 
177 void mram_default_cfg ( mram_t *ctx );
178 
187 void mram_generic_transfer ( mram_t *ctx, spi_master_transfer_data_t *block );
188 
198 uint8_t mram_read_status_reg ( mram_t *ctx );
199 
210 uint8_t mram_check_status_bit (mram_t *ctx, uint8_t status_bit );
211 
221 uint8_t mram_enable_write (mram_t *ctx );
222 
232 uint8_t mram_disable_write ( mram_t *ctx );
233 
243 void mram_write_status_reg ( mram_t *ctx, uint8_t transfer_data);
244 
256 void mram_read_data_bytes ( mram_t *ctx, const uint16_t address, uint8_t *buffer, const uint16_t n_bytes );
257 
269 void mram_write_data_bytes ( mram_t *ctx, const uint16_t address, uint8_t *buffer, const uint16_t n_bytes );
270 
279 void mram_enter_sleep_mode ( mram_t *ctx );
280 
289 void mram_wake_up_mode ( mram_t *ctx );
290 
300 void mram_enable_write_protect ( mram_t *ctx, uint8_t state);
301 
311 void mram_enable_hold_mode ( mram_t *ctx, uint8_t state);
312 
313 #ifdef __cplusplus
314 }
315 #endif
316 #endif // _MRAM_H_
317  // End public_function group
320 
321 // ------------------------------------------------------------------------- END
void mram_write_status_reg(mram_t *ctx, uint8_t transfer_data)
Write status reg.
uint8_t mram_enable_write(mram_t *ctx)
Enable write.
pin_name_t miso
Definition: mram.h:122
void mram_write_data_bytes(mram_t *ctx, const uint16_t address, uint8_t *buffer, const uint16_t n_bytes)
Write n byte data.
pin_name_t sck
Definition: mram.h:124
digital_out_t hld
Definition: mram.h:108
void mram_read_data_bytes(mram_t *ctx, const uint16_t address, uint8_t *buffer, const uint16_t n_bytes)
Read n byte data.
pin_name_t cs
Definition: mram.h:125
digital_out_t wp
Definition: mram.h:107
uint8_t mram_disable_write(mram_t *ctx)
Disable write.
spi_master_t spi
Definition: mram.h:111
MRAM_RETVAL mram_init(mram_t *ctx, mram_cfg_t *cfg)
Initialization function.
hal_spi_mode_t spi_mode
Definition: mram.h:135
void mram_default_cfg(mram_t *ctx)
Click Default Configuration function.
void mram_enable_write_protect(mram_t *ctx, uint8_t state)
Enable write protection.
uint8_t mram_read_status_reg(mram_t *ctx)
Read status reg.
#define MRAM_RETVAL
Definition: mram.h:67
hal_spi_speed_t spi_speed
Definition: mram.h:134
pin_name_t mosi
Definition: mram.h:123
void mram_cfg_setup(mram_cfg_t *cfg)
Config Object Initialization function.
Click configuration structure definition.
Definition: mram.h:118
void mram_enable_hold_mode(mram_t *ctx, uint8_t state)
Enable hold mode.
pin_name_t wp
Definition: mram.h:129
uint8_t mram_check_status_bit(mram_t *ctx, uint8_t status_bit)
Check status bit.
pin_name_t hld
Definition: mram.h:130
void mram_wake_up_mode(mram_t *ctx)
Wake up.
void mram_generic_transfer(mram_t *ctx, spi_master_transfer_data_t *block)
Generic transfer function.
Click ctx object definition.
Definition: mram.h:103
void mram_enter_sleep_mode(mram_t *ctx)
Sleep mode.