mram  2.0.0.0
mram.h
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1 /*
2  * MikroSDK - MikroE Software Development Kit
3  * Copyright© 2020 MikroElektronika d.o.o.
4  *
5  * Permission is hereby granted, free of charge, to any person
6  * obtaining a copy of this software and associated documentation
7  * files (the "Software"), to deal in the Software without restriction,
8  * including without limitation the rights to use, copy, modify, merge,
9  * publish, distribute, sublicense, and/or sell copies of the Software,
10  * and to permit persons to whom the Software is furnished to do so,
11  * subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be
14  * included in all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19  * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22  * OR OTHER DEALINGS IN THE SOFTWARE.
23  */
24 
33 // ----------------------------------------------------------------------------
34 
35 #ifndef MRAM_H
36 #define MRAM_H
37 
38 #include "mikrosdk_version.h"
39 
40 #ifdef __GNUC__
41 #if mikroSDK_GET_VERSION < 20800ul
42 #include "rcu_delays.h"
43 #else
44 #include "delays.h"
45 #endif
46 #endif
47 
48 #include "drv_digital_out.h"
49 #include "drv_digital_in.h"
50 #include "drv_spi_master.h"
51 
52 
53 // -------------------------------------------------------------- PUBLIC MACROS
64 #define MRAM_MAP_MIKROBUS( cfg, mikrobus ) \
65  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
66  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
67  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
68  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
69  cfg.wp = MIKROBUS( mikrobus, MIKROBUS_RST ); \
70  cfg.hld = MIKROBUS( mikrobus, MIKROBUS_INT )
71 
77 #define MRAM_OK 0
78 #define MRAM_ERROR -1
79 
85 #define MRAM_WRITE_ENABLE_BIT 0x02
86 #define MRAM_MEMORY_BLOCK_BIT0 0x04
87 #define MRAM_MEMORY_BLOCK_BIT1 0x08
88 #define MRAM_STATUS_WRITE_DISABLE_BIT 0x80
89 #define MRAM_FIRST_ADDRESS_LOCATION 0x0000
90 #define MRAM_ADDRESS_LOCATION_0 0x000F
91 #define MRAM_ADDRESS_LOCATION_1 0x00FF
92 #define MRAM_ADDRESS_LOCATION_2 0x0FFF
93 #define MRAM_LAST_ADDRESS_LOCATION 0x7FFF
94 #define MRAM_LOGIC_HIGH 0x01
95 #define MRAM_LOGIC_LOW 0x00
96 #define MRAM_NONE_PROTECTED_MEMORY 0x82
97 #define MRAM_UPPER_QUARTER_PROTECTED_MEMORY 0x86
98 #define MRAM_UPPER_HALF_PROTECTED_MEMORY 0x8A
99 #define MRAM_ALL_PROTECTED_MEMORY 0x8E
100  // End group macro
103 // --------------------------------------------------------------- PUBLIC TYPES
112 typedef struct
113 {
114  // Output pins
115 
116  digital_out_t wp;
117  digital_out_t hld;
118  digital_out_t cs;
119 
120  // Modules
121  spi_master_t spi;
122  pin_name_t chip_select;
123 
124 } mram_t;
125 
129 typedef struct
130 {
131  // Communication gpio pins
132 
133  pin_name_t miso;
134  pin_name_t mosi;
135  pin_name_t sck;
136  pin_name_t cs;
137 
138  // Additional gpio pins
139 
140  pin_name_t wp;
141  pin_name_t hld;
142 
143  // static variable
144 
145  uint32_t spi_speed;
146  spi_master_mode_t spi_mode;
147  spi_master_chip_select_polarity_t cs_polarity;
148 
149 } mram_cfg_t;
150  // End types group
152 
153 // ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
154 
159 #ifdef __cplusplus
160 extern "C"{
161 #endif
162 
172 
180 err_t mram_init ( mram_t *ctx, mram_cfg_t *cfg );
181 
189 void mram_default_cfg ( mram_t *ctx );
190 
203 (
204  mram_t *ctx,
205  uint8_t *wr_buf,
206  uint16_t wr_len,
207  uint8_t *rd_buf,
208  uint16_t rd_len
209 );
210 
220 uint8_t mram_read_status_reg ( mram_t *ctx );
221 
232 uint8_t mram_check_status_bit (mram_t *ctx, uint8_t status_bit );
233 
243 uint8_t mram_enable_write (mram_t *ctx );
244 
254 uint8_t mram_disable_write ( mram_t *ctx );
255 
265 void mram_write_status_reg ( mram_t *ctx, uint8_t transfer_data);
266 
278 void mram_read_data_bytes ( mram_t *ctx, const uint16_t address, uint8_t *buffer, const uint16_t n_bytes );
279 
291 void mram_write_data_bytes ( mram_t *ctx, const uint16_t address, uint8_t *buffer, const uint16_t n_bytes );
292 
302 
311 void mram_wake_up_mode ( mram_t *ctx );
312 
322 void mram_enable_write_protect ( mram_t *ctx, uint8_t state);
323 
333 void mram_enable_hold_mode ( mram_t *ctx, uint8_t state);
334 
335 #ifdef __cplusplus
336 }
337 #endif
338 #endif // _MRAM_H_
339  // End public_function group
342 
343 // ------------------------------------------------------------------------- END
mram_disable_write
uint8_t mram_disable_write(mram_t *ctx)
Disable write.
mram_read_data_bytes
void mram_read_data_bytes(mram_t *ctx, const uint16_t address, uint8_t *buffer, const uint16_t n_bytes)
Read n byte data.
mram_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: mram.h:146
mram_t::hld
digital_out_t hld
Definition: mram.h:117
mram_cfg_t::cs
pin_name_t cs
Definition: mram.h:136
mram_cfg_t::mosi
pin_name_t mosi
Definition: mram.h:134
mram_t::spi
spi_master_t spi
Definition: mram.h:121
mram_t::cs
digital_out_t cs
Definition: mram.h:118
mram_cfg_t::wp
pin_name_t wp
Definition: mram.h:140
mram_generic_transfer
void mram_generic_transfer(mram_t *ctx, uint8_t *wr_buf, uint16_t wr_len, uint8_t *rd_buf, uint16_t rd_len)
Generic transfer function.
mram_enable_hold_mode
void mram_enable_hold_mode(mram_t *ctx, uint8_t state)
Enable hold mode.
mram_t
Click ctx object definition.
Definition: mram.h:113
mram_t::chip_select
pin_name_t chip_select
Definition: mram.h:122
mram_cfg_t
Click configuration structure definition.
Definition: mram.h:130
mram_wake_up_mode
void mram_wake_up_mode(mram_t *ctx)
Wake up.
mram_init
err_t mram_init(mram_t *ctx, mram_cfg_t *cfg)
Initialization function.
mram_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: mram.h:147
mram_write_status_reg
void mram_write_status_reg(mram_t *ctx, uint8_t transfer_data)
Write status reg.
mram_cfg_t::sck
pin_name_t sck
Definition: mram.h:135
mram_enable_write
uint8_t mram_enable_write(mram_t *ctx)
Enable write.
mram_cfg_setup
void mram_cfg_setup(mram_cfg_t *cfg)
Config Object Initialization function.
mram_cfg_t::miso
pin_name_t miso
Definition: mram.h:133
mram_enter_sleep_mode
void mram_enter_sleep_mode(mram_t *ctx)
Sleep mode.
mram_write_data_bytes
void mram_write_data_bytes(mram_t *ctx, const uint16_t address, uint8_t *buffer, const uint16_t n_bytes)
Write n byte data.
mram_cfg_t::hld
pin_name_t hld
Definition: mram.h:141
mram_t::wp
digital_out_t wp
Definition: mram.h:116
mram_default_cfg
void mram_default_cfg(mram_t *ctx)
Click Default Configuration function.
mram_cfg_t::spi_speed
uint32_t spi_speed
Definition: mram.h:145
mram_read_status_reg
uint8_t mram_read_status_reg(mram_t *ctx)
Read status reg.
mram_check_status_bit
uint8_t mram_check_status_bit(mram_t *ctx, uint8_t status_bit)
Check status bit.
mram_enable_write_protect
void mram_enable_write_protect(mram_t *ctx, uint8_t state)
Enable write protection.