flash5 2.0.0.0
flash5.h
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1/*
2 * MikroSDK - MikroE Software Development Kit
3 * Copyright© 2020 MikroElektronika d.o.o.
4 *
5 * Permission is hereby granted, free of charge, to any person
6 * obtaining a copy of this software and associated documentation
7 * files (the "Software"), to deal in the Software without restriction,
8 * including without limitation the rights to use, copy, modify, merge,
9 * publish, distribute, sublicense, and/or sell copies of the Software,
10 * and to permit persons to whom the Software is furnished to do so,
11 * subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22 * OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
33// ----------------------------------------------------------------------------
34
35#ifndef FLASH5_H
36#define FLASH5_H
37
38#include "drv_digital_out.h"
39#include "drv_digital_in.h"
40#include "drv_spi_master.h"
41
42// -------------------------------------------------------------- PUBLIC MACROS
53#define FLASH5_MAP_MIKROBUS( cfg, mikrobus ) \
54 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
55 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
56 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
57 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
58 cfg.wp = MIKROBUS( mikrobus, MIKROBUS_RST ); \
59 cfg.hld = MIKROBUS( mikrobus, MIKROBUS_PWM );
66#define FLASH5_RETVAL uint8_t
67
68#define FLASH5_OK 0x00
69#define FLASH5_INIT_ERROR 0xFF
76#define FLASH5_MAX_addr 0xFFFF
77#define FLASH5_PAGESIZE 2048
84#define FLASH5_CMD_RESET 0xFF
85#define FLASH5_CMD_DEVICE_ID 0x9F
86#define FLASH5_CMD_READ_REG_STATUS1 0x05
87#define FLASH5_CMD_READ_REG_STATUS2 0x0F
88#define FLASH5_CMD_WRITE_REG_STATUS1 0x01
89#define FLASH5_CMD_WRITE_REG_STATUS2 0x1F
90#define FLASH5_CMD_WRITE_ENABLE 0x06
91#define FLASH5_CMD_WRITE_DISABLE 0x04
92#define FLASH5_CMD_BAD_BLOCK_MANAGE 0xA1
93#define FLASH5_CMD_READ_BBM_TABLE 0xA5
94#define FLASH5_CMD_LAST_ECC_FAIL_PAGE 0xA9
95#define FLASH5_CMD_BLOCK_ERASE 0xD8
96#define FLASH5_CMD_LOAD_DATA 0x02
97#define FLASH5_CMD__RND_LOAD_DATA 0x84
98#define FLASH5_CMD_QUAD_LOAD_DATA 0x32
99#define FLASH5_CMD_QUAD_RND_LOAD_DATA 0x34
100#define FLASH5_CMD_EXECUTE 0x10
101#define FLASH5_CMD_PAGE_READ_DATA 0x13
102#define FLASH5_CMD_READ_DATA 0x03
103#define FLASH5_CMD_FAST_READ 0x0B
104#define FLASH5_CMD_FAST_READ_4BYTE_addr 0x0C
105#define FLASH5_CMD_FAST_READ_DUAL_OUT 0x3B
106#define FLASH5_CMD_FAST_READ_DUAL_OUT_4BYTE_addr 0x3C
107#define FLASH5_CMD_FAST_READ_QUAD_OUT 0x6B
108#define FLASH5_CMD_FAST_READ_QUAD_OUT_4BYTE_addr 0x6C
109#define FLASH5_CMD_FAST_READ_DUAL_IO 0xBB
110#define FLASH5_CMD_FAST_READ_IO_4BYTE_addr 0xBC
111#define FLASH5_CMD_FAST_READ_QUAD_IO 0xEB
112#define FLASH5_CMD_FAST_READ_QUAD_IO_4BYTE_addr 0xEC
119#define FLASH5_REG_STATUS_1 0xA0
120#define FLASH5_REG_STATUS_2 0xB0
121#define FLASH5_REG_STATUS_3 0xC0
128#define FLASH5_RS1_WRITE_PROTECTION_ENABLE 0x02
129#define FLASH5_RS1_WRITE_PROTECTION_DISABLE 0x00
130#define FLASH5_RS1_SRP1_ENABLE 0x01
131#define FLASH5_RS1_SRP2_ENABLE 0x80
138#define FLASH5_RS2_PAGE_READ_MODE 0x08
139#define FLASH5_RS2_PAGE_CONTINOUS_READ_MODE 0x00
140#define FLASH5_RS2_ECC_ENABLED 0x10
141#define FLASH5_RS2_ECC_DISABLED 0x10
142#define FLASH5_RS2_OTP_LOCK 0x80
143#define FLASH5_RS2_OTP_ACCESS 0x40
144#define FLASH5_RS2_REG_STATUS_1_LOCK 0x20
151#define FLASH5_DEVICE_OK 0xFF
152#define FLASH5_DEVICE_ERROR 0xAA
159#define FLASH5_PIN_STATUS_HIGH 1
160#define FLASH5_PIN_STATUS_LOW 0 // End group macro
164// --------------------------------------------------------------- PUBLIC TYPES
173typedef struct
174{
175 // Output pins
176
177 digital_out_t cs;
178 digital_out_t wp;
179 digital_out_t hld;
180
181 // Modules
182
183 spi_master_t spi;
184 pin_name_t chip_select;
185
186} flash5_t;
187
191typedef struct
192{
193 // Communication gpio pins
194
195 pin_name_t miso;
196 pin_name_t mosi;
197 pin_name_t sck;
198 pin_name_t cs;
199
200 // Additional gpio pins
201
202 pin_name_t wp;
203 pin_name_t hld;
204
205 // static variable
206
207 uint32_t spi_speed;
208 spi_master_mode_t spi_mode;
209 spi_master_chip_select_polarity_t cs_polarity;
210
212 // End types group
214// ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
215
220#ifdef __cplusplus
221extern "C"{
222#endif
223
233
243
255void flash5_generic_transfer ( flash5_t *ctx, uint8_t *wr_buf,
256 uint16_t wr_len, uint8_t *rd_buf, uint16_t rd_len );
257
266void flash5_read_data ( flash5_t *ctx, uint8_t reg_addr, uint8_t *data_buf, uint16_t n_buf_size );
267
276void flash5_write_data ( flash5_t *ctx, uint8_t reg_addr, uint8_t *data_buf, uint16_t n_buf_size );
277
284void flash5_send_cmd ( flash5_t *ctx, uint8_t cmd_data );
285
294uint8_t flash5_set_wp_pin ( flash5_t *ctx, uint8_t status );
295
304uint8_t flash5_set_hold_pin ( flash5_t *ctx, uint8_t status );
305
314
321void flash5_page_read ( flash5_t *ctx, uint16_t page_num );
322
329void flash5_execute_load ( flash5_t *ctx, uint16_t page_num );
330
339void flash5_page_read_memory ( flash5_t *ctx, uint16_t column_addr, uint8_t *data_buf, uint16_t buf_size );
340
350void flash5_continous_read_memory ( flash5_t *ctx, uint8_t *data_buf, uint16_t buf_size );
351
360void flash5_page_load_memory ( flash5_t *ctx, uint16_t column_addr, uint8_t *data_buf, uint16_t buf_size );
361
371uint8_t flash5_read_status_data ( flash5_t *ctx, uint8_t status_cmd, uint8_t status_addr );
372
381void flash5_write_status_data ( flash5_t *ctx, uint8_t status_cmd, uint8_t status_addr, uint8_t status_data );
382
389
396void flash5_erase_page_data ( flash5_t *ctx, uint16_t page_addr );
397
398#ifdef __cplusplus
399}
400#endif
401#endif // _FLASH5_H_
402 // End public_function group
405
406// ------------------------------------------------------------------------- END
#define FLASH5_RETVAL
Definition: flash5.h:66
void flash5_page_read(flash5_t *ctx, uint16_t page_num)
Function for setting page read.
void flash5_execute_load(flash5_t *ctx, uint16_t page_num)
Function for executing page load.
void flash5_erase_page_data(flash5_t *ctx, uint16_t page_addr)
Function for eraseing one page.
void flash5_write_data(flash5_t *ctx, uint8_t reg_addr, uint8_t *data_buf, uint16_t n_buf_size)
Generic funcion for writing.
void flash5_page_load_memory(flash5_t *ctx, uint16_t column_addr, uint8_t *data_buf, uint16_t buf_size)
Function for loading one page.
void flash5_read_data(flash5_t *ctx, uint8_t reg_addr, uint8_t *data_buf, uint16_t n_buf_size)
Generic funcion for reading.
void flash5_send_cmd(flash5_t *ctx, uint8_t cmd_data)
Function for sending one Byte od data.
uint8_t flash5_set_hold_pin(flash5_t *ctx, uint8_t status)
Sets hold pin to one state.
void flash5_generic_transfer(flash5_t *ctx, uint8_t *wr_buf, uint16_t wr_len, uint8_t *rd_buf, uint16_t rd_len)
Generic transfer function.
uint8_t flash5_set_wp_pin(flash5_t *ctx, uint8_t status)
Sets wp pin to one state.
void flash5_cfg_setup(flash5_cfg_t *cfg)
Config Object Initialization function.
void flash5_continous_read_memory(flash5_t *ctx, uint8_t *data_buf, uint16_t buf_size)
Function for continous reading.
uint8_t flash5_read_status_data(flash5_t *ctx, uint8_t status_cmd, uint8_t status_addr)
Function for reading status data.
void flash5_software_reset(flash5_t *ctx)
Function for reseting device.
uint8_t flash5_device_id_check(flash5_t *ctx)
Funcion for checking device id.
void flash5_page_read_memory(flash5_t *ctx, uint16_t column_addr, uint8_t *data_buf, uint16_t buf_size)
Function for reading one page.
void flash5_write_status_data(flash5_t *ctx, uint8_t status_cmd, uint8_t status_addr, uint8_t status_data)
Function for writing status data.
FLASH5_RETVAL flash5_init(flash5_t *ctx, flash5_cfg_t *cfg)
Initialization function.
Click configuration structure definition.
Definition: flash5.h:192
pin_name_t hld
Definition: flash5.h:203
spi_master_chip_select_polarity_t cs_polarity
Definition: flash5.h:209
pin_name_t sck
Definition: flash5.h:197
spi_master_mode_t spi_mode
Definition: flash5.h:208
pin_name_t mosi
Definition: flash5.h:196
uint32_t spi_speed
Definition: flash5.h:207
pin_name_t wp
Definition: flash5.h:202
pin_name_t miso
Definition: flash5.h:195
pin_name_t cs
Definition: flash5.h:198
Click ctx object definition.
Definition: flash5.h:174
digital_out_t cs
Definition: flash5.h:177
digital_out_t hld
Definition: flash5.h:179
spi_master_t spi
Definition: flash5.h:183
pin_name_t chip_select
Definition: flash5.h:184
digital_out_t wp
Definition: flash5.h:178