vreg2  2.0.0.0
vreg2.h
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1 /*
2  * MikroSDK - MikroE Software Development Kit
3  * Copyright (c) 2019, MikroElektronika - www.mikroe.com
4  * All rights reserved.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
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10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
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17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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24 
33 // ----------------------------------------------------------------------------
34 
35 #ifndef VREG2_H
36 #define VREG2_H
37 
38 #include "drv_digital_out.h"
39 #include "drv_digital_in.h"
40 #include "drv_pwm.h"
41 
42 // -------------------------------------------------------------- PUBLIC MACROS
52 #define VREG2_MAP_MIKROBUS( cfg, mikrobus ) \
53  cfg.pwm = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
54  cfg.an = MIKROBUS( mikrobus, MIKROBUS_AN )
55 
61 #define VREG2_RETVAL uint8_t
62 
63 #define VREG2_OK 0x00
64 #define VREG2_INIT_ERROR 0xFF
65 
71 #define VREG2_DEF_FREQ 20000
72  // End group macro
75 // --------------------------------------------------------------- PUBLIC TYPES
84 typedef struct
85 {
86  // Input pins
87 
88  digital_in_t an;
89 
90  // Modules
91 
92  pwm_t pwm;
93 
94  // ctx variable
95 
96  uint16_t pwm_period;
97  hal_tim_frequency_t pwm_freq;
98 
99 } vreg2_t;
100 
104 typedef struct
105 {
106  // Communication gpio pins
107 
108  pin_name_t pwm;
109 
110  // Additional gpio pins
111 
112  pin_name_t an;
113 
114  // static variable
115 
116  hal_base_addr_t dev_pwm_base;
117  hal_tim_channel_t dev_pwm_channel;
118  hal_tim_output_polarity_t dev_pwm_polarity;
119  hal_tim_frequency_t dev_pwm_freq;
120 
121 } vreg2_cfg_t;
122  // End types group
124 // ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
125 
131 #ifdef __cplusplus
132 extern "C"{
133 #endif
134 
143 void vreg2_cfg_setup ( vreg2_cfg_t *cfg );
144 
153 
161 void vreg2_default_cfg ( vreg2_t *ctx );
162 
172 void vreg2_set_duty_cycle ( vreg2_t *ctx, pwm_data_t duty_cycle );
173 
181 void vreg2_pwm_stop ( vreg2_t *ctx );
182 
190 void vreg2_pwm_start ( vreg2_t *ctx );
191 
192 #ifdef __cplusplus
193 }
194 #endif
195 #endif // _VREG2_H_
196  // End public_function group
199 
200 // ------------------------------------------------------------------------- END
VREG2_RETVAL vreg2_init(vreg2_t *ctx, vreg2_cfg_t *cfg)
Initialization function.
pwm_t pwm
Definition: vreg2.h:92
void vreg2_set_duty_cycle(vreg2_t *ctx, pwm_data_t duty_cycle)
Generic sets PWM duty cycle.
#define VREG2_RETVAL
Definition: vreg2.h:61
hal_tim_frequency_t pwm_freq
Definition: vreg2.h:97
void vreg2_default_cfg(vreg2_t *ctx)
Click Default Configuration function.
Click configuration structure definition.
Definition: vreg2.h:104
hal_tim_frequency_t dev_pwm_freq
Definition: vreg2.h:119
void vreg2_pwm_start(vreg2_t *ctx)
Start PWM module.
pin_name_t an
Definition: vreg2.h:112
void vreg2_pwm_stop(vreg2_t *ctx)
Stop PWM module.
hal_tim_output_polarity_t dev_pwm_polarity
Definition: vreg2.h:118
void vreg2_cfg_setup(vreg2_cfg_t *cfg)
Config Object Initialization function.
pin_name_t pwm
Definition: vreg2.h:108
uint16_t pwm_period
Definition: vreg2.h:96
Click ctx object definition.
Definition: vreg2.h:84
hal_base_addr_t dev_pwm_base
Definition: vreg2.h:116
hal_tim_channel_t dev_pwm_channel
Definition: vreg2.h:117
digital_in_t an
Definition: vreg2.h:88