sram 2.0.0.0
sram.h
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1/*
2 * MikroSDK - MikroE Software Development Kit
3 * Copyright© 2020 MikroElektronika d.o.o.
4 *
5 * Permission is hereby granted, free of charge, to any person
6 * obtaining a copy of this software and associated documentation
7 * files (the "Software"), to deal in the Software without restriction,
8 * including without limitation the rights to use, copy, modify, merge,
9 * publish, distribute, sublicense, and/or sell copies of the Software,
10 * and to permit persons to whom the Software is furnished to do so,
11 * subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22 * OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
33// ----------------------------------------------------------------------------
34
35#ifndef SRAM_H
36#define SRAM_H
37
38#include "drv_digital_out.h"
39#include "drv_digital_in.h"
40#include "drv_spi_master.h"
41
42// -------------------------------------------------------------- PUBLIC MACROS
53#define SRAM_MAP_MIKROBUS( cfg, mikrobus ) \
54 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
55 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
56 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
57 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
58 cfg.hld = MIKROBUS( mikrobus, MIKROBUS_RST )
65#define SRAM_RETVAL uint8_t
66
67#define SRAM_OK 0x00
68#define SRAM_INIT_ERROR 0xFF
75#define SRAM_CMD_WRMR 0x01
76#define SRAM_CMD_WRITE 0x02
77#define SRAM_CMD_READ 0x03
78#define SRAM_CMD_RDMR 0x05
79#define SRAM_CMD_EQIO 0x38
80#define SRAM_CMD_EDIO 0x3B
81#define SRAM_CMD_RSTIO 0xFF
88#define SRAM_MODE_REG_BM 0x00
89#define SRAM_MODE_REG_PM 0x80
90#define SRAM_MODE_REG_SM 0x40 // End group macro
94// --------------------------------------------------------------- PUBLIC TYPES
103typedef struct
104{
105 // Output pins
106
107 digital_out_t hld;
108 digital_out_t cs;
109
110 // Modules
111
112 spi_master_t spi;
113 pin_name_t chip_select;
114
115} sram_t;
116
120typedef struct
121{
122 // Communication gpio pins
123
124 pin_name_t miso;
125 pin_name_t mosi;
126 pin_name_t sck;
127 pin_name_t cs;
128
129 // Additional gpio pins
130
131 pin_name_t hld;
132
133 // static variable
134
135 uint32_t spi_speed;
136 uint8_t spi_mode;
137 spi_master_chip_select_polarity_t cs_polarity;
138
139} sram_cfg_t;
140 // End types group
142
143// ------------------------------------------------------------------ CONSTANTS // End constants group
151
152// ------------------------------------------------------------------ VARIABLES // End variable group
160
161// ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
162
167#ifdef __cplusplus
168extern "C"{
169#endif
170
180
190
203(
204 sram_t *ctx,
205 uint8_t *wr_buf,
206 uint16_t wr_len,
207 uint8_t *rd_buf,
208 uint16_t rd_len
209);
210
221(
222 sram_t *ctx,
223 uint8_t *wr_buf,
224 uint16_t wr_len
225);
226
236void sram_write_byte( sram_t *ctx, uint32_t reg_address, uint8_t write_data );
237
246uint8_t sram_read_byte( sram_t *ctx, uint32_t reg_address );
247
256void sram_write_mode_reg_ins ( sram_t *ctx, uint8_t ins_data );
257
266
275
284
285#ifdef __cplusplus
286}
287#endif
288#endif // _SRAM_H_
289 // End public_function group
292
293// ------------------------------------------------------------------------- END
#define SRAM_RETVAL
Definition: sram.h:65
void sram_generic_transfer(sram_t *ctx, uint8_t *wr_buf, uint16_t wr_len, uint8_t *rd_buf, uint16_t rd_len)
Generic transfer function.
SRAM_RETVAL sram_init(sram_t *ctx, sram_cfg_t *cfg)
Initialization function.
void sram_soft_reset(sram_t *ctx)
Soft reset funcion.
uint8_t sram_read_mode_reg_ins(sram_t *ctx)
Read mode register instruction funcion.
void sram_write_byte(sram_t *ctx, uint32_t reg_address, uint8_t write_data)
Generic write byte of data funcion.
void sram_cfg_setup(sram_cfg_t *cfg)
Config Object Initialization function.
void sram_generic_write(sram_t *ctx, uint8_t *wr_buf, uint16_t wr_len)
Generic write function.
uint8_t sram_read_byte(sram_t *ctx, uint32_t reg_address)
Generic read byte of data funcion.
void sram_hold_transmission(sram_t *ctx)
Suspend transmission funcion.
void sram_write_mode_reg_ins(sram_t *ctx, uint8_t ins_data)
Write mode register instruction funcion.
Click configuration structure definition.
Definition: sram.h:121
uint8_t spi_mode
Definition: sram.h:136
pin_name_t hld
Definition: sram.h:131
spi_master_chip_select_polarity_t cs_polarity
Definition: sram.h:137
pin_name_t sck
Definition: sram.h:126
pin_name_t mosi
Definition: sram.h:125
uint32_t spi_speed
Definition: sram.h:135
pin_name_t miso
Definition: sram.h:124
pin_name_t cs
Definition: sram.h:127
Click ctx object definition.
Definition: sram.h:104
digital_out_t cs
Definition: sram.h:108
digital_out_t hld
Definition: sram.h:107
spi_master_t spi
Definition: sram.h:112
pin_name_t chip_select
Definition: sram.h:113