c3dhall3  2.0.0.0
c3dhall3.h
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1 /*
2  * MikroSDK - MikroE Software Development Kit
3  * Copyright© 2020 MikroElektronika d.o.o.
4  *
5  * Permission is hereby granted, free of charge, to any person
6  * obtaining a copy of this software and associated documentation
7  * files (the "Software"), to deal in the Software without restriction,
8  * including without limitation the rights to use, copy, modify, merge,
9  * publish, distribute, sublicense, and/or sell copies of the Software,
10  * and to permit persons to whom the Software is furnished to do so,
11  * subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be
14  * included in all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19  * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22  * OR OTHER DEALINGS IN THE SOFTWARE.
23  */
24 
33 // ----------------------------------------------------------------------------
34 
35 #ifndef C3DHALL3_H
36 #define C3DHALL3_H
37 
42 #ifdef PREINIT_SUPPORTED
43 #include "preinit.h"
44 #endif
45 
46 #ifdef MikroCCoreVersion
47  #if MikroCCoreVersion >= 1
48  #include "delays.h"
49  #endif
50 #endif
51 
52 #include "drv_digital_out.h"
53 #include "drv_digital_in.h"
54 #include "drv_i2c_master.h"
55 #include "drv_spi_master.h"
56 
57 // -------------------------------------------------------------- PUBLIC MACROS
68 #define C3DHALL3_MAP_MIKROBUS( cfg, mikrobus ) \
69  cfg.scl = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
70  cfg.sda = MIKROBUS( mikrobus, MIKROBUS_SDA ); \
71  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
72  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
73  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
74  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
75  cfg.ccs = MIKROBUS( mikrobus, MIKROBUS_RST ); \
76  cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT );
77 
83 #define C3DHALL3_MASTER_I2C 0
84 #define C3DHALL3_MASTER_SPI 1
85 
91 #define C3DHALL3_RETVAL uint8_t
92 
93 #define C3DHALL3_OK 0x00
94 #define C3DHALL3_INIT_ERROR 0xFF
95 
101 #define C3DHALL3_OFFSET_X_REG_L 0x45
102 #define C3DHALL3_OFFSET_Y_REG_L 0x47
103 #define C3DHALL3_OFFSET_Z_REG_L 0x49
104 #define C3DHALL3_INT_CRTL 0x63
105 #define C3DHALL3_INT_SOURCE 0x64
106 #define C3DHALL3_INT_THS_L 0x65
107 #define C3DHALL3_STATUS 0x67
108 #define C3DHALL3_OUTX_L 0x68
109 #define C3DHALL3_OUTY_L 0x6A
110 #define C3DHALL3_OUTZ_L 0x6C
111 #define C3DHALL3_CONFIGURATION_REGISTER_A 0x60
112 #define C3DHALL3_CONFIGURATION_REGISTER_B 0x61
113 #define C3DHALL3_CONFIGURATION_REGISTER_C 0x62
114 #define C3DHALL3_INTERRUPT_CONTROL 0x63
115 #define C3DHALL3_TEMPERATURE_L 0x6E
116 #define C3DHALL3_TEMPERATURE_H 0x6F
117 
123 #define C3DHALL3_CFGA_TEMPERATURE_COMPENSATION 0x80
124 #define C3DHALL3_CFGA_REBOOT_MEMORY 0x40
125 #define C3DHALL3_CFGA_SOFT_RESET 0x20
126 #define C3DHALL3_CFGA_LOW_POWER_MODE 0x10
127 #define C3DHALL3_CFGA_OUTPUT_DATA_RATE_10 0x00
128 #define C3DHALL3_CFGA_OUTPUT_DATA_RATE_20 0x04
129 #define C3DHALL3_CFGA_OUTPUT_DATA_RATE_50 0x08
130 #define C3DHALL3_CFGA_OUTPUT_DATA_RATE_100 0x0C
131 #define C3DHALL3_CFGA_MODE_CONTINIOUS 0x00
132 #define C3DHALL3_CFGA_MODE_SINGLE 0x01
133 #define C3DHALL3_CFGA_MODE_IDLE 0x02
134 #define C3DHALL3_CFGA_MODE_IDLE_DEFAULT 0x03
135 
140 #define C3DHALL3_CFGB_OFFSET_CANCELLATION_SINGLE_MODE 0x10
141 #define C3DHALL3_CFGB_INT_ON_DATAOFF 0x08
142 #define C3DHALL3_CFGB_SET_PULSE_FREQUENCY_EVERY_63_ODR 0x00
143 #define C3DHALL3_CFGB_SET_PULSE_FREQUENCY_AFTER_PD 0x04
144 #define C3DHALL3_CFGB_OFFSET_CANCELLATION 0x02
145 #define C3DHALL3_CFGB_LOW_PASS_FILTER_ODR_2 0x00
146 #define C3DHALL3_CFGB_LOW_PASS_FILTER_ODR_4 0x01
147 
153 #define C3DHALL3_CFGC_INTERRUPT_ON_INT 0x40
154 #define C3DHALL3_CFGC_I2C_DISABLE 0x20
155 #define C3DHALL3_CFGC_ASYNC_DATA_READ 0x10
156 #define C3DHALL3_CFGC_DATA_INVERT 0x08
157 #define C3DHALL3_CFGC_SELF_TEST 0x02
158 #define C3DHALL3_CFGC_DATA_READY_ON_INT 0x01
159 
165 #define C3DHALL3_INTCTRL_INTERRUPT_ON_X_AXIS 0x80
166 #define C3DHALL3_INTCTRL_INTERRUPT_ON_Y_AXIS 0x40
167 #define C3DHALL3_INTCTRL_INTERRUPT_ON_Z_AXIS 0x20
168 #define C3DHALL3_INTCTRL_INTERRUPT_POLARITY_LOW 0x00
169 #define C3DHALL3_INTCTRL_INTERRUPT_POLARITY_HIGH 0x40
170 #define C3DHALL3_INTCTRL_INTERRUPT_BIT_LATCHED 0x00
171 #define C3DHALL3_INTCTRL_INTERRUPT_BIT_PULSED 0x20
172 #define C3DHALL3_INTCTRL_INTERRUPT_ENABLE 0x01
173  // End group macro
175 // --------------------------------------------------------------- PUBLIC TYPES
184 typedef uint8_t c3dhall3_select_t;
185 
189 typedef void ( *c3dhall3_master_io_t )( struct c3dhall3_s*, uint8_t, uint8_t*, uint8_t );
190 
194 typedef struct c3dhall3_s
195 {
196  // Output pins
197 
198  digital_out_t ccs;
199  digital_out_t cs;
200 
201  // Input pins
202 
203  digital_in_t int_pin;
204 
205  // Modules
206 
207  i2c_master_t i2c;
208  spi_master_t spi;
209 
210  // ctx variable
211 
212  uint8_t slave_address;
213  pin_name_t chip_select;
217 
219 
223 typedef struct
224 {
225  // Communication gpio pins
226 
227  pin_name_t scl;
228  pin_name_t sda;
229  pin_name_t miso;
230  pin_name_t mosi;
231  pin_name_t sck;
232  pin_name_t cs;
233 
234  // Additional gpio pins
235 
236  pin_name_t ccs;
237  pin_name_t int_pin;
238 
239  // static variable
240 
241  uint32_t i2c_speed;
242  uint8_t i2c_address;
243  uint32_t spi_speed;
244  uint8_t spi_mode;
245  spi_master_chip_select_polarity_t cs_polarity;
246 
248 
250 
251 // ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
257 #ifdef __cplusplus
258 extern "C"{
259 #endif
260 
270 
279 
288 
299 void c3dhall3_generic_write ( c3dhall3_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len );
300 
311 void c3dhall3_generic_read ( c3dhall3_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len );
312 
321 
329 int16_t c3dhall3_read_x ( c3dhall3_t *ctx );
330 
338 int16_t c3dhall3_read_y ( c3dhall3_t *ctx );
339 
347 int16_t c3dhall3_read_z ( c3dhall3_t *ctx );
348 
357 void c3dhall3_read_xyz ( c3dhall3_t *ctx, int16_t *out_xyz );
358 
368 void c3dhall3_write_offset (c3dhall3_t *ctx, uint8_t axis, uint16_t offset );
369 
378 
387 void c3dhall3_interrupt_threshold ( c3dhall3_t *ctx, uint16_t threshold );
388 
397 #ifdef __cplusplus
398 }
399 #endif
400 #endif // _C3DHALL3_H_
401  // End public_function group
404 
405 // ------------------------------------------------------------------------- END
c3dhall3_cfg_t::i2c_address
uint8_t i2c_address
Definition: c3dhall3.h:242
c3dhall3_default_cfg
void c3dhall3_default_cfg(c3dhall3_t *ctx)
Click Default Configuration function.
c3dhall3_s::master_sel
c3dhall3_select_t master_sel
Definition: c3dhall3.h:216
c3dhall3_s::i2c
i2c_master_t i2c
Definition: c3dhall3.h:207
c3dhall3_read_y
int16_t c3dhall3_read_y(c3dhall3_t *ctx)
Read Y value.
c3dhall3_s::slave_address
uint8_t slave_address
Definition: c3dhall3.h:212
c3dhall3_init
C3DHALL3_RETVAL c3dhall3_init(c3dhall3_t *ctx, c3dhall3_cfg_t *cfg)
Initialization function.
c3dhall3_s::ccs
digital_out_t ccs
Definition: c3dhall3.h:198
c3dhall3_t
struct c3dhall3_s c3dhall3_t
Click ctx object definition.
c3dhall3_cfg_t::sck
pin_name_t sck
Definition: c3dhall3.h:231
c3dhall3_s
Click ctx object definition.
Definition: c3dhall3.h:195
c3dhall3_read_status
uint8_t c3dhall3_read_status(c3dhall3_t *ctx)
Read status register.
c3dhall3_cfg_t::int_pin
pin_name_t int_pin
Definition: c3dhall3.h:237
c3dhall3_read_interrupt_source
uint8_t c3dhall3_read_interrupt_source(c3dhall3_t *ctx)
Read interrupt source.
c3dhall3_select_t
uint8_t c3dhall3_select_t
Communication type.
Definition: c3dhall3.h:184
c3dhall3_s::int_pin
digital_in_t int_pin
Definition: c3dhall3.h:203
c3dhall3_s::write_f
c3dhall3_master_io_t write_f
Definition: c3dhall3.h:214
c3dhall3_cfg_t::spi_mode
uint8_t spi_mode
Definition: c3dhall3.h:244
c3dhall3_cfg_t::scl
pin_name_t scl
Definition: c3dhall3.h:227
c3dhall3_cfg_t::i2c_speed
uint32_t i2c_speed
Definition: c3dhall3.h:241
c3dhall3_generic_read
void c3dhall3_generic_read(c3dhall3_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len)
Generic read function.
c3dhall3_cfg_t::spi_speed
uint32_t spi_speed
Definition: c3dhall3.h:243
c3dhall3_cfg_t::sel
c3dhall3_select_t sel
Definition: c3dhall3.h:247
c3dhall3_interrupt_threshold
void c3dhall3_interrupt_threshold(c3dhall3_t *ctx, uint16_t threshold)
Set Interrupt Threshold.
c3dhall3_s::spi
spi_master_t spi
Definition: c3dhall3.h:208
c3dhall3_write_offset
void c3dhall3_write_offset(c3dhall3_t *ctx, uint8_t axis, uint16_t offset)
Write offset value.
c3dhall3_cfg_setup
void c3dhall3_cfg_setup(c3dhall3_cfg_t *cfg)
Config Object Initialization function.
c3dhall3_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: c3dhall3.h:245
c3dhall3_s::read_f
c3dhall3_master_io_t read_f
Definition: c3dhall3.h:215
c3dhall3_cfg_t
Click configuration structure definition.
Definition: c3dhall3.h:224
c3dhall3_cfg_t::sda
pin_name_t sda
Definition: c3dhall3.h:228
c3dhall3_master_io_t
void(* c3dhall3_master_io_t)(struct c3dhall3_s *, uint8_t, uint8_t *, uint8_t)
Master Input/Output type.
Definition: c3dhall3.h:189
c3dhall3_s::chip_select
pin_name_t chip_select
Definition: c3dhall3.h:213
c3dhall3_read_z
int16_t c3dhall3_read_z(c3dhall3_t *ctx)
Read Z value.
c3dhall3_generic_write
void c3dhall3_generic_write(c3dhall3_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len)
Generic write function.
C3DHALL3_RETVAL
#define C3DHALL3_RETVAL
Definition: c3dhall3.h:91
c3dhall3_cfg_t::mosi
pin_name_t mosi
Definition: c3dhall3.h:230
c3dhall3_check_int_pin
uint8_t c3dhall3_check_int_pin(c3dhall3_t *ctx)
Check status of the int pin.
c3dhall3_read_x
int16_t c3dhall3_read_x(c3dhall3_t *ctx)
Read X value.
c3dhall3_cfg_t::cs
pin_name_t cs
Definition: c3dhall3.h:232
c3dhall3_read_xyz
void c3dhall3_read_xyz(c3dhall3_t *ctx, int16_t *out_xyz)
Read XYZ value.
c3dhall3_cfg_t::miso
pin_name_t miso
Definition: c3dhall3.h:229
c3dhall3_s::cs
digital_out_t cs
Definition: c3dhall3.h:199
c3dhall3_cfg_t::ccs
pin_name_t ccs
Definition: c3dhall3.h:236