c3dhall7 2.0.0.0
c3dhall7.h
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1/*
2 * MikroSDK - MikroE Software Development Kit
3 * Copyright© 2020 MikroElektronika d.o.o.
4 *
5 * Permission is hereby granted, free of charge, to any person
6 * obtaining a copy of this software and associated documentation
7 * files (the "Software"), to deal in the Software without restriction,
8 * including without limitation the rights to use, copy, modify, merge,
9 * publish, distribute, sublicense, and/or sell copies of the Software,
10 * and to permit persons to whom the Software is furnished to do so,
11 * subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22 * OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
33// ----------------------------------------------------------------------------
34
35#ifndef C3DHALL7_H
36#define C3DHALL7_H
37
38#include "drv_digital_out.h"
39#include "drv_digital_in.h"
40#include "drv_i2c_master.h"
41#include "drv_spi_master.h"
42
43// -------------------------------------------------------------- PUBLIC MACROS
54#define C3DHALL7_MAP_MIKROBUS( cfg, mikrobus ) \
55 cfg.scl = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
56 cfg.sda = MIKROBUS( mikrobus, MIKROBUS_SDA ); \
57 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
58 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
59 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
60 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
61 cfg.it2 = MIKROBUS( mikrobus, MIKROBUS_AN ); \
62 cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
63 cfg.it1 = MIKROBUS( mikrobus, MIKROBUS_INT );
70#define C3DHALL7_MASTER_I2C 0
71#define C3DHALL7_MASTER_SPI 1
78#define C3DHALL7_RETVAL uint8_t
79
80#define C3DHALL7_OK 0x00
81#define C3DHALL7_INIT_ERROR 0xFF
88#define C3DHALL7_REG_DEVICE_ID 0x00
89#define C3DHALL7_REG_STATUS 0x10
90#define C3DHALL7_REG_ST_AXIS_X 0x11
91#define C3DHALL7_REG_ST_AXIS_Y 0x12
92#define C3DHALL7_REG_ST_AXIS_X_Y 0x13
93#define C3DHALL7_REG_ST_AXIS_Z 0x14
94#define C3DHALL7_REG_ST_AXIS_X_Z 0x15
95#define C3DHALL7_REG_ST_AXIS_Y_Z 0x16
96#define C3DHALL7_REG_ST_AXIS_X_Y_Z 0x17
97#define C3DHALL7_REG_STATUS_UP8 0x18
98#define C3DHALL7_REG_STUP8_AXIS_X 0x19
99#define C3DHALL7_REG_STUP8_AXIS_Y 0x1A
100#define C3DHALL7_REG_STUP8_AXIS_X_Y 0x1B
101#define C3DHALL7_REG_ST8UP_AXIS_Z 0x1C
102#define C3DHALL7_REG_STUP8_AXIS_X_Z 0x1D
103#define C3DHALL7_REG_STUP8_AXIS_Y_Z 0x1E
104#define C3DHALL7_REG_STUP8_AXIS_X_Y_Z 0x1F
105#define C3DHALL7_REG_INTERRUPT_SETTINGS 0x20
106#define C3DHALL7_REG_SENSOR_SETTINGS 0x21
107#define C3DHALL7_REG_THRESHOLD_1_AXIS_X 0x22
108#define C3DHALL7_REG_THRESHOLD_2_AXIS_X 0x23
109#define C3DHALL7_REG_THRESHOLD_1_AXIS_Y 0x24
110#define C3DHALL7_REG_THRESHOLD_2_AXIS_Y 0x25
111#define C3DHALL7_REG_THRESHOLD_1_AXIS_Z 0x26
112#define C3DHALL7_REG_THRESHOLD_2_AXIS_Z 0x27
113#define C3DHALL7_REG_SOFTWARE_RESET 0x30
114#define C3DHALL7_REG_I2C_DISABLE 0x31
121#define C3DHALL7_INT_DRDY_ENBALE 0x0001
122#define C3DHALL7_INT_DRDY_DISABLE 0x0000
123#define C3DHALL7_INT_SW_X1_ENABLE 0x0002
124#define C3DHALL7_INT_SW_X1_DISABLE 0x0000
125#define C3DHALL7_INT_SW_X2_ENABLE 0x0004
126#define C3DHALL7_INT_SW_X2_DISABLE 0x0000
127#define C3DHALL7_INT_SW_Y1_ENABLE 0x0008
128#define C3DHALL7_INT_SW_Y1_DISABLE 0x0000
129#define C3DHALL7_INT_SW_Y2_ENABLE 0x0010
130#define C3DHALL7_INT_SW_Y2_DISABLE 0x0000
131#define C3DHALL7_INT_SW_Z1_ENABLE 0x0020
132#define C3DHALL7_INT_SW_Z1_DISABLE 0x0000
133#define C3DHALL7_INT_SW_Z2_ENABLE 0x0040
134#define C3DHALL7_INT_SW_Z2_DISABLE 0x0000
135#define C3DHALL7_INT_ERROR_X_Y_ENABLE 0x0080
136#define C3DHALL7_INT_ERROR_X_Y_DISABLE 0x0000
137#define C3DHALL7_INT_ERROR_ADC_ENABLE 0x0100
138#define C3DHALL7_INT_ERROR_ADC_DISABLE 0x0000
139#define C3DHALL7_INT_INTERRUPT_ENABLE 0x0200
140#define C3DHALL7_INT_INTERRUPT_DISABLE 0x0000
141#define C3DHALL7_INT_ODINT_ENABLE 0x0400
142#define C3DHALL7_INT_ODINT_DISABLE 0x0000
149#define C3DHALL7_CTRL_MODE_POWER_DOWN 0x0000
150#define C3DHALL7_CTRL_MODE_SINGLE 0x0001
151#define C3DHALL7_CTRL_MODE_CONTINUOUS_0p25Hz 0x0002
152#define C3DHALL7_CTRL_MODE_CONTINUOUS_0p5Hz 0x0004
153#define C3DHALL7_CTRL_MODE_CONTINUOUS_1Hz 0x0006
154#define C3DHALL7_CTRL_MODE_CONTINUOUS_10Hz 0x0008
155#define C3DHALL7_CTRL_MODE_CONTINUOUS_20Hz 0x000A
156#define C3DHALL7_CTRL_MODE_CONTINUOUS_50Hz 0x000C
157#define C3DHALL7_CTRL_MODE_CONTINUOUS_100Hz 0x000E
158#define C3DHALL7_CTRL_SDR_LOW_NOISE_DRIVE 0x0000
159#define C3DHALL7_CTRL_SDR_LOW_POWER_DRIVE 0x0010
160#define C3DHALL7_CTRL_SMR_HIGH_SENSITIVITY 0x0000
161#define C3DHALL7_CTRL_SMR_WIDE_MEASUREMENT 0x0020
168#define C3DHALL7_DEVICE_ID 0xC0
169#define C3DHALL7_COMPANY_ID 0x48
176#define C3DHALL7_DEVICE_SLAVE_ADDR_VCC 0x0D
177#define C3DHALL7_DEVICE_SLAVE_ADDR_GND 0x0C // End group macro
181// --------------------------------------------------------------- PUBLIC TYPES
190typedef uint8_t c3dhall7_select_t;
191
195typedef void ( *c3dhall7_master_io_t )( struct c3dhall7_s*, uint8_t, uint8_t*, uint8_t );
196
200typedef struct c3dhall7_s
201{
202 // Output pins
203
204 digital_out_t rst;
205 digital_out_t cs;
206
207 // Input pins
208
209 digital_in_t it2;
210 digital_in_t it1;
211
212 // Modules
213
214 i2c_master_t i2c;
215 spi_master_t spi;
216
217 // ctx variable
218
220 pin_name_t chip_select;
224
226
230typedef struct
231{
232 // Communication gpio pins
233
234 pin_name_t scl;
235 pin_name_t sda;
236 pin_name_t miso;
237 pin_name_t mosi;
238 pin_name_t sck;
239 pin_name_t cs;
240
241 // Additional gpio pins
242
243 pin_name_t it2;
244 pin_name_t rst;
245 pin_name_t it1;
246
247 // static variable
248
249 uint32_t i2c_speed;
250 uint8_t i2c_address;
251 uint32_t spi_speed;
252 uint8_t spi_mode;
253
255 spi_master_chip_select_polarity_t cs_polarity;
256
258
259typedef struct
260{
262 uint8_t err_adc;
263 uint8_t err_axis_xy;
264 uint8_t sw_axis_z2;
265 uint8_t sw_axis_z1;
266 uint8_t sw_axis_y2;
267 uint8_t sw_axis_y1;
268 uint8_t sw_axis_x2;
269 uint8_t sw_axis_x1;
270 uint8_t drdy;
271
273
274typedef struct
275{
276 int16_t x;
277 int16_t y;
278 int16_t z;
280
282
283typedef struct
284{
285 uint8_t company_id;
286 uint8_t device_id;
287
289
290typedef struct
291{
292 uint8_t interrupt_1;
293 uint8_t interrupt_2;
294
296 // End types group
298// ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
304#ifdef __cplusplus
305extern "C"{
306#endif
307
317
326
335
346void c3dhall7_generic_write ( c3dhall7_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len );
347
358void c3dhall7_generic_read ( c3dhall7_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len );
359
368
378
387
397void c3dhall7_configuration ( c3dhall7_t *ctx, uint8_t reg, uint16_t data_in);
398
408
418
428
429
430#ifdef __cplusplus
431}
432#endif
433#endif // _C3DHALL7_H_
434 // End public_function group
437
438// ------------------------------------------------------------------------- END
#define C3DHALL7_RETVAL
Definition: c3dhall7.h:78
void c3dhall7_generic_read(c3dhall7_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len)
Generic read function.
C3DHALL7_RETVAL c3dhall7_init(c3dhall7_t *ctx, c3dhall7_cfg_t *cfg)
Initialization function.
void c3dhall7_cfg_setup(c3dhall7_cfg_t *cfg)
Config Object Initialization function.
void c3dhall7_get_interrupt_state(c3dhall7_t *ctx, c3dhall7_int_state_t *state)
Interrupt state function.
void c3dhall7_default_cfg(c3dhall7_t *ctx)
Click Default Configuration function.
void c3dhall7_get_status(c3dhall7_t *ctx, c3dhall7_status_t *status)
Measurement status function.
void c3dhall7_configuration(c3dhall7_t *ctx, uint8_t reg, uint16_t data_in)
Configuration function (for ctrl register).
void c3dhall7_device_info(c3dhall7_t *ctx, c3dhall7_dev_info_t *info)
Device info function.
void c3dhall7_get_axis_data(c3dhall7_t *ctx, c3dhall7_axis_t *axis)
Get Axis data function.
void c3dhall7_device_reset(c3dhall7_t *ctx)
Hardware device reset.
void c3dhall7_generic_write(c3dhall7_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len)
Generic write function.
void c3dhall7_software_reset(c3dhall7_t *ctx)
Software device reset.
uint8_t c3dhall7_select_t
Communication type.
Definition: c3dhall7.h:190
void(* c3dhall7_master_io_t)(struct c3dhall7_s *, uint8_t, uint8_t *, uint8_t)
Master Input/Output type.
Definition: c3dhall7.h:195
struct c3dhall7_s c3dhall7_t
Click ctx object definition.
Definition: c3dhall7.h:275
c3dhall7_status_t status
Definition: c3dhall7.h:279
int16_t z
Definition: c3dhall7.h:278
int16_t x
Definition: c3dhall7.h:276
int16_t y
Definition: c3dhall7.h:277
Click configuration structure definition.
Definition: c3dhall7.h:231
pin_name_t it2
Definition: c3dhall7.h:243
uint8_t spi_mode
Definition: c3dhall7.h:252
c3dhall7_select_t sel
Definition: c3dhall7.h:254
uint32_t i2c_speed
Definition: c3dhall7.h:249
pin_name_t it1
Definition: c3dhall7.h:245
spi_master_chip_select_polarity_t cs_polarity
Definition: c3dhall7.h:255
pin_name_t sck
Definition: c3dhall7.h:238
pin_name_t mosi
Definition: c3dhall7.h:237
uint32_t spi_speed
Definition: c3dhall7.h:251
pin_name_t scl
Definition: c3dhall7.h:234
pin_name_t miso
Definition: c3dhall7.h:236
pin_name_t sda
Definition: c3dhall7.h:235
pin_name_t rst
Definition: c3dhall7.h:244
pin_name_t cs
Definition: c3dhall7.h:239
uint8_t i2c_address
Definition: c3dhall7.h:250
Definition: c3dhall7.h:284
uint8_t company_id
Definition: c3dhall7.h:285
uint8_t device_id
Definition: c3dhall7.h:286
Definition: c3dhall7.h:291
uint8_t interrupt_2
Definition: c3dhall7.h:293
uint8_t interrupt_1
Definition: c3dhall7.h:292
Click ctx object definition.
Definition: c3dhall7.h:201
digital_out_t cs
Definition: c3dhall7.h:205
spi_master_t spi
Definition: c3dhall7.h:215
digital_in_t it2
Definition: c3dhall7.h:209
c3dhall7_master_io_t write_f
Definition: c3dhall7.h:221
c3dhall7_master_io_t read_f
Definition: c3dhall7.h:222
i2c_master_t i2c
Definition: c3dhall7.h:214
digital_out_t rst
Definition: c3dhall7.h:204
uint8_t slave_address
Definition: c3dhall7.h:219
c3dhall7_select_t master_sel
Definition: c3dhall7.h:223
pin_name_t chip_select
Definition: c3dhall7.h:220
digital_in_t it1
Definition: c3dhall7.h:210
Definition: c3dhall7.h:260
uint8_t err_adc
Definition: c3dhall7.h:262
uint8_t sw_axis_y1
Definition: c3dhall7.h:267
uint8_t sw_axis_x2
Definition: c3dhall7.h:268
uint8_t err_axis_xy
Definition: c3dhall7.h:263
uint8_t drdy
Definition: c3dhall7.h:270
uint8_t sw_axis_y2
Definition: c3dhall7.h:266
uint8_t data_overrun
Definition: c3dhall7.h:261
uint8_t sw_axis_z2
Definition: c3dhall7.h:264
uint8_t sw_axis_z1
Definition: c3dhall7.h:265
uint8_t sw_axis_x1
Definition: c3dhall7.h:269