c3dhall7  2.0.0.0
c3dhall7.h
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1 /*
2  * MikroSDK - MikroE Software Development Kit
3  * Copyright© 2020 MikroElektronika d.o.o.
4  *
5  * Permission is hereby granted, free of charge, to any person
6  * obtaining a copy of this software and associated documentation
7  * files (the "Software"), to deal in the Software without restriction,
8  * including without limitation the rights to use, copy, modify, merge,
9  * publish, distribute, sublicense, and/or sell copies of the Software,
10  * and to permit persons to whom the Software is furnished to do so,
11  * subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be
14  * included in all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19  * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22  * OR OTHER DEALINGS IN THE SOFTWARE.
23  */
24 
33 // ----------------------------------------------------------------------------
34 
35 #ifndef C3DHALL7_H
36 #define C3DHALL7_H
37 
38 #include "mikrosdk_version.h"
39 
40 #ifdef __GNUC__
41 #if mikroSDK_GET_VERSION < 20800ul
42 #include "rcu_delays.h"
43 #else
44 #include "delays.h"
45 #endif
46 #endif
47 
48 #include "drv_digital_out.h"
49 #include "drv_digital_in.h"
50 #include "drv_i2c_master.h"
51 #include "drv_spi_master.h"
52 
53 // -------------------------------------------------------------- PUBLIC MACROS
64 #define C3DHALL7_MAP_MIKROBUS( cfg, mikrobus ) \
65  cfg.scl = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
66  cfg.sda = MIKROBUS( mikrobus, MIKROBUS_SDA ); \
67  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
68  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
69  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
70  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
71  cfg.it2 = MIKROBUS( mikrobus, MIKROBUS_AN ); \
72  cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
73  cfg.it1 = MIKROBUS( mikrobus, MIKROBUS_INT );
74 
80 #define C3DHALL7_MASTER_I2C 0
81 #define C3DHALL7_MASTER_SPI 1
82 
88 #define C3DHALL7_RETVAL uint8_t
89 
90 #define C3DHALL7_OK 0x00
91 #define C3DHALL7_INIT_ERROR 0xFF
92 
98 #define C3DHALL7_REG_DEVICE_ID 0x00
99 #define C3DHALL7_REG_STATUS 0x10
100 #define C3DHALL7_REG_ST_AXIS_X 0x11
101 #define C3DHALL7_REG_ST_AXIS_Y 0x12
102 #define C3DHALL7_REG_ST_AXIS_X_Y 0x13
103 #define C3DHALL7_REG_ST_AXIS_Z 0x14
104 #define C3DHALL7_REG_ST_AXIS_X_Z 0x15
105 #define C3DHALL7_REG_ST_AXIS_Y_Z 0x16
106 #define C3DHALL7_REG_ST_AXIS_X_Y_Z 0x17
107 #define C3DHALL7_REG_STATUS_UP8 0x18
108 #define C3DHALL7_REG_STUP8_AXIS_X 0x19
109 #define C3DHALL7_REG_STUP8_AXIS_Y 0x1A
110 #define C3DHALL7_REG_STUP8_AXIS_X_Y 0x1B
111 #define C3DHALL7_REG_ST8UP_AXIS_Z 0x1C
112 #define C3DHALL7_REG_STUP8_AXIS_X_Z 0x1D
113 #define C3DHALL7_REG_STUP8_AXIS_Y_Z 0x1E
114 #define C3DHALL7_REG_STUP8_AXIS_X_Y_Z 0x1F
115 #define C3DHALL7_REG_INTERRUPT_SETTINGS 0x20
116 #define C3DHALL7_REG_SENSOR_SETTINGS 0x21
117 #define C3DHALL7_REG_THRESHOLD_1_AXIS_X 0x22
118 #define C3DHALL7_REG_THRESHOLD_2_AXIS_X 0x23
119 #define C3DHALL7_REG_THRESHOLD_1_AXIS_Y 0x24
120 #define C3DHALL7_REG_THRESHOLD_2_AXIS_Y 0x25
121 #define C3DHALL7_REG_THRESHOLD_1_AXIS_Z 0x26
122 #define C3DHALL7_REG_THRESHOLD_2_AXIS_Z 0x27
123 #define C3DHALL7_REG_SOFTWARE_RESET 0x30
124 #define C3DHALL7_REG_I2C_DISABLE 0x31
125 
131 #define C3DHALL7_INT_DRDY_ENBALE 0x0001
132 #define C3DHALL7_INT_DRDY_DISABLE 0x0000
133 #define C3DHALL7_INT_SW_X1_ENABLE 0x0002
134 #define C3DHALL7_INT_SW_X1_DISABLE 0x0000
135 #define C3DHALL7_INT_SW_X2_ENABLE 0x0004
136 #define C3DHALL7_INT_SW_X2_DISABLE 0x0000
137 #define C3DHALL7_INT_SW_Y1_ENABLE 0x0008
138 #define C3DHALL7_INT_SW_Y1_DISABLE 0x0000
139 #define C3DHALL7_INT_SW_Y2_ENABLE 0x0010
140 #define C3DHALL7_INT_SW_Y2_DISABLE 0x0000
141 #define C3DHALL7_INT_SW_Z1_ENABLE 0x0020
142 #define C3DHALL7_INT_SW_Z1_DISABLE 0x0000
143 #define C3DHALL7_INT_SW_Z2_ENABLE 0x0040
144 #define C3DHALL7_INT_SW_Z2_DISABLE 0x0000
145 #define C3DHALL7_INT_ERROR_X_Y_ENABLE 0x0080
146 #define C3DHALL7_INT_ERROR_X_Y_DISABLE 0x0000
147 #define C3DHALL7_INT_ERROR_ADC_ENABLE 0x0100
148 #define C3DHALL7_INT_ERROR_ADC_DISABLE 0x0000
149 #define C3DHALL7_INT_INTERRUPT_ENABLE 0x0200
150 #define C3DHALL7_INT_INTERRUPT_DISABLE 0x0000
151 #define C3DHALL7_INT_ODINT_ENABLE 0x0400
152 #define C3DHALL7_INT_ODINT_DISABLE 0x0000
153 
159 #define C3DHALL7_CTRL_MODE_POWER_DOWN 0x0000
160 #define C3DHALL7_CTRL_MODE_SINGLE 0x0001
161 #define C3DHALL7_CTRL_MODE_CONTINUOUS_0p25Hz 0x0002
162 #define C3DHALL7_CTRL_MODE_CONTINUOUS_0p5Hz 0x0004
163 #define C3DHALL7_CTRL_MODE_CONTINUOUS_1Hz 0x0006
164 #define C3DHALL7_CTRL_MODE_CONTINUOUS_10Hz 0x0008
165 #define C3DHALL7_CTRL_MODE_CONTINUOUS_20Hz 0x000A
166 #define C3DHALL7_CTRL_MODE_CONTINUOUS_50Hz 0x000C
167 #define C3DHALL7_CTRL_MODE_CONTINUOUS_100Hz 0x000E
168 #define C3DHALL7_CTRL_SDR_LOW_NOISE_DRIVE 0x0000
169 #define C3DHALL7_CTRL_SDR_LOW_POWER_DRIVE 0x0010
170 #define C3DHALL7_CTRL_SMR_HIGH_SENSITIVITY 0x0000
171 #define C3DHALL7_CTRL_SMR_WIDE_MEASUREMENT 0x0020
172 
178 #define C3DHALL7_DEVICE_ID 0xC0
179 #define C3DHALL7_COMPANY_ID 0x48
180 
186 #define C3DHALL7_DEVICE_SLAVE_ADDR_VCC 0x0D
187 #define C3DHALL7_DEVICE_SLAVE_ADDR_GND 0x0C
188  // End group macro
191 // --------------------------------------------------------------- PUBLIC TYPES
200 typedef uint8_t c3dhall7_select_t;
201 
205 typedef void ( *c3dhall7_master_io_t )( struct c3dhall7_s*, uint8_t, uint8_t*, uint8_t );
206 
210 typedef struct c3dhall7_s
211 {
212  // Output pins
213 
214  digital_out_t rst;
215  digital_out_t cs;
216 
217  // Input pins
218 
219  digital_in_t it2;
220  digital_in_t it1;
221 
222  // Modules
223 
224  i2c_master_t i2c;
225  spi_master_t spi;
226 
227  // ctx variable
228 
229  uint8_t slave_address;
230  pin_name_t chip_select;
234 
236 
240 typedef struct
241 {
242  // Communication gpio pins
243 
244  pin_name_t scl;
245  pin_name_t sda;
246  pin_name_t miso;
247  pin_name_t mosi;
248  pin_name_t sck;
249  pin_name_t cs;
250 
251  // Additional gpio pins
252 
253  pin_name_t it2;
254  pin_name_t rst;
255  pin_name_t it1;
256 
257  // static variable
258 
259  uint32_t i2c_speed;
260  uint8_t i2c_address;
261  uint32_t spi_speed;
262  uint8_t spi_mode;
263 
265  spi_master_chip_select_polarity_t cs_polarity;
266 
268 
269 typedef struct
270 {
271  uint8_t data_overrun;
272  uint8_t err_adc;
273  uint8_t err_axis_xy;
274  uint8_t sw_axis_z2;
275  uint8_t sw_axis_z1;
276  uint8_t sw_axis_y2;
277  uint8_t sw_axis_y1;
278  uint8_t sw_axis_x2;
279  uint8_t sw_axis_x1;
280  uint8_t drdy;
281 
283 
284 typedef struct
285 {
286  int16_t x;
287  int16_t y;
288  int16_t z;
290 
292 
293 typedef struct
294 {
295  uint8_t company_id;
296  uint8_t device_id;
297 
299 
300 typedef struct
301 {
302  uint8_t interrupt_1;
303  uint8_t interrupt_2;
304 
306  // End types group
308 // ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
314 #ifdef __cplusplus
315 extern "C"{
316 #endif
317 
327 
336 
345 
356 void c3dhall7_generic_write ( c3dhall7_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len );
357 
368 void c3dhall7_generic_read ( c3dhall7_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len );
369 
378 
388 
397 
407 void c3dhall7_configuration ( c3dhall7_t *ctx, uint8_t reg, uint16_t data_in);
408 
418 
428 
438 
439 
440 #ifdef __cplusplus
441 }
442 #endif
443 #endif // _C3DHALL7_H_
444  // End public_function group
447 
448 // ------------------------------------------------------------------------- END
c3dhall7_s::slave_address
uint8_t slave_address
Definition: c3dhall7.h:229
c3dhall7_axis_t::y
int16_t y
Definition: c3dhall7.h:287
c3dhall7_axis_t::status
c3dhall7_status_t status
Definition: c3dhall7.h:289
c3dhall7_status_t::data_overrun
uint8_t data_overrun
Definition: c3dhall7.h:271
c3dhall7_cfg_t::miso
pin_name_t miso
Definition: c3dhall7.h:246
c3dhall7_generic_write
void c3dhall7_generic_write(c3dhall7_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len)
Generic write function.
c3dhall7_cfg_t::rst
pin_name_t rst
Definition: c3dhall7.h:254
c3dhall7_cfg_t::sck
pin_name_t sck
Definition: c3dhall7.h:248
c3dhall7_cfg_t::sel
c3dhall7_select_t sel
Definition: c3dhall7.h:264
c3dhall7_status_t::sw_axis_y2
uint8_t sw_axis_y2
Definition: c3dhall7.h:276
c3dhall7_status_t
Definition: c3dhall7.h:270
C3DHALL7_RETVAL
#define C3DHALL7_RETVAL
Definition: c3dhall7.h:88
c3dhall7_status_t::sw_axis_y1
uint8_t sw_axis_y1
Definition: c3dhall7.h:277
c3dhall7_dev_info_t::company_id
uint8_t company_id
Definition: c3dhall7.h:295
c3dhall7_device_info
void c3dhall7_device_info(c3dhall7_t *ctx, c3dhall7_dev_info_t *info)
Device info function.
c3dhall7_cfg_t::it1
pin_name_t it1
Definition: c3dhall7.h:255
c3dhall7_int_state_t::interrupt_1
uint8_t interrupt_1
Definition: c3dhall7.h:302
c3dhall7_axis_t::z
int16_t z
Definition: c3dhall7.h:288
c3dhall7_cfg_t::scl
pin_name_t scl
Definition: c3dhall7.h:244
c3dhall7_init
C3DHALL7_RETVAL c3dhall7_init(c3dhall7_t *ctx, c3dhall7_cfg_t *cfg)
Initialization function.
c3dhall7_master_io_t
void(* c3dhall7_master_io_t)(struct c3dhall7_s *, uint8_t, uint8_t *, uint8_t)
Master Input/Output type.
Definition: c3dhall7.h:205
c3dhall7_status_t::err_adc
uint8_t err_adc
Definition: c3dhall7.h:272
c3dhall7_axis_t::x
int16_t x
Definition: c3dhall7.h:286
c3dhall7_cfg_t::spi_speed
uint32_t spi_speed
Definition: c3dhall7.h:261
c3dhall7_s::i2c
i2c_master_t i2c
Definition: c3dhall7.h:224
c3dhall7_int_state_t
Definition: c3dhall7.h:301
c3dhall7_dev_info_t::device_id
uint8_t device_id
Definition: c3dhall7.h:296
c3dhall7_s::spi
spi_master_t spi
Definition: c3dhall7.h:225
c3dhall7_get_axis_data
void c3dhall7_get_axis_data(c3dhall7_t *ctx, c3dhall7_axis_t *axis)
Get Axis data function.
c3dhall7_s
Click ctx object definition.
Definition: c3dhall7.h:211
c3dhall7_software_reset
void c3dhall7_software_reset(c3dhall7_t *ctx)
Software device reset.
c3dhall7_cfg_t::it2
pin_name_t it2
Definition: c3dhall7.h:253
c3dhall7_s::read_f
c3dhall7_master_io_t read_f
Definition: c3dhall7.h:232
c3dhall7_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: c3dhall7.h:265
c3dhall7_s::it1
digital_in_t it1
Definition: c3dhall7.h:220
c3dhall7_status_t::drdy
uint8_t drdy
Definition: c3dhall7.h:280
c3dhall7_cfg_t::spi_mode
uint8_t spi_mode
Definition: c3dhall7.h:262
c3dhall7_select_t
uint8_t c3dhall7_select_t
Communication type.
Definition: c3dhall7.h:200
c3dhall7_cfg_t::i2c_speed
uint32_t i2c_speed
Definition: c3dhall7.h:259
c3dhall7_status_t::sw_axis_x2
uint8_t sw_axis_x2
Definition: c3dhall7.h:278
c3dhall7_cfg_t::sda
pin_name_t sda
Definition: c3dhall7.h:245
c3dhall7_status_t::err_axis_xy
uint8_t err_axis_xy
Definition: c3dhall7.h:273
c3dhall7_status_t::sw_axis_z2
uint8_t sw_axis_z2
Definition: c3dhall7.h:274
c3dhall7_s::master_sel
c3dhall7_select_t master_sel
Definition: c3dhall7.h:233
c3dhall7_cfg_t
Click configuration structure definition.
Definition: c3dhall7.h:241
c3dhall7_cfg_t::mosi
pin_name_t mosi
Definition: c3dhall7.h:247
c3dhall7_cfg_t::cs
pin_name_t cs
Definition: c3dhall7.h:249
c3dhall7_s::it2
digital_in_t it2
Definition: c3dhall7.h:219
c3dhall7_cfg_setup
void c3dhall7_cfg_setup(c3dhall7_cfg_t *cfg)
Config Object Initialization function.
c3dhall7_generic_read
void c3dhall7_generic_read(c3dhall7_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len)
Generic read function.
c3dhall7_configuration
void c3dhall7_configuration(c3dhall7_t *ctx, uint8_t reg, uint16_t data_in)
Configuration function (for ctrl register).
c3dhall7_axis_t
Definition: c3dhall7.h:285
c3dhall7_s::cs
digital_out_t cs
Definition: c3dhall7.h:215
c3dhall7_s::rst
digital_out_t rst
Definition: c3dhall7.h:214
c3dhall7_default_cfg
void c3dhall7_default_cfg(c3dhall7_t *ctx)
Click Default Configuration function.
c3dhall7_status_t::sw_axis_z1
uint8_t sw_axis_z1
Definition: c3dhall7.h:275
c3dhall7_status_t::sw_axis_x1
uint8_t sw_axis_x1
Definition: c3dhall7.h:279
c3dhall7_cfg_t::i2c_address
uint8_t i2c_address
Definition: c3dhall7.h:260
c3dhall7_s::write_f
c3dhall7_master_io_t write_f
Definition: c3dhall7.h:231
c3dhall7_get_interrupt_state
void c3dhall7_get_interrupt_state(c3dhall7_t *ctx, c3dhall7_int_state_t *state)
Interrupt state function.
c3dhall7_device_reset
void c3dhall7_device_reset(c3dhall7_t *ctx)
Hardware device reset.
c3dhall7_get_status
void c3dhall7_get_status(c3dhall7_t *ctx, c3dhall7_status_t *status)
Measurement status function.
c3dhall7_int_state_t::interrupt_2
uint8_t interrupt_2
Definition: c3dhall7.h:303
c3dhall7_dev_info_t
Definition: c3dhall7.h:294
c3dhall7_s::chip_select
pin_name_t chip_select
Definition: c3dhall7.h:230
c3dhall7_t
struct c3dhall7_s c3dhall7_t
Click ctx object definition.