Go to the documentation of this file.
38 #include "drv_digital_out.h"
39 #include "drv_digital_in.h"
40 #include "drv_i2c_master.h"
52 #define I2CTOSPI_MAP_MIKROBUS( cfg, mikrobus ) \
53 cfg.scl = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
54 cfg.sda = MIKROBUS( mikrobus, MIKROBUS_SDA ); \
55 cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
56 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
57 cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
64 #define I2CTOSPI_RETVAL uint8_t
66 #define I2CTOSPI_OK 0x00
67 #define I2CTOSPI_INIT_ERROR 0xFF
74 #define I2CTOSPI_I2C_SLAVE_ADDRESS_0 0x28
75 #define I2CTOSPI_I2C_SLAVE_ADDRESS_1 0x29
76 #define I2CTOSPI_I2C_SLAVE_ADDRESS_2 0x2A
77 #define I2CTOSPI_I2C_SLAVE_ADDRESS_3 0x2B
78 #define I2CTOSPI_I2C_SLAVE_ADDRESS_4 0x2C
79 #define I2CTOSPI_I2C_SLAVE_ADDRESS_5 0x2D
80 #define I2CTOSPI_I2C_SLAVE_ADDRESS_6 0x2E
81 #define I2CTOSPI_I2C_SLAVE_ADDRESS_7 0x2F
88 #define I2CTOSPI_CONFIGURE_SPI 0xF0
89 #define I2CTOSPI_CLEAR_INTERRUPT 0xF1
90 #define I2CTOSPI_IDLE_MODE 0xF2
91 #define I2CTOSPI_GPIO_WRITE 0xF4
92 #define I2CTOSPI_GPIO_READ 0xF5
93 #define I2CTOSPI_GPIO_ENABLE 0xF6
94 #define I2CTOSPI_GPIO_CONFIGURATION 0xF7
101 #define I2CTOSPI_CONFIGURE_SPI_ORDER_MSB_FIRST 0x00
102 #define I2CTOSPI_CONFIGURE_SPI_ORDER_LSB_FIRST 0x20
103 #define I2CTOSPI_CONFIGURE_SPI_MODE_SPICLK_LOW_LEADING_EDGE 0x00
104 #define I2CTOSPI_CONFIGURE_SPI_MODE_SPICLK_LOW_TRAILING_EDGE 0x04
105 #define I2CTOSPI_CONFIGURE_SPI_MODE_SPICLK_HIGH_LEADING_EDGE 0x08
106 #define I2CTOSPI_CONFIGURE_SPI_MODE_SPICLK_HIGH_TRAILING_EDGE 0x0C
107 #define I2CTOSPI_CONFIGURE_SPI_CLOCK_RATE_1843kHz 0x00
108 #define I2CTOSPI_CONFIGURE_SPI_CLOCK_RATE_461kHz 0x01
109 #define I2CTOSPI_CONFIGURE_SPI_CLOCK_RATE_115kHz 0x02
110 #define I2CTOSPI_CONFIGURE_SPI_CLOCK_RATE_58kHz 0x03
117 #define I2CTOSPI_CONFIGURE_GPIO_WRITE_PORT_ENABLE_SS0 0x01
118 #define I2CTOSPI_CONFIGURE_GPIO_WRITE_PORT_ENABLE_SS1 0x02
119 #define I2CTOSPI_CONFIGURE_GPIO_WRITE_PORT_ENABLE_SS2 0x04
120 #define I2CTOSPI_CONFIGURE_GPIO_WRITE_PORT_ENABLE_SS3 0x08
127 #define I2CTOSPI_CONFIGURE_GPIO_READ_PORT_ENABLE_SS0 0x01
128 #define I2CTOSPI_CONFIGURE_GPIO_READ_PORT_ENABLE_SS1 0x02
129 #define I2CTOSPI_CONFIGURE_GPIO_READ_PORT_ENABLE_SS2 0x04
130 #define I2CTOSPI_CONFIGURE_GPIO_READ_PORT_ENABLE_SS3 0x08
137 #define I2CTOSPI_CONFIGURE_GPIO_BIDIRECTIONAL_PORT_ENABLE_SS0 0x01
138 #define I2CTOSPI_CONFIGURE_GPIO_BIDIRECTIONAL_PORT_ENABLE_SS1 0x02
139 #define I2CTOSPI_CONFIGURE_GPIO_BIDIRECTIONAL_PORT_ENABLE_SS2 0x04
140 #define I2CTOSPI_CONFIGURE_GPIO_BIDIRECTIONAL_PORT_ENABLE_SS3 0x08
147 #define I2CTOSPI_CONFIGURE_GPIO_QUASI_BIDIRECTIONAL_SS0 0x00
148 #define I2CTOSPI_CONFIGURE_GPIO_PUSH_PULL_SS0 0x01
149 #define I2CTOSPI_CONFIGURE_GPIO_INPUT_ONLY_SS0 0x02
150 #define I2CTOSPI_CONFIGURE_GPIO_OPEN_DRAIN_SS0 0x03
151 #define I2CTOSPI_CONFIGURE_GPIO_QUASI_BIDIRECTIONAL_SS1 0x00
152 #define I2CTOSPI_CONFIGURE_GPIO_PUSH_PULL_SS1 0x04
153 #define I2CTOSPI_CONFIGURE_GPIO_INPUT_ONLY_SS1 0x08
154 #define I2CTOSPI_CONFIGURE_GPIO_OPEN_DRAIN_SS1 0x0C
155 #define I2CTOSPI_CONFIGURE_GPIO_QUASI_BIDIRECTIONAL_SS2 0x00
156 #define I2CTOSPI_CONFIGURE_GPIO_PUSH_PULL_SS2 0x10
157 #define I2CTOSPI_CONFIGURE_GPIO_INPUT_ONLY_SS2 0x20
158 #define I2CTOSPI_CONFIGURE_GPIO_OPEN_DRAIN_SS2 0x30
159 #define I2CTOSPI_CONFIGURE_GPIO_QUASI_BIDIRECTIONAL_SS3 0x00
160 #define I2CTOSPI_CONFIGURE_GPIO_PUSH_PULL_SS3 0x40
161 #define I2CTOSPI_CONFIGURE_GPIO_INPUT_ONLY_SS3 0x80
162 #define I2CTOSPI_CONFIGURE_GPIO_OPEN_DRAIN_SS3 0xC0
164 #define I2CTOSPI_SLAVEDEVICE_SS0 0x01
165 #define I2CTOSPI_SLAVEDEVICE_SS1 0x02
166 #define I2CTOSPI_SLAVEDEVICE_SS2 0x04
167 #define I2CTOSPI_SLAVEDEVICE_SS3 0x08
169 #define I2CTOSPI_RTC5_COMMAND_WRITE 0x12
170 #define I2CTOSPI_RTC5_COMMAND_READ 0x13
172 #define I2CTOSPI_RTC5_REG_TIME_HUN_OF_SEC 0x00
173 #define I2CTOSPI_RTC5_REG_TIME_SEC 0x01
174 #define I2CTOSPI_RTC5_REG_TIME_MIN 0x02
175 #define I2CTOSPI_RTC5_REG_TIME_HOUR 0x03
176 #define I2CTOSPI_RTC5_REG_TIME_DAY_OF_THE_WEEK 0x04
177 #define I2CTOSPI_RTC5_REG_TIME_DATE_DAY 0x05
178 #define I2CTOSPI_RTC5_REG_TIME_DATE_MONTH 0x06
179 #define I2CTOSPI_RTC5_REG_TIME_DATE_YEAR 0x07
180 #define I2CTOSPI_RTC5_REG_CONFIG 0x08
181 #define I2CTOSPI_RTC5_REG_CALIBRATION 0x09
183 #define I2CTOSPI_RTC5_COMMAND_CLEAR 0x54
184 #define I2CTOSPI_RTC5_COMMAND_ENABLE_COUNTING 0x80
637 #endif // _I2CTOSPI_H_
uint8_t ss3_val
Definition: i2ctospi.h:259
void i2ctospi_write_command(i2ctospi_t *ctx, i2ctospi_spi_t *spi, uint8_t command_data)
Generic write command byte of data function.
uint8_t n_bytes
Definition: i2ctospi.h:249
void i2ctospi_clear_interrupt(i2ctospi_t *ctx)
Clear interrupt function.
uint8_t i2ctospi_get_interrupt(i2ctospi_t *ctx)
Gets state of the interrupt function.
digital_in_t int_pin
Definition: i2ctospi.h:205
pin_name_t cs
Definition: i2ctospi.h:230
uint8_t slave_address
Definition: i2ctospi.h:213
pin_name_t scl
Definition: i2ctospi.h:224
digital_out_t rst
Definition: i2ctospi.h:200
Click gpio object definition.
Definition: i2ctospi.h:257
void i2ctospi_types_gpio(i2ctospi_t *ctx, i2ctospi_gpio_t *gpio)
Enable the pins defined as GPIO function.
digital_out_t cs
Definition: i2ctospi.h:201
void i2ctospi_set_idle_mode(i2ctospi_t *ctx)
Set Idle mode function.
uint8_t slave_device
Definition: i2ctospi.h:246
uint8_t ss1_val
Definition: i2ctospi.h:261
void i2ctospi_write_enable(i2ctospi_t *ctx, uint8_t ss_pin_data)
SPI EEPROM wite enable function.
uint8_t reg_addr
Definition: i2ctospi.h:248
void i2ctospi_default_cfg(i2ctospi_t *ctx)
Click Default Configuration function.
void i2ctospi_hw_reset(i2ctospi_t *ctx)
Hardware reset function.
#define I2CTOSPI_RETVAL
Definition: i2ctospi.h:64
Click configuration structure definition.
Definition: i2ctospi.h:221
uint8_t ss2_val
Definition: i2ctospi.h:260
void i2ctospi_generic_read(i2ctospi_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len)
Generic read function.
i2c_master_t i2c
Definition: i2ctospi.h:209
I2CTOSPI_RETVAL i2ctospi_init(i2ctospi_t *ctx, i2ctospi_cfg_t *cfg)
Initialization function.
uint32_t i2c_speed
Definition: i2ctospi.h:235
void i2ctospi_spi_burst_read(i2ctospi_t *ctx, i2ctospi_spi_t *spi, uint8_t *read_data)
Generic SPI read - single address burst read function.
void i2ctospi_read_buffer_bytes(i2ctospi_t *ctx, i2ctospi_spi_t *spi, uint8_t *read_data)
Generic sequential read from the data buffer function.
void i2ctospi_set_read_state_of_gpio(i2ctospi_t *ctx, uint8_t gpio_state)
Set state of the pins defined as GPIO read function.
pin_name_t sda
Definition: i2ctospi.h:225
void i2ctospi_generic_write(i2ctospi_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len)
Generic write function.
pin_name_t int_pin
Definition: i2ctospi.h:231
uint8_t i2ctospi_spi_read_byte(i2ctospi_t *ctx, i2ctospi_spi_t *spi)
Generic SPI read the byte of data from data buffer function.
Click ctx object definition.
Definition: i2ctospi.h:197
uint8_t function_id
Definition: i2ctospi.h:247
uint8_t ss0_val
Definition: i2ctospi.h:262
void i2ctospi_config_spi(i2ctospi_t *ctx, uint8_t config_data)
Configure SPI Interface function.
void i2ctospi_spi_write_byte(i2ctospi_t *ctx, i2ctospi_spi_t *spi, uint8_t write_data)
Generic SPI write the byte of data to data buffer function.
void i2ctospi_spi_burst_write(i2ctospi_t *ctx, i2ctospi_spi_t *spi, uint8_t *write_data)
Generic SPI write - single address burst write function.
void i2ctospi_set_write_state_of_gpio(i2ctospi_t *ctx, uint8_t gpio_state)
Set state of the pins defined as GPIO write function.
pin_name_t rst
Definition: i2ctospi.h:229
void i2ctospi_cfg_setup(i2ctospi_cfg_t *cfg)
Config Object Initialization function.
void i2ctospi_enable_gpio(i2ctospi_t *ctx, uint8_t ss_pin_number)
Enable the pins defined as GPIO function.
uint8_t i2c_address
Definition: i2ctospi.h:236
Click spi object definition.
Definition: i2ctospi.h:244