38#include "drv_digital_out.h"
39#include "drv_digital_in.h"
40#include "drv_i2c_master.h"
52#define SRAM2_MAP_MIKROBUS( cfg, mikrobus ) \
53 cfg.scl = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
54 cfg.sda = MIKROBUS( mikrobus, MIKROBUS_SDA ); \
55 cfg.wp = MIKROBUS( mikrobus, MIKROBUS_PWM )
62#define SRAM2_RETVAL uint8_t
65#define SRAM2_INIT_ERROR 0xFF
72#define SRAM2_WR_ENABLE 0x01
73#define SRAM2_WR_DISABLE 0x00
80#define SRAM2_SLAVE_ADDR_0_0 0x51
81#define SRAM2_SLAVE_ADDR_0_1 0x53
82#define SRAM2_SLAVE_ADDR_1_0 0x55
83#define SRAM2_SLAVE_ADDR_1_1 0x57
#define SRAM2_RETVAL
Definition: sram2.h:62
void sram2_write_protect(sram2_t *ctx, uint8_t state)
Set PWM pin for write protection.
void sram2_generic_read(sram2_t *ctx, uint16_t reg, uint8_t *rx_data)
Generic read function.
SRAM2_RETVAL sram2_init(sram2_t *ctx, sram2_cfg_t *cfg)
Initialization function.
void sram2_cfg_setup(sram2_cfg_t *cfg)
Config Object Initialization function.
void sram2_generic_write(sram2_t *ctx, uint16_t reg, uint8_t wr_data)
Generic write function.
Click configuration structure definition.
Definition: sram2.h:116
uint32_t i2c_speed
Definition: sram2.h:128
pin_name_t wp
Definition: sram2.h:124
pin_name_t scl
Definition: sram2.h:119
pin_name_t sda
Definition: sram2.h:120
uint8_t i2c_address
Definition: sram2.h:129
Click ctx object definition.
Definition: sram2.h:97
i2c_master_t i2c
Definition: sram2.h:104
uint8_t slave_address
Definition: sram2.h:108
digital_out_t wp
Definition: sram2.h:100