balancer2  2.0.0.0
balancer2.h
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1 /*
2  * MikroSDK - MikroE Software Development Kit
3  * Copyright© 2020 MikroElektronika d.o.o.
4  *
5  * Permission is hereby granted, free of charge, to any person
6  * obtaining a copy of this software and associated documentation
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9  * publish, distribute, sublicense, and/or sell copies of the Software,
10  * and to permit persons to whom the Software is furnished to do so,
11  * subject to the following conditions:
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13  * The above copyright notice and this permission notice shall be
14  * included in all copies or substantial portions of the Software.
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18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22  * OR OTHER DEALINGS IN THE SOFTWARE.
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24 
33 // ----------------------------------------------------------------------------
34 
35 #ifndef BALANCER2_H
36 #define BALANCER2_H
37 
38 #include "drv_digital_out.h"
39 #include "drv_digital_in.h"
40 #include "drv_spi_master.h"
41 
42 // -------------------------------------------------------------- PUBLIC MACROS
53 #define BALANCER2_MAP_MIKROBUS( cfg, mikrobus ) \
54  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
55  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
56  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
57  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
58  cfg.cell2 = MIKROBUS( mikrobus, MIKROBUS_AN ); \
59  cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_RST ); \
60  cfg.cell1 = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
61  cfg.stat = MIKROBUS( mikrobus, MIKROBUS_INT )
62 
68 #define BALANCER2_RETVAL uint8_t
69 
70 #define BALANCER2_OK 0x00
71 #define BALANCER2_INIT_ERROR 0xFF
72 
78 #define BALANCER2_VREF_5V 5000
79 #define BALANCER2_VREF_3V3 3300
80 
86 #define BALANCER2_CMD_START 0x01
87 #define BALANCER2_CMD_MSBF_LSB 0x20
88 #define BALANCER2_CMD_MSBF_MSB 0x00
89 #define BALANCER2_CMD_SINGLE_MODE_CH0 0x80
90 #define BALANCER2_CMD_SINGLE_MODE_CH1 0xC0
91 #define BALANCER2_CMD_DIFF_MODE_CH0M_CH1P 0x40
92 #define BALANCER2_CMD_DIFF_MODE_CH0P_CH1M 0x00
93 #define BALANCER2_CMD_DUMMY 0x00
94 
100 #define BALANCER2_MASK 0x0F
101 
107 #define BALANCER2_BATT1 0xAA
108 #define BALANCER2_BATT2 0xBB
109 #define BALANCER2_BATT_BOTH 0xCC
110 
116 #define BALANCER2_PIN_STATE_HIGH 1
117 #define BALANCER2_PIN_STATE_LOW 0
118 
124 #define BALANCER2_MODE_CHARGING 0x10
125 #define BALANCER2_MODE_BALANCING_P 0x20
126 #define BALANCER2_MODE_BALANCING_NP 0x30
127 #define BALANCER2_MODE_BALANCING_PP 0x40
128 #define BALANCER2_MODE_BALANCING_NPP 0x50
129 #define BALANCER2_MODE_BALANCING_P1 0x60
130 #define BALANCER2_MODE_BALANCING_NP1 0x70
131 #define BALANCER2_MODE_BALANCING_P2 0x80
132 #define BALANCER2_MODE_BALANCING_NP2 0x90
133 
139 #define CHN_0_MV_MULT 3.0
140 #define CHN_1_MV_MULT 1.5
141 #define ADC_RESOLUTION 4096.0
142  // End group macro
145 // --------------------------------------------------------------- PUBLIC TYPES
154 typedef struct
155 {
156  // Output pins
157 
158  digital_out_t cs;
159  digital_out_t cell2;
160  digital_out_t int_pin;
161  digital_out_t cell1;
162  digital_out_t stat;
163 
164  // Modules
165 
166  spi_master_t spi;
167  pin_name_t chip_select;
168 
169 } balancer2_t;
170 
174 typedef struct
175 {
176  // Communication gpio pins
177 
178  pin_name_t miso;
179  pin_name_t mosi;
180  pin_name_t sck;
181  pin_name_t cs;
182 
183  // Additional gpio pins
184 
185  pin_name_t cell2;
186  pin_name_t int_pin;
187  pin_name_t cell1;
188  pin_name_t stat;
189 
190  // static variable
191 
192  uint32_t spi_speed;
193  spi_master_mode_t spi_mode;
194  spi_master_chip_select_polarity_t cs_polarity;
195 
197  // End types group
199 // ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
200 
205 #ifdef __cplusplus
206 extern "C"{
207 #endif
208 
218 
228 
237 
246 void balancer2_cell_1_state ( balancer2_t *ctx, uint8_t state );
247 
256 void balancer2_cell_2_state ( balancer2_t *ctx, uint8_t state );
257 
266 void balancer2_supply_state ( balancer2_t *ctx, uint8_t state );
267 
276 void balancer2_status_led_state ( balancer2_t *ctx, uint8_t state );
277 
288 uint16_t balancer2_read_adc ( balancer2_t *ctx, uint8_t cmd_byte );
289 
296 void balancer2_set_vref ( balancer2_t *ctx, uint16_t vref );
297 
308 float balancer2_get_batttery_lvl ( balancer2_t *ctx, uint8_t bat_num );
309 
320 float balancer2_adc_to_mv ( balancer2_t *ctx, uint16_t adc_val );
321 
322 #ifdef __cplusplus
323 }
324 #endif
325 #endif // _BALANCER2_H_
326  // End public_function group
329 
330 // ------------------------------------------------------------------------- END
balancer2_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: balancer2.h:194
balancer2_cfg_t
Click configuration structure definition.
Definition: balancer2.h:175
balancer2_default_cfg
void balancer2_default_cfg(balancer2_t *ctx)
Click Default Configuration function.
balancer2_get_batttery_lvl
float balancer2_get_batttery_lvl(balancer2_t *ctx, uint8_t bat_num)
Function for getting real battery lvl.
balancer2_cfg_t::miso
pin_name_t miso
Definition: balancer2.h:178
balancer2_cfg_t::cell1
pin_name_t cell1
Definition: balancer2.h:187
balancer2_cell_2_state
void balancer2_cell_2_state(balancer2_t *ctx, uint8_t state)
Generic function for setting cell 2 pin status.
balancer2_t
Click ctx object definition.
Definition: balancer2.h:155
balancer2_adc_to_mv
float balancer2_adc_to_mv(balancer2_t *ctx, uint16_t adc_val)
Function for converting adc value to mV.
balancer2_cell_1_state
void balancer2_cell_1_state(balancer2_t *ctx, uint8_t state)
Generic function for setting cell 1 pin status.
balancer2_cfg_t::stat
pin_name_t stat
Definition: balancer2.h:188
balancer2_t::cs
digital_out_t cs
Definition: balancer2.h:158
balancer2_cfg_t::mosi
pin_name_t mosi
Definition: balancer2.h:179
BALANCER2_RETVAL
#define BALANCER2_RETVAL
Definition: balancer2.h:68
balancer2_init
BALANCER2_RETVAL balancer2_init(balancer2_t *ctx, balancer2_cfg_t *cfg)
Initialization function.
balancer2_t::stat
digital_out_t stat
Definition: balancer2.h:162
balancer2_cfg_t::cell2
pin_name_t cell2
Definition: balancer2.h:185
balancer2_cfg_t::sck
pin_name_t sck
Definition: balancer2.h:180
balancer2_supply_state
void balancer2_supply_state(balancer2_t *ctx, uint8_t state)
Generic function for setting supply pin status.
balancer2_cfg_t::int_pin
pin_name_t int_pin
Definition: balancer2.h:186
balancer2_cfg_setup
void balancer2_cfg_setup(balancer2_cfg_t *cfg)
Config Object Initialization function.
balancer2_t::chip_select
pin_name_t chip_select
Definition: balancer2.h:167
balancer2_cfg_t::spi_speed
uint32_t spi_speed
Definition: balancer2.h:192
balancer2_t::cell1
digital_out_t cell1
Definition: balancer2.h:161
balancer2_set_vref
void balancer2_set_vref(balancer2_t *ctx, uint16_t vref)
Function for setting reference value.
balancer2_t::int_pin
digital_out_t int_pin
Definition: balancer2.h:160
balancer2_t::spi
spi_master_t spi
Definition: balancer2.h:166
balancer2_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: balancer2.h:193
balancer2_t::cell2
digital_out_t cell2
Definition: balancer2.h:159
balancer2_cfg_t::cs
pin_name_t cs
Definition: balancer2.h:181
balancer2_read_adc
uint16_t balancer2_read_adc(balancer2_t *ctx, uint8_t cmd_byte)
Function for reading adc value.
balancer2_status_led_state
void balancer2_status_led_state(balancer2_t *ctx, uint8_t state)
Generic function for setting status led pin status.