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38 #include "drv_digital_out.h"
39 #include "drv_digital_in.h"
40 #include "drv_spi_master.h"
53 #define ADC4_MAP_MIKROBUS( cfg, mikrobus ) \
54 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
55 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
56 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
57 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
58 cfg.err = MIKROBUS( mikrobus, MIKROBUS_INT )
65 #define ADC4_RETVAL uint8_t
68 #define ADC4_INIT_ERROR 0xFF
75 #define ADC4_RESOLUTION 8388607
82 #define ADC4_VREF_4000MV 4.096
83 #define ADC4_VREF_2500MV 2.5
90 #define ADC4_STATUS_REG 0x00
91 #define ADC4_MODE_REG 0x01
92 #define ADC4_IFACE_MODE_REG 0x02
93 #define ADC4_CHECK_REG 0x03
94 #define ADC4_DATA_REG 0x04
95 #define ADC4_GPIO_CONFIG_REG 0x06
96 #define ADC4_ID_REG 0x07
97 #define ADC4_SETUP_CONFIGURATION_REG 0x20
104 #define ADC4_CH_REG_BASE 0x10
105 #define ADC4_CON_REG_BASE 0x20
106 #define ADC4_FILCON_REG_BASE 0x28
107 #define ADC4_OFFSET_REG_BASE 0x30
108 #define ADC4_GAIN_REG_BASE 0x38
115 #define ADC4_STATUS_RDY 0x80
116 #define ADC4_STATUS_ERR 0x40
117 #define ADC4_STATUS_CRC_ERR 0x20
118 #define ADC4_STATUS_REG_ERR 0x10
119 #define ADC4_STATUS_CH_ACTIVE 0x0F
126 #define ADC4_MODE_INT_REF_AND_SING_CYC_EN 0xA000
127 #define ADC4_MODE_INT_REF_EN 0x8000
128 #define ADC4_MODE_HIDE_RELAY_DIS 0x4000
129 #define ADC4_MODE_SING_CYC_EN 0x2000
130 #define ADC4_MODE_DELAY_0 0x0000
131 #define ADC4_MODE_DELAY_4 0x0100
132 #define ADC4_MODE_DELAY_16 0x0200
133 #define ADC4_MODE_DELAY_40 0x0300
134 #define ADC4_MODE_DELAY_100 0x0400
135 #define ADC4_MODE_DELAY_200 0x0500
136 #define ADC4_MODE_DELAY_500 0x0600
137 #define ADC4_MODE_DELAY_1000 0x0700
138 #define ADC4_MODE_CONTINUOUS 0x0000
139 #define ADC4_MODE_SINGLE 0x0010
140 #define ADC4_MODE_STBY 0x0020
141 #define ADC4_MODE_POWER_DOWN 0x0030
142 #define ADC4_MODE_INTERNAL_OFFSET 0x0040
143 #define ADC4_MODE_SYSTEM_OFFSET 0x0060
144 #define ADC4_MODE_GAIN_OFFSET 0x0070
145 #define ADC4_MODE_CLK_INTOSC 0x0000
146 #define ADC4_MODE_CLK_INTOSC_XT2 0x0002
147 #define ADC4_MODE_CLK_EXTOSC_XT2 0x0004
148 #define ADC4_MODE_CLK_EXTOSC 0x0006
155 #define ADC4_IFACE_MODE_ALTSYNC_EN 0x1000
156 #define ADC4_IFACE_MODE_IOSTREN_EN 0x0800
157 #define ADC4_IFACE_MODE_DOUTRES_EN 0x0100
158 #define ADC4_IFACE_MODE_CONTRD_EN 0x0080
159 #define ADC4_IFACE_MODE_DATASTA_EN 0x0040
160 #define ADC4_IFACE_MODE_REGCHK_EN 0x0020
161 #define ADC4_IFACE_MODE_CRC_DIS 0x0000
162 #define ADC4_IFACE_MODE_CRC_RD_EN 0x0002
163 #define ADC4_IFACE_MODE_CRC_RW_EN 0x0004
170 #define ADC4_CFG_PDSW 0x4000
171 #define ADC4_CFG_OP_EN2_3 0x2000
172 #define ADC4_CFG_MUX_IO 0x1000
173 #define ADC4_CFG_SYNC_EN 0x0800
174 #define ADC4_CFG_ERR_DISABLE 0x0000
175 #define ADC4_CFG_ERR_INPUT 0x0400
176 #define ADC4_CFG_ERR_OPENDRAIN 0x0200
177 #define ADC4_CFG_ERR_OUTPUT 0x0600
178 #define ADC4_CFG_ERR_DAT 0x0010
185 #define ADC4_CH_EN 0x8001
186 #define ADC4_CH_SETUP_0 0x0001 << 12
187 #define ADC4_CH_SETUP_1 0x0002 << 12
188 #define ADC4_CH_SETUP_2 0x0003 << 12
189 #define ADC4_CH_SETUP_3 0x0004 << 12
190 #define ADC4_CH_SETUP_4 0x0005 << 12
191 #define ADC4_CH_SETUP_5 0x0006 << 12
192 #define ADC4_CH_SETUP_6 0x0007 << 12
193 #define ADC4_CH_SETUP_7 0x0008 << 12
194 #define ADC4_CH_AINPOS_0 0x0000 << 5
195 #define ADC4_CH_AINPOS_1 0x0001 << 5
196 #define ADC4_CH_AINPOS_2 0x0002 << 5
197 #define ADC4_CH_AINPOS_3 0x0003 << 5
198 #define ADC4_CH_AINPOS_4 0x0004 << 5
199 #define ADC4_CH_AINPOS_5 0x0005 << 5
200 #define ADC4_CH_AINPOS_6 0x0006 << 5
201 #define ADC4_CH_AINPOS_7 0x0007 << 5
202 #define ADC4_CH_AINPOS_8 0x0008 << 5
203 #define ADC4_CH_AINPOS_9 0x0009 << 5
204 #define ADC4_CH_AINPOS_10 0x000A << 5
205 #define ADC4_CH_AINPOS_11 0x000B << 5
206 #define ADC4_CH_AINPOS_12 0x000C << 5
207 #define ADC4_CH_AINPOS_13 0x000D << 5
208 #define ADC4_CH_AINPOS_14 0x000E << 5
209 #define ADC4_CH_AINPOS_15 0x000F << 5
210 #define ADC4_CH_AINPOS_16 0x0010 << 5
211 #define ADC4_CH_AINPOS_TEMP_P 0x0011 << 5
212 #define ADC4_CH_AINPOS_TEMP_N 0x0012 << 5
213 #define ADC4_CH_AINPOS_AV_P 0x0013 << 5
214 #define ADC4_CH_AINPOS_AV_N 0x0014 << 5
215 #define ADC4_CH_AINPOS_REF_P 0x0015 << 5
216 #define ADC4_CH_AINPOS_REF_N 0x0016 << 5
217 #define ADC4_CH_AINNEG_0 0x0000
218 #define ADC4_CH_AINNEG_1 0x0001
219 #define ADC4_CH_AINNEG_2 0x0002
220 #define ADC4_CH_AINNEG_3 0x0003
221 #define ADC4_CH_AINNEG_4 0x0004
222 #define ADC4_CH_AINNEG_5 0x0005
223 #define ADC4_CH_AINNEG_6 0x0006
224 #define ADC4_CH_AINNEG_7 0x0007
225 #define ADC4_CH_AINNEG_8 0x0008
226 #define ADC4_CH_AINNEG_9 0x0009
227 #define ADC4_CH_AINNEG_10 0x000A
228 #define ADC4_CH_AINNEG_11 0x000B
229 #define ADC4_CH_AINNEG_12 0x000C
230 #define ADC4_CH_AINNEG_13 0x000D
231 #define ADC4_CH_AINNEG_14 0x000E
232 #define ADC4_CH_AINNEG_15 0x000F
233 #define ADC4_CH_AINNEG_16 0x0010
234 #define ADC4_CH_AINNEG_TEMP_P 0x0011
235 #define ADC4_CH_AINNEG_TEMP_N 0x0012
236 #define ADC4_CH_AINNEG_AV_P 0x0013
237 #define ADC4_CH_AINNEG_AV_N 0x0014
238 #define ADC4_CH_AINNEG_REF_P 0x0015
239 #define ADC4_CH_AINNEG_REF_N 0x0016
246 #define ADC4_CON_UNIPOL 0x0000
247 #define ADC4_CON_BIPOL 0x0001 << 12
248 #define ADC4_CON_REFBUF_P_EN 0x0001 << 11
249 #define ADC4_CON_REFBUF_N_EN 0x0001 << 10
250 #define ADC4_CON_AINBUF_P_EN 0x0001 << 9
251 #define ADC4_CON_AINBUF_N_EN 0x0001 << 8
252 #define ADC4_CON_BURNOUT_EN 0x0001 << 7
253 #define ADC4_CON_EXTREF 0x0000
254 #define ADC4_CON_EXTREF_SUPP 0x0001 << 4
255 #define ADC4_CON_EXTREF_INT 0x0002 << 4
256 #define ADC4_CON_EXTREF_AV 0x0003 << 4
263 #define ADC4_FILCON_SINC_MAP0 0x8000
264 #define ADC4_FILCON_ENHFILEN 0x0001 << 11
265 #define ADC4_FILCON_ENHFIL_SET1 0x0002 << 8
266 #define ADC4_FILCON_EHFFIL_SET2 0x0003 << 8
267 #define ADC4_FILCON_ENHFIL_SET3 0x0005 << 8
268 #define ADC4_FILCON_ENHFIL_SET4 0x0006 << 8
269 #define ADC4_FILCON_ORD_SINC5 0x0000
270 #define ADC4_FILCON_ORD_SINC3 0x0003 << 5
271 #define ADC4_FILCON_ODR_250000 0x0000
272 #define ADC4_FILCON_ODR_125000 0x0001
273 #define ADC4_FILCON_ODR_62500 0x0002
274 #define ADC4_FILCON_ODR_50000 0x0003
275 #define ADC4_FILCON_ODR_31250 0x0004
276 #define ADC4_FILCON_ODR_25000 0x0005
277 #define ADC4_FILCON_ODR_15625 0x0006
278 #define ADC4_FILCON_ODR_10000 0x0007
279 #define ADC4_FILCON_ODR_5000 0x0008
280 #define ADC4_FILCON_ODR_2500 0x0009
281 #define ADC4_FILCON_ODR_1000 0x000A
282 #define ADC4_FILCON_ODR_500 0x000B
283 #define ADC4_FILCON_ODR_397_5 0x000C
284 #define ADC4_FILCON_ODR_200 0x000D
285 #define ADC4_FILCON_ODR_100 0x000E
286 #define ADC4_FILCON_ODR_59_92 0x000F
287 #define ADC4_FILCON_ODR_49_96 0x0010
288 #define ADC4_FILCON_ODR_20 0x0011
289 #define ADC4_FILCON_ODR_16_66 0x0012
290 #define ADC4_FILCON_ODR_10 0x0013
291 #define ADC4_FILCON_ODR_5 0x0014
void adc4_default_cfg(adc4_t *ctx)
Click Default Configuration function.
#define ADC4_RETVAL
Definition: adc4.h:65
spi_master_chip_select_polarity_t cs_polarity
Definition: adc4.h:342
pin_name_t err
Definition: adc4.h:336
uint8_t sing_bit
Definition: adc4.h:318
spi_master_mode_t spi_mode
Definition: adc4.h:341
void adc4_cfg_setup(adc4_cfg_t *cfg)
Config Object Initialization function.
pin_name_t sck
Definition: adc4.h:331
void adc4_generic_transfer(adc4_t *ctx, uint8_t *wr_buf, uint16_t wr_len, uint8_t *rd_buf, uint16_t rd_len)
Generic transfer function.
void adc4_reset(adc4_t *ctx)
Reset function.
uint8_t adc4_write_reg(adc4_t *ctx, const uint8_t reg_address, uint8_t *value)
Generic Write Function.
uint16_t adc4_get_voltage(adc4_t *ctx, const float ref_voltage)
Get voltage function.
void adc4_get_config(adc4_t *ctx, uint8_t reg_address, uint16_t *value)
Get configuration function.
Click ctx object definition.
Definition: adc4.h:304
uint32_t adc4_get_data(adc4_t *ctx)
Get data function.
pin_name_t chip_select
Definition: adc4.h:315
uint8_t adc4_get_err_pin(adc4_t *ctx)
Error check function.
pin_name_t miso
Definition: adc4.h:329
pin_name_t cs
Definition: adc4.h:332
void adc4_set_config(adc4_t *ctx, const uint8_t reg_address, uint16_t value)
Set configuration function.
spi_master_t spi
Definition: adc4.h:314
Click configuration structure definition.
Definition: adc4.h:325
pin_name_t mosi
Definition: adc4.h:330
uint8_t adc4_read_reg(adc4_t *ctx, const uint8_t reg_address, uint8_t *value)
Generic Write Function.
digital_out_t cs
Definition: adc4.h:306
ADC4_RETVAL adc4_init(adc4_t *ctx, adc4_cfg_t *cfg)
Initialization function.
uint32_t spi_speed
Definition: adc4.h:340
digital_in_t err
Definition: adc4.h:310
uint16_t w_dog
Definition: adc4.h:317