hbridge5  2.0.0.0
hbridge5.h
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1 /*
2  * MikroSDK - MikroE Software Development Kit
3  * Copyright© 2020 MikroElektronika d.o.o.
4  *
5  * Permission is hereby granted, free of charge, to any person
6  * obtaining a copy of this software and associated documentation
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9  * publish, distribute, sublicense, and/or sell copies of the Software,
10  * and to permit persons to whom the Software is furnished to do so,
11  * subject to the following conditions:
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14  * included in all copies or substantial portions of the Software.
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21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22  * OR OTHER DEALINGS IN THE SOFTWARE.
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24 
33 // ----------------------------------------------------------------------------
34 
35 #ifndef HBRIDGE5_H
36 #define HBRIDGE5_H
37 
38 #include "mikrosdk_version.h"
39 
40 #ifdef __GNUC__
41 #if mikroSDK_GET_VERSION < 20800ul
42 #include "rcu_delays.h"
43 #else
44 #include "delays.h"
45 #endif
46 #endif
47 
48 #include "drv_digital_out.h"
49 #include "drv_digital_in.h"
50 #include "drv_i2c_master.h"
51 
52 // -------------------------------------------------------------- PUBLIC MACROS
62 #define HBRIDGE5_MAP_MIKROBUS( cfg, mikrobus ) \
63  cfg.scl = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
64  cfg.sda = MIKROBUS( mikrobus, MIKROBUS_SDA ); \
65  cfg.an = MIKROBUS( mikrobus, MIKROBUS_AN ); \
66  cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
67  cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
68 
74 #define HBRIDGE5_RETVAL uint8_t
75 
76 #define HBRIDGE5_OK 0x00
77 #define HBRIDGE5_INIT_ERROR 0xFF
78 
84 #define HBRIDGE5_DEVICE_SLAVE_ADDR_0_0 0x70
85 #define HBRIDGE5_DEVICE_SLAVE_ADDR_0_1 0x71
86 #define HBRIDGE5_DEVICE_SLAVE_ADDR_1_0 0x72
87 #define HBRIDGE5_DEVICE_SLAVE_ADDR_1_1 0x73
88 
94 #define HBRIDGE5_CMD_INPUT_PORT 0x00
95 #define HBRIDGE5_CMD_OUTPUT_PORT 0x01
96 #define HBRIDGE5_CMD_POLARITY_INVERSION 0x02
97 #define HBRIDGE5_CMD_CONFIGURATION 0x03
98 
104 #define HBRIDGE5_PORT_PHASE 0x01
105 #define HBRIDGE5_PORT_ENABLE 0x02
106 #define HBRIDGE5_PORT_BRAKE 0x04
107 #define HBRIDGE5_PORT_B_MODE 0x08
108 #define HBRIDGE5_PORT_N_SLEEP 0x10
109 #define HBRIDGE5_PORT_N_FAULT 0x20
110 
116 #define HBRIDGE5_ENABLE_ALL_OUTPUT_PORT 0xE0
117 #define HBRIDGE5_DISABLE_ALL_OUTPUT_PORT 0xFF
118  // End group macro
121 // --------------------------------------------------------------- PUBLIC TYPES
130 typedef struct
131 {
132  // Output pins
133 
134  digital_out_t rst;
135 
136  // Input pins
137 
138  digital_in_t an;
139  digital_in_t int_pin;
140 
141  // Modules
142 
143  i2c_master_t i2c;
144 
145  // ctx variable
146 
147  uint8_t slave_address;
148 
149 } hbridge5_t;
150 
154 typedef struct
155 {
156  // Communication gpio pins
157 
158  pin_name_t scl;
159  pin_name_t sda;
160 
161  // Additional gpio pins
162 
163  pin_name_t an;
164  pin_name_t rst;
165  pin_name_t int_pin;
166 
167  // static variable
168 
169  uint32_t i2c_speed;
170  uint8_t i2c_address;
171 
173  // End types group
175 // ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
176 
182 #ifdef __cplusplus
183 extern "C"{
184 #endif
185 
195 
205 
214 
225 void hbridge5_generic_write ( hbridge5_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len );
226 
237 void hbridge5_generic_read ( hbridge5_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len );
238 
247 void hbridge5_rst_state ( hbridge5_t *ctx, uint8_t state );
248 
257 
268 uint8_t hbridge5_read_byte ( hbridge5_t *ctx, uint8_t cmd );
269 
279 void hbridge5_write_byte ( hbridge5_t *ctx, uint8_t cmd, uint8_t data_in );
280 
290 void hbridge5_set_port ( hbridge5_t *ctx, uint8_t port, uint8_t value );
291 
301 
310 
319 
328 
337 
346 
355 void hbridge5_sleep( hbridge5_t *ctx, uint8_t state );
356 
365 void hbridge5_configuration ( hbridge5_t *ctx, uint8_t cfg_data );
366 
375 
376 #ifdef __cplusplus
377 }
378 #endif
379 #endif // _HBRIDGE5_H_
380  // End public_function group
383 
384 // ------------------------------------------------------------------------- END
hbridge5_sync_decay_rev
void hbridge5_sync_decay_rev(hbridge5_t *ctx)
Synchronization fast decay reverse function.
hbridge5_brake_high
void hbridge5_brake_high(hbridge5_t *ctx)
Puts motor to a halt.
hbridge5_cfg_t::i2c_address
uint8_t i2c_address
Definition: hbridge5.h:170
hbridge5_cfg_t::an
pin_name_t an
Definition: hbridge5.h:163
hbridge5_rst_state
void hbridge5_rst_state(hbridge5_t *ctx, uint8_t state)
Resets pin state.
hbridge5_sleep
void hbridge5_sleep(hbridge5_t *ctx, uint8_t state)
Sleep function.
hbridge5_read_byte
uint8_t hbridge5_read_byte(hbridge5_t *ctx, uint8_t cmd)
Function reads byte from register.
hbridge5_get_interrupt_state
uint8_t hbridge5_get_interrupt_state(hbridge5_t *ctx)
Reads interrupt pin state.
hbridge5_cfg_setup
void hbridge5_cfg_setup(hbridge5_cfg_t *cfg)
Config Object Initialization function.
hbridge5_t::i2c
i2c_master_t i2c
Definition: hbridge5.h:143
hbridge5_sync_decay_fwd
void hbridge5_sync_decay_fwd(hbridge5_t *ctx)
Synchronization fast decay foreward function.
hbridge5_configuration
void hbridge5_configuration(hbridge5_t *ctx, uint8_t cfg_data)
Configuration function.
hbridge5_write_byte
void hbridge5_write_byte(hbridge5_t *ctx, uint8_t cmd, uint8_t data_in)
Function writes one byte in register.
hbridge5_cfg_t::scl
pin_name_t scl
Definition: hbridge5.h:158
hbridge5_cfg_t::int_pin
pin_name_t int_pin
Definition: hbridge5.h:165
hbridge5_cfg_t::rst
pin_name_t rst
Definition: hbridge5.h:164
hbridge5_default_cfg
void hbridge5_default_cfg(hbridge5_t *ctx)
Click Default Configuration function.
hbridge5_cfg_t::sda
pin_name_t sda
Definition: hbridge5.h:159
hbridge5_forward
void hbridge5_forward(hbridge5_t *ctx)
Puts motor into forward motion.
hbridge5_generic_read
void hbridge5_generic_read(hbridge5_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len)
Generic read function.
hbridge5_t::slave_address
uint8_t slave_address
Definition: hbridge5.h:147
hbridge5_t
Click ctx object definition.
Definition: hbridge5.h:131
hbridge5_reverse
void hbridge5_reverse(hbridge5_t *ctx)
Puts motor into reverse motion.
hbridge5_t::int_pin
digital_in_t int_pin
Definition: hbridge5.h:139
hbridge5_generic_write
void hbridge5_generic_write(hbridge5_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len)
Generic write function.
hbridge5_set_port
void hbridge5_set_port(hbridge5_t *ctx, uint8_t port, uint8_t value)
Function sets port.
hbridge5_n_fault_check
uint8_t hbridge5_n_fault_check(hbridge5_t *ctx)
N fault check function.
hbridge5_init
HBRIDGE5_RETVAL hbridge5_init(hbridge5_t *ctx, hbridge5_cfg_t *cfg)
Initialization function.
hbridge5_cfg_t
Click configuration structure definition.
Definition: hbridge5.h:155
hbridge5_t::an
digital_in_t an
Definition: hbridge5.h:138
hbridge5_brake_low
void hbridge5_brake_low(hbridge5_t *ctx)
Puts motor to a halt.
HBRIDGE5_RETVAL
#define HBRIDGE5_RETVAL
Definition: hbridge5.h:74
hbridge5_cfg_t::i2c_speed
uint32_t i2c_speed
Definition: hbridge5.h:169
hbridge5_t::rst
digital_out_t rst
Definition: hbridge5.h:134