adc9  2.0.0.0
adc9.h
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1 /*
2  * MikroSDK - MikroE Software Development Kit
3  * Copyright© 2020 MikroElektronika d.o.o.
4  *
5  * Permission is hereby granted, free of charge, to any person
6  * obtaining a copy of this software and associated documentation
7  * files (the "Software"), to deal in the Software without restriction,
8  * including without limitation the rights to use, copy, modify, merge,
9  * publish, distribute, sublicense, and/or sell copies of the Software,
10  * and to permit persons to whom the Software is furnished to do so,
11  * subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be
14  * included in all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19  * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22  * OR OTHER DEALINGS IN THE SOFTWARE.
23  */
24 
33 // ----------------------------------------------------------------------------
34 
35 #ifndef ADC9_H
36 #define ADC9_H
37 
38 #include "drv_digital_out.h"
39 #include "drv_digital_in.h"
40 #include "drv_spi_master.h"
41 
42 
43 // -------------------------------------------------------------- PUBLIC MACROS
54 #define ADC9_MAP_MIKROBUS( cfg, mikrobus ) \
55  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
56  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
57  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
58  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
59  cfg.mck = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
60  cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
61 
67 #define ADC9_RETVAL uint8_t
68 
69 #define ADC9_OK 0x00
70 #define ADC9_INIT_ERROR 0xFF
71 
77 #define ADC9_DEVICE_ADR 0x01
78 
84 #define ADC9_CMD_DONT_CARE 0x00
85 #define ADC9_CMD_STAT_READ 0x01
86 #define ADC9_CMD_INC_WRITE 0x02
87 #define ADC9_CMD_INC_READ 0x03
88 
94 #define ADC9_REG_ADC_DATA 0x00
95 #define ADC9_REG_CFG_0 0x01
96 #define ADC9_REG_CFG_1 0x02
97 #define ADC9_REG_CFG_2 0x03
98 #define ADC9_REG_CFG_3 0x04
99 #define ADC9_REG_IRQ 0x05
100 #define ADC9_REG_MUX 0x06
101 #define ADC9_REG_SCAN 0x07
102 #define ADC9_REG_TIMER 0x08
103 #define ADC9_REG_OFFSET_CAL 0x09
104 #define ADC9_REG_GAIN_CAL 0x0A
105 #define ADC9_RSV_REG_W_A 0x0B
106 #define ADC9_REG_LOCK 0x0D
107 #define ADC9_RSV_REG 0x0E
108 #define ADC9_REG_CRC_CFG 0x0F
109 
115 #define ADC9_CFG_0_VREF_SEL_0 0x00
116 #define ADC9_CFG_0_VREF_SEL_1 0x40
117 #define ADC9_CFG_0_VREF_SEL_2 0x80
118 #define ADC9_CFG_0_VREF_SEL_3 0xC0
119 
120 #define ADC9_CFG_0_CLK_SEL_0 0x00
121 #define ADC9_CFG_0_CLK_SEL_1 0x10
122 #define ADC9_CFG_0_CLK_SEL_2 0x20
123 #define ADC9_CFG_0_CLK_SEL_3 0x30
124 
125 #define ADC9_CFG_0_CS_SEL_0 0x00
126 #define ADC9_CFG_0_CS_SEL_1 0x04
127 #define ADC9_CFG_0_CS_SEL_2 0x08
128 #define ADC9_CFG_0_CS_SEL_3 0x0C
129 
130 #define ADC9_CFG_0_MODE_SHD_DEF 0x00
131 #define ADC9_CFG_0_MODE_SHD 0x01
132 #define ADC9_CFG_0_MODE_STANDBY 0x02
133 #define ADC9_CFG_0_MODE_CONV 0x03
134 
140 #define ADC9_CFG_1_PRE_1 0x00
141 #define ADC9_CFG_1_PRE_2 0x40
142 #define ADC9_CFG_1_PRE_4 0x80
143 #define ADC9_CFG_1_PRE_8 0xC0
144 
150 #define ADC9_CFG_1_OSR_98304 0x3C
151 #define ADC9_CFG_1_OSR_81920 0x38
152 #define ADC9_CFG_1_OSR_49152 0x34
153 #define ADC9_CFG_1_OSR_40960 0x30
154 #define ADC9_CFG_1_OSR_24576 0x2C
155 #define ADC9_CFG_1_OSR_20480 0x28
156 #define ADC9_CFG_1_OSR_16384 0x24
157 #define ADC9_CFG_1_OSR_8192 0x20
158 #define ADC9_CFG_1_OSR_4096 0x1C
159 #define ADC9_CFG_1_OSR_2048 0x18
160 #define ADC9_CFG_1_OSR_1024 0x14
161 #define ADC9_CFG_1_OSR_512 0x10
162 #define ADC9_CFG_1_OSR_256 0x0C
163 #define ADC9_CFG_1_OSR_128 0x08
164 #define ADC9_CFG_1_OSR_64 0x04
165 #define ADC9_CFG_1_OSR_32 0x00
166 
167 #define ADC9_CFG_1_DITHER_MAX 0x03
168 #define ADC9_CFG_1_DITHER_MED 0x02
169 #define ADC9_CFG_1_DITHER_MIN 0x01
170 #define ADC9_CFG_1_DITHER_DEF 0x00
171 
177 #define ADC9_CFG_2_BOOST_X_2 0xC0
178 #define ADC9_CFG_2_BOOST_X_1 0x80
179 #define ADC9_CFG_2_BOOST_X_066 0x40
180 #define ADC9_CFG_2_BOOST_X_05 0x00
181 
182 #define ADC9_CFG_2_GAIN_X_64 0x38
183 #define ADC9_CFG_2_GAIN_X_32 0x30
184 #define ADC9_CFG_2_GAIN_X_16 0x28
185 #define ADC9_CFG_2_GAIN_X_8 0x20
186 #define ADC9_CFG_2_GAIN_X_4 0x18
187 #define ADC9_CFG_2_GAIN_X_2 0x10
188 #define ADC9_CFG_2_GAIN_X_1 0x08
189 #define ADC9_CFG_2_GAIN_X_033 0x00
190 
191 #define ADC9_CFG_2_AZ_MUX_EN 0x04
192 #define ADC9_CFG_2_AZ_MUX_DIS 0x00
193 #define ADC9_CFG_2_AZ_VREF_EN 0x02
194 #define ADC9_CFG_2_AZ_VREF_DIS 0x00
195 
196 #define ADC9_CFG_2_AZ_FREQ_HIGH 0x01
197 #define ADC9_CFG_2_AZ_FREQ_LOW 0x00
198 
204 #define ADC9_CFG_3_CONV_MODE_CONT 0xC0
205 #define ADC9_CFG_3_CONV_MODE_STANDBY 0x80
206 #define ADC9_CFG_3_CONV_MODE_SHD 0x40
207 #define ADC9_CFG_3_CONV_MODE_SHD0 0x00
208 
209 #define ADC9_CFG_3_DATA_FORMAT_CH_ADC 0x30
210 #define ADC9_CFG_3_DATA_FORMAT_SIGN_ADC 0x20
211 #define ADC9_CFG_3_DATA_FORMAT_LEFT_JUST 0x10
212 #define ADC9_CFG_3_DATA_FORMAT_DEF 0x00
213 
214 #define ADC9_CFG_3_CRC_FORMAT_32 0x08
215 #define ADC9_CFG_3_CRC_FORMAT_16 0x00
216 
217 #define ADC9_CFG_3_CRC_COM_EN 0x04
218 #define ADC9_CFG_3_CRC_COM_DIS 0x00
219 
220 #define ADC9_CFG_3_CRC_OFF_CAL_EN 0x02
221 #define ADC9_CFG_3_CRC_OFF_CAL_DIS 0x00
222 #define ADC9_CFG_3_CRC_GAIN_CAL_EN 0x01
223 #define ADC9_CFG_3_CRC_GAIN_CAL_DIS 0x00
224 
230 #define ADC9_IRQ_MODE_MDAT 0x08
231 #define ADC9_IRQ_MODE_IRQ 0x00
232 #define ADC9_IRQ_MODE_LOGIC_HIGH 0x04
233 #define ADC9_IRQ_MODE_HIGH_Z 0x00
234 #define ADC9_IRQ_FASTCMD_EN 0x02
235 #define ADC9_IRQ_FASTCMD_DIS 0x00
236 #define ADC9_IRQ_STP_EN 0x01
237 #define ADC9_IRQ_STP_DIS 0x00
238 
244 #define ADC9_MUX_VIN_POS_NO_IN 0xF0
245 #define ADC9_MUX_VIN_POS_VCM 0xE0
246 #define ADC9_MUX_VIN_POS_TEMP 0xD0
247 #define ADC9_MUX_VIN_POS_VREF_EXT_MINUS 0xC0
248 #define ADC9_MUX_VIN_POS_VREF_EXT_PLUS 0xB0
249 #define ADC9_MUX_VIN_POS_VREF_INT 0xA0
250 #define ADC9_MUX_VIN_POS_AVDD 0x90
251 #define ADC9_MUX_VIN_POS_VSS 0x80
252 #define ADC9_MUX_VIN_POS_CH7 0x70
253 #define ADC9_MUX_VIN_POS_CH6 0x60
254 #define ADC9_MUX_VIN_POS_CH5 0x50
255 #define ADC9_MUX_VIN_POS_CH4 0x40
256 #define ADC9_MUX_VIN_POS_CH3 0x30
257 #define ADC9_MUX_VIN_POS_CH2 0x20
258 #define ADC9_MUX_VIN_POS_CH1 0x10
259 #define ADC9_MUX_VIN_POS_CH0 0x00
260 
266 #define ADC9_MUX_VIN_NEG_NO_IN 0x0F
267 #define ADC9_MUX_VIN_NEG_VCM 0x0E
268 #define ADC9_MUX_VIN_NEG_TEMP 0x0D
269 #define ADC9_MUX_VIN_NEG_VREF_EXT_MINUS 0x0C
270 #define ADC9_MUX_VIN_NEG_VREF_EXT_PLUS 0x0B
271 #define ADC9_MUX_VIN_NEG_VREF_INT 0x0A
272 #define ADC9_MUX_VIN_NEG_AVDD 0x09
273 #define ADC9_MUX_VIN_NEG_VSS 0x08
274 #define ADC9_MUX_VIN_NEG_CH7 0x07
275 #define ADC9_MUX_VIN_NEG_CH6 0x06
276 #define ADC9_MUX_VIN_NEG_CH5 0x05
277 #define ADC9_MUX_VIN_NEG_CH4 0x04
278 #define ADC9_MUX_VIN_NEG_CH3 0x03
279 #define ADC9_MUX_VIN_NEG_CH2 0x02
280 #define ADC9_MUX_VIN_NEG_CH1 0x01
281 #define ADC9_MUX_VIN_NEG_CH0 0x00
282 
288 #define ADC9_SCAN_DLY_DM_CLK_X_512 0x00E00000
289 #define ADC9_SCAN_DLY_DM_CLK_X_256 0x00C00000
290 #define ADC9_SCAN_DLY_DM_CLK_X_128 0x00A00000
291 #define ADC9_SCAN_DLY_DM_CLK_X_64 0x00800000
292 #define ADC9_SCAN_DLY_DM_CLK_X_32 0x00600000
293 #define ADC9_SCAN_DLY_DM_CLK_X_16 0x00400000
294 #define ADC9_SCAN_DLY_DM_CLK_X_8 0x00200000
295 #define ADC9_SCAN_DLY_NO_DELAY 0x00000000
296 
297 #define ADC9_SCAN_PSAV_VREF_OFF 0x00100000
298 #define ADC9_SCAN_PSAV_VREF_ON 0x00000000
299 
300 #define ADC9_SCAN_OFFSET 0x00008000
301 #define ADC9_SCAN_VREF 0x00004000
302 #define ADC9_SCAN_AVDD 0x00002000
303 #define ADC9_SCAN_TEMP 0x00001000
304 #define ADC9_SCAN_DIFF_D 0x00000800
305 #define ADC9_SCAN_DIFF_C 0x00000400
306 #define ADC9_SCAN_DIFF_B 0x00000200
307 #define ADC9_SCAN_DIFF_A 0x00000100
308 #define ADC9_SCAN_CH7 0x00000080
309 #define ADC9_SCAN_CH6 0x00000040
310 #define ADC9_SCAN_CH5 0x00000020
311 #define ADC9_SCAN_CH4 0x00000010
312 #define ADC9_SCAN_CH3 0x00000008
313 #define ADC9_SCAN_CH2 0x00000004
314 #define ADC9_SCAN_CH1 0x00000002
315 #define ADC9_SCAN_CH0 0x00000001
316 
322 #define ADC9_TIMER_DLY_DMCLK_X_16777215 0x00FFFFFF
323 #define ADC9_TIMER_DLY_DMCLK_X_8388607 0x007FFFFF
324 #define ADC9_TIMER_DLY_DMCLK_X_4194303 0x003FFFFF
325 #define ADC9_TIMER_DLY_DMCLK_X_2097151 0x001FFFFF
326 #define ADC9_TIMER_DLY_DMCLK_X_1048575 0x000FFFFF
327 #define ADC9_TIMER_DLY_DMCLK_X_524287 0x0007FFFF
328 #define ADC9_TIMER_DLY_DMCLK_X_262143 0x0003FFFF
329 #define ADC9_TIMER_DLY_DMCLK_X_131071 0x0001FFFF
330 #define ADC9_TIMER_DLY_DMCLK_X_65535 0x0000FFFF
331 #define ADC9_TIMER_DLY_DMCLK_X_32767 0x00007FFF
332 #define ADC9_TIMER_DLY_DMCLK_X_16383 0x00003FFF
333 #define ADC9_TIMER_DLY_DMCLK_X_8191 0x00001FFF
334 #define ADC9_TIMER_DLY_DMCLK_X_4095 0x00000FFF
335 #define ADC9_TIMER_DLY_DMCLK_X_2047 0x000007FF
336 #define ADC9_TIMER_DLY_DMCLK_X_1023 0x000003FF
337 #define ADC9_TIMER_DLY_DMCLK_X_511 0x000001FF
338 #define ADC9_TIMER_DLY_DMCLK_X_255 0x000000FF
339 #define ADC9_TIMER_DLY_DMCLK_X_127 0x0000007F
340 #define ADC9_TIMER_DLY_DMCLK_X_63 0x0000003F
341 #define ADC9_TIMER_DLY_DMCLK_X_31 0x0000001F
342 #define ADC9_TIMER_DLY_DMCLK_X_15 0x0000000F
343 #define ADC9_TIMER_DLY_DMCLK_X_2 0x00000002
344 #define ADC9_TIMER_DLY_DMCLK_X_1 0x00000001
345 #define ADC9_TIMER_DLY_NO_DELAY 0x00000000
346 
352 #define ADC9_FAST_CMD_ADC_CONV_START 0x28
353 #define ADC9_FAST_CMD_ADC_STANDBY_MODE 0x2C
354 #define ADC9_FAST_CMD_ADC_SHUTDOWN_MODE 0x30
355 #define ADC9_FAST_CMD_FULL_SHUTDOWN_MODE 0x34
356 #define ADC9_FAST_CMD_DEV_FULL_RESET 0x38
357 
363 #define ADC9_CALC_COEF 8388608
364  // End group macro
366 // --------------------------------------------------------------- PUBLIC TYPES
375 typedef struct
376 {
377  // Output pins
378 
379  digital_out_t mck;
380  digital_out_t cs;
381 
382  // Input pins
383 
384  digital_in_t int_pin;
385 
386  // Modules
387 
388  spi_master_t spi;
389  pin_name_t chip_select;
390 
391 } adc9_t;
392 
396 typedef struct
397 {
398  // static variable
399  uint8_t dev_adr;
400  uint8_t reg;
401  uint8_t cmd;
402 
403 } adc9_rw_t;
404 
408 typedef struct
409 {
410  // Communication gpio pins
411 
412  pin_name_t miso;
413  pin_name_t mosi;
414  pin_name_t sck;
415  pin_name_t cs;
416 
417  // Additional gpio pins
418 
419  pin_name_t mck;
420  pin_name_t int_pin;
421 
422  // static variable
423 
424  uint32_t spi_speed;
425  uint8_t spi_mode;
426  spi_master_chip_select_polarity_t cs_polarity;
427 
428 } adc9_cfg_t;
429  // End types group
431 // ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
432 
437 #ifdef __cplusplus
438 extern "C"{
439 #endif
440 
450 
460 
469 void adc9_default_cfg ( adc9_t *ctx, adc9_rw_t *rw );
470 
483 (
484  adc9_t *ctx,
485  uint8_t *wr_buf,
486  uint16_t wr_len,
487  uint8_t *rd_buf,
488  uint16_t rd_len
489 );
490 
506 uint8_t adc9_write_fast_cmd ( adc9_t *ctx, adc9_rw_t *rw );
507 
524 uint8_t adc9_write_u8 ( adc9_t *ctx, adc9_rw_t *rw, uint8_t wr_data );
525 
543 uint8_t adc9_read_u8 ( adc9_t *ctx, adc9_rw_t *rw, uint8_t *rd_data );
544 
561 uint8_t adc9_write_u16 ( adc9_t *ctx, adc9_rw_t *rw, uint16_t wr_data );
562 
580 uint8_t adc9_read_u16 ( adc9_t *ctx, adc9_rw_t *rw, uint16_t *rd_data );
581 
598 uint8_t adc9_write_u24 ( adc9_t *ctx, adc9_rw_t *rw, uint32_t wr_data );
599 
617 uint8_t adc9_read_u24 ( adc9_t *ctx, adc9_rw_t *rw, uint32_t *rd_data );
618 
636 uint8_t adc9_read_u32 ( adc9_t *ctx, adc9_rw_t *rw, uint32_t *rd_data );
637 
647 uint8_t adc9_irq_pin_state ( adc9_t *ctx );
648 
664 uint8_t adc9_read_def_adc ( adc9_t *ctx, adc9_rw_t *rw, int32_t *rd_data );
665 
681 uint8_t adc9_read_24_left_adc ( adc9_t *ctx, adc9_rw_t *rw, int32_t *rd_data );
682 
698 uint8_t adc9_read_sign_adc ( adc9_t *ctx, adc9_rw_t *rw, int32_t *adc_val );
699 
716 uint8_t adc9_read_chan_adc ( adc9_t *ctx, adc9_rw_t *rw, int32_t *adc_val, uint8_t *chan );
717 
730 float adc9_volt_calc ( adc9_t *ctx, int32_t adc_val, uint16_t v_ref, uint8_t gain );
731 
732 #ifdef __cplusplus
733 }
734 #endif
735 #endif // _ADC9_H_
736  // End public_function group
739 
740 // ------------------------------------------------------------------------- END
adc9_read_chan_adc
uint8_t adc9_read_chan_adc(adc9_t *ctx, adc9_rw_t *rw, int32_t *adc_val, uint8_t *chan)
Read Channel and ADC value function.
adc9_read_u8
uint8_t adc9_read_u8(adc9_t *ctx, adc9_rw_t *rw, uint8_t *rd_data)
Read byte function.
adc9_t::int_pin
digital_in_t int_pin
Definition: adc9.h:384
adc9_cfg_t::spi_mode
uint8_t spi_mode
Definition: adc9.h:425
adc9_t::mck
digital_out_t mck
Definition: adc9.h:379
adc9_read_u16
uint8_t adc9_read_u16(adc9_t *ctx, adc9_rw_t *rw, uint16_t *rd_data)
Read word function.
adc9_cfg_t::mosi
pin_name_t mosi
Definition: adc9.h:413
ADC9_RETVAL
#define ADC9_RETVAL
Definition: adc9.h:67
adc9_generic_transfer
void adc9_generic_transfer(adc9_t *ctx, uint8_t *wr_buf, uint16_t wr_len, uint8_t *rd_buf, uint16_t rd_len)
Generic transfer function.
adc9_t::cs
digital_out_t cs
Definition: adc9.h:380
adc9_default_cfg
void adc9_default_cfg(adc9_t *ctx, adc9_rw_t *rw)
Click Default Configuration function.
adc9_rw_t::dev_adr
uint8_t dev_adr
Definition: adc9.h:399
adc9_t::chip_select
pin_name_t chip_select
Definition: adc9.h:389
adc9_read_24_left_adc
uint8_t adc9_read_24_left_adc(adc9_t *ctx, adc9_rw_t *rw, int32_t *rd_data)
Read left justified adc value function.
adc9_cfg_t::spi_speed
uint32_t spi_speed
Definition: adc9.h:424
adc9_write_u8
uint8_t adc9_write_u8(adc9_t *ctx, adc9_rw_t *rw, uint8_t wr_data)
Write byte function.
adc9_cfg_t::int_pin
pin_name_t int_pin
Definition: adc9.h:420
adc9_write_fast_cmd
uint8_t adc9_write_fast_cmd(adc9_t *ctx, adc9_rw_t *rw)
Write fast commands function.
adc9_read_u24
uint8_t adc9_read_u24(adc9_t *ctx, adc9_rw_t *rw, uint32_t *rd_data)
Read 24-bit function.
adc9_rw_t::cmd
uint8_t cmd
Definition: adc9.h:401
adc9_rw_t::reg
uint8_t reg
Definition: adc9.h:400
adc9_volt_calc
float adc9_volt_calc(adc9_t *ctx, int32_t adc_val, uint16_t v_ref, uint8_t gain)
Calculate Voltage function.
adc9_write_u24
uint8_t adc9_write_u24(adc9_t *ctx, adc9_rw_t *rw, uint32_t wr_data)
Write 24-bit function.
adc9_cfg_t::mck
pin_name_t mck
Definition: adc9.h:419
adc9_write_u16
uint8_t adc9_write_u16(adc9_t *ctx, adc9_rw_t *rw, uint16_t wr_data)
Write word function.
adc9_read_def_adc
uint8_t adc9_read_def_adc(adc9_t *ctx, adc9_rw_t *rw, int32_t *rd_data)
Read default adc format value function.
adc9_cfg_t::cs
pin_name_t cs
Definition: adc9.h:415
adc9_t
Click ctx object definition.
Definition: adc9.h:376
adc9_cfg_setup
void adc9_cfg_setup(adc9_cfg_t *cfg)
Config Object Initialization function.
adc9_read_sign_adc
uint8_t adc9_read_sign_adc(adc9_t *ctx, adc9_rw_t *rw, int32_t *adc_val)
Read Sign and ADC value function.
adc9_read_u32
uint8_t adc9_read_u32(adc9_t *ctx, adc9_rw_t *rw, uint32_t *rd_data)
Read 32-bit function.
adc9_cfg_t
Click configuration structure definition.
Definition: adc9.h:409
adc9_cfg_t::sck
pin_name_t sck
Definition: adc9.h:414
adc9_cfg_t::miso
pin_name_t miso
Definition: adc9.h:412
adc9_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: adc9.h:426
adc9_init
ADC9_RETVAL adc9_init(adc9_t *ctx, adc9_cfg_t *cfg)
Initialization function.
adc9_rw_t
Click wr object definition.
Definition: adc9.h:397
adc9_irq_pin_state
uint8_t adc9_irq_pin_state(adc9_t *ctx)
Get IRQ pin state function.
adc9_t::spi
spi_master_t spi
Definition: adc9.h:388