adc9  2.0.0.0
adc9.h
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1 /*
2  * MikroSDK - MikroE Software Development Kit
3  * Copyright© 2020 MikroElektronika d.o.o.
4  *
5  * Permission is hereby granted, free of charge, to any person
6  * obtaining a copy of this software and associated documentation
7  * files (the "Software"), to deal in the Software without restriction,
8  * including without limitation the rights to use, copy, modify, merge,
9  * publish, distribute, sublicense, and/or sell copies of the Software,
10  * and to permit persons to whom the Software is furnished to do so,
11  * subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be
14  * included in all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19  * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22  * OR OTHER DEALINGS IN THE SOFTWARE.
23  */
24 
33 // ----------------------------------------------------------------------------
34 
35 #ifndef ADC9_H
36 #define ADC9_H
37 
38 #include "mikrosdk_version.h"
39 
40 #ifdef __GNUC__
41 #if mikroSDK_GET_VERSION < 20800ul
42 #include "rcu_delays.h"
43 #else
44 #include "delays.h"
45 #endif
46 #endif
47 
48 #include "drv_digital_out.h"
49 #include "drv_digital_in.h"
50 #include "drv_spi_master.h"
51 
52 
53 // -------------------------------------------------------------- PUBLIC MACROS
64 #define ADC9_MAP_MIKROBUS( cfg, mikrobus ) \
65  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
66  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
67  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
68  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
69  cfg.mck = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
70  cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
71 
77 #define ADC9_RETVAL uint8_t
78 
79 #define ADC9_OK 0x00
80 #define ADC9_INIT_ERROR 0xFF
81 
87 #define ADC9_DEVICE_ADR 0x01
88 
94 #define ADC9_CMD_DONT_CARE 0x00
95 #define ADC9_CMD_STAT_READ 0x01
96 #define ADC9_CMD_INC_WRITE 0x02
97 #define ADC9_CMD_INC_READ 0x03
98 
104 #define ADC9_REG_ADC_DATA 0x00
105 #define ADC9_REG_CFG_0 0x01
106 #define ADC9_REG_CFG_1 0x02
107 #define ADC9_REG_CFG_2 0x03
108 #define ADC9_REG_CFG_3 0x04
109 #define ADC9_REG_IRQ 0x05
110 #define ADC9_REG_MUX 0x06
111 #define ADC9_REG_SCAN 0x07
112 #define ADC9_REG_TIMER 0x08
113 #define ADC9_REG_OFFSET_CAL 0x09
114 #define ADC9_REG_GAIN_CAL 0x0A
115 #define ADC9_RSV_REG_W_A 0x0B
116 #define ADC9_REG_LOCK 0x0D
117 #define ADC9_RSV_REG 0x0E
118 #define ADC9_REG_CRC_CFG 0x0F
119 
125 #define ADC9_CFG_0_VREF_SEL_0 0x00
126 #define ADC9_CFG_0_VREF_SEL_1 0x40
127 #define ADC9_CFG_0_VREF_SEL_2 0x80
128 #define ADC9_CFG_0_VREF_SEL_3 0xC0
129 
130 #define ADC9_CFG_0_CLK_SEL_0 0x00
131 #define ADC9_CFG_0_CLK_SEL_1 0x10
132 #define ADC9_CFG_0_CLK_SEL_2 0x20
133 #define ADC9_CFG_0_CLK_SEL_3 0x30
134 
135 #define ADC9_CFG_0_CS_SEL_0 0x00
136 #define ADC9_CFG_0_CS_SEL_1 0x04
137 #define ADC9_CFG_0_CS_SEL_2 0x08
138 #define ADC9_CFG_0_CS_SEL_3 0x0C
139 
140 #define ADC9_CFG_0_MODE_SHD_DEF 0x00
141 #define ADC9_CFG_0_MODE_SHD 0x01
142 #define ADC9_CFG_0_MODE_STANDBY 0x02
143 #define ADC9_CFG_0_MODE_CONV 0x03
144 
150 #define ADC9_CFG_1_PRE_1 0x00
151 #define ADC9_CFG_1_PRE_2 0x40
152 #define ADC9_CFG_1_PRE_4 0x80
153 #define ADC9_CFG_1_PRE_8 0xC0
154 
160 #define ADC9_CFG_1_OSR_98304 0x3C
161 #define ADC9_CFG_1_OSR_81920 0x38
162 #define ADC9_CFG_1_OSR_49152 0x34
163 #define ADC9_CFG_1_OSR_40960 0x30
164 #define ADC9_CFG_1_OSR_24576 0x2C
165 #define ADC9_CFG_1_OSR_20480 0x28
166 #define ADC9_CFG_1_OSR_16384 0x24
167 #define ADC9_CFG_1_OSR_8192 0x20
168 #define ADC9_CFG_1_OSR_4096 0x1C
169 #define ADC9_CFG_1_OSR_2048 0x18
170 #define ADC9_CFG_1_OSR_1024 0x14
171 #define ADC9_CFG_1_OSR_512 0x10
172 #define ADC9_CFG_1_OSR_256 0x0C
173 #define ADC9_CFG_1_OSR_128 0x08
174 #define ADC9_CFG_1_OSR_64 0x04
175 #define ADC9_CFG_1_OSR_32 0x00
176 
177 #define ADC9_CFG_1_DITHER_MAX 0x03
178 #define ADC9_CFG_1_DITHER_MED 0x02
179 #define ADC9_CFG_1_DITHER_MIN 0x01
180 #define ADC9_CFG_1_DITHER_DEF 0x00
181 
187 #define ADC9_CFG_2_BOOST_X_2 0xC0
188 #define ADC9_CFG_2_BOOST_X_1 0x80
189 #define ADC9_CFG_2_BOOST_X_066 0x40
190 #define ADC9_CFG_2_BOOST_X_05 0x00
191 
192 #define ADC9_CFG_2_GAIN_X_64 0x38
193 #define ADC9_CFG_2_GAIN_X_32 0x30
194 #define ADC9_CFG_2_GAIN_X_16 0x28
195 #define ADC9_CFG_2_GAIN_X_8 0x20
196 #define ADC9_CFG_2_GAIN_X_4 0x18
197 #define ADC9_CFG_2_GAIN_X_2 0x10
198 #define ADC9_CFG_2_GAIN_X_1 0x08
199 #define ADC9_CFG_2_GAIN_X_033 0x00
200 
201 #define ADC9_CFG_2_AZ_MUX_EN 0x04
202 #define ADC9_CFG_2_AZ_MUX_DIS 0x00
203 #define ADC9_CFG_2_AZ_VREF_EN 0x02
204 #define ADC9_CFG_2_AZ_VREF_DIS 0x00
205 
206 #define ADC9_CFG_2_AZ_FREQ_HIGH 0x01
207 #define ADC9_CFG_2_AZ_FREQ_LOW 0x00
208 
214 #define ADC9_CFG_3_CONV_MODE_CONT 0xC0
215 #define ADC9_CFG_3_CONV_MODE_STANDBY 0x80
216 #define ADC9_CFG_3_CONV_MODE_SHD 0x40
217 #define ADC9_CFG_3_CONV_MODE_SHD0 0x00
218 
219 #define ADC9_CFG_3_DATA_FORMAT_CH_ADC 0x30
220 #define ADC9_CFG_3_DATA_FORMAT_SIGN_ADC 0x20
221 #define ADC9_CFG_3_DATA_FORMAT_LEFT_JUST 0x10
222 #define ADC9_CFG_3_DATA_FORMAT_DEF 0x00
223 
224 #define ADC9_CFG_3_CRC_FORMAT_32 0x08
225 #define ADC9_CFG_3_CRC_FORMAT_16 0x00
226 
227 #define ADC9_CFG_3_CRC_COM_EN 0x04
228 #define ADC9_CFG_3_CRC_COM_DIS 0x00
229 
230 #define ADC9_CFG_3_CRC_OFF_CAL_EN 0x02
231 #define ADC9_CFG_3_CRC_OFF_CAL_DIS 0x00
232 #define ADC9_CFG_3_CRC_GAIN_CAL_EN 0x01
233 #define ADC9_CFG_3_CRC_GAIN_CAL_DIS 0x00
234 
240 #define ADC9_IRQ_MODE_MDAT 0x08
241 #define ADC9_IRQ_MODE_IRQ 0x00
242 #define ADC9_IRQ_MODE_LOGIC_HIGH 0x04
243 #define ADC9_IRQ_MODE_HIGH_Z 0x00
244 #define ADC9_IRQ_FASTCMD_EN 0x02
245 #define ADC9_IRQ_FASTCMD_DIS 0x00
246 #define ADC9_IRQ_STP_EN 0x01
247 #define ADC9_IRQ_STP_DIS 0x00
248 
254 #define ADC9_MUX_VIN_POS_NO_IN 0xF0
255 #define ADC9_MUX_VIN_POS_VCM 0xE0
256 #define ADC9_MUX_VIN_POS_TEMP 0xD0
257 #define ADC9_MUX_VIN_POS_VREF_EXT_MINUS 0xC0
258 #define ADC9_MUX_VIN_POS_VREF_EXT_PLUS 0xB0
259 #define ADC9_MUX_VIN_POS_VREF_INT 0xA0
260 #define ADC9_MUX_VIN_POS_AVDD 0x90
261 #define ADC9_MUX_VIN_POS_VSS 0x80
262 #define ADC9_MUX_VIN_POS_CH7 0x70
263 #define ADC9_MUX_VIN_POS_CH6 0x60
264 #define ADC9_MUX_VIN_POS_CH5 0x50
265 #define ADC9_MUX_VIN_POS_CH4 0x40
266 #define ADC9_MUX_VIN_POS_CH3 0x30
267 #define ADC9_MUX_VIN_POS_CH2 0x20
268 #define ADC9_MUX_VIN_POS_CH1 0x10
269 #define ADC9_MUX_VIN_POS_CH0 0x00
270 
276 #define ADC9_MUX_VIN_NEG_NO_IN 0x0F
277 #define ADC9_MUX_VIN_NEG_VCM 0x0E
278 #define ADC9_MUX_VIN_NEG_TEMP 0x0D
279 #define ADC9_MUX_VIN_NEG_VREF_EXT_MINUS 0x0C
280 #define ADC9_MUX_VIN_NEG_VREF_EXT_PLUS 0x0B
281 #define ADC9_MUX_VIN_NEG_VREF_INT 0x0A
282 #define ADC9_MUX_VIN_NEG_AVDD 0x09
283 #define ADC9_MUX_VIN_NEG_VSS 0x08
284 #define ADC9_MUX_VIN_NEG_CH7 0x07
285 #define ADC9_MUX_VIN_NEG_CH6 0x06
286 #define ADC9_MUX_VIN_NEG_CH5 0x05
287 #define ADC9_MUX_VIN_NEG_CH4 0x04
288 #define ADC9_MUX_VIN_NEG_CH3 0x03
289 #define ADC9_MUX_VIN_NEG_CH2 0x02
290 #define ADC9_MUX_VIN_NEG_CH1 0x01
291 #define ADC9_MUX_VIN_NEG_CH0 0x00
292 
298 #define ADC9_SCAN_DLY_DM_CLK_X_512 0x00E00000
299 #define ADC9_SCAN_DLY_DM_CLK_X_256 0x00C00000
300 #define ADC9_SCAN_DLY_DM_CLK_X_128 0x00A00000
301 #define ADC9_SCAN_DLY_DM_CLK_X_64 0x00800000
302 #define ADC9_SCAN_DLY_DM_CLK_X_32 0x00600000
303 #define ADC9_SCAN_DLY_DM_CLK_X_16 0x00400000
304 #define ADC9_SCAN_DLY_DM_CLK_X_8 0x00200000
305 #define ADC9_SCAN_DLY_NO_DELAY 0x00000000
306 
307 #define ADC9_SCAN_PSAV_VREF_OFF 0x00100000
308 #define ADC9_SCAN_PSAV_VREF_ON 0x00000000
309 
310 #define ADC9_SCAN_OFFSET 0x00008000
311 #define ADC9_SCAN_VREF 0x00004000
312 #define ADC9_SCAN_AVDD 0x00002000
313 #define ADC9_SCAN_TEMP 0x00001000
314 #define ADC9_SCAN_DIFF_D 0x00000800
315 #define ADC9_SCAN_DIFF_C 0x00000400
316 #define ADC9_SCAN_DIFF_B 0x00000200
317 #define ADC9_SCAN_DIFF_A 0x00000100
318 #define ADC9_SCAN_CH7 0x00000080
319 #define ADC9_SCAN_CH6 0x00000040
320 #define ADC9_SCAN_CH5 0x00000020
321 #define ADC9_SCAN_CH4 0x00000010
322 #define ADC9_SCAN_CH3 0x00000008
323 #define ADC9_SCAN_CH2 0x00000004
324 #define ADC9_SCAN_CH1 0x00000002
325 #define ADC9_SCAN_CH0 0x00000001
326 
332 #define ADC9_TIMER_DLY_DMCLK_X_16777215 0x00FFFFFF
333 #define ADC9_TIMER_DLY_DMCLK_X_8388607 0x007FFFFF
334 #define ADC9_TIMER_DLY_DMCLK_X_4194303 0x003FFFFF
335 #define ADC9_TIMER_DLY_DMCLK_X_2097151 0x001FFFFF
336 #define ADC9_TIMER_DLY_DMCLK_X_1048575 0x000FFFFF
337 #define ADC9_TIMER_DLY_DMCLK_X_524287 0x0007FFFF
338 #define ADC9_TIMER_DLY_DMCLK_X_262143 0x0003FFFF
339 #define ADC9_TIMER_DLY_DMCLK_X_131071 0x0001FFFF
340 #define ADC9_TIMER_DLY_DMCLK_X_65535 0x0000FFFF
341 #define ADC9_TIMER_DLY_DMCLK_X_32767 0x00007FFF
342 #define ADC9_TIMER_DLY_DMCLK_X_16383 0x00003FFF
343 #define ADC9_TIMER_DLY_DMCLK_X_8191 0x00001FFF
344 #define ADC9_TIMER_DLY_DMCLK_X_4095 0x00000FFF
345 #define ADC9_TIMER_DLY_DMCLK_X_2047 0x000007FF
346 #define ADC9_TIMER_DLY_DMCLK_X_1023 0x000003FF
347 #define ADC9_TIMER_DLY_DMCLK_X_511 0x000001FF
348 #define ADC9_TIMER_DLY_DMCLK_X_255 0x000000FF
349 #define ADC9_TIMER_DLY_DMCLK_X_127 0x0000007F
350 #define ADC9_TIMER_DLY_DMCLK_X_63 0x0000003F
351 #define ADC9_TIMER_DLY_DMCLK_X_31 0x0000001F
352 #define ADC9_TIMER_DLY_DMCLK_X_15 0x0000000F
353 #define ADC9_TIMER_DLY_DMCLK_X_2 0x00000002
354 #define ADC9_TIMER_DLY_DMCLK_X_1 0x00000001
355 #define ADC9_TIMER_DLY_NO_DELAY 0x00000000
356 
362 #define ADC9_FAST_CMD_ADC_CONV_START 0x28
363 #define ADC9_FAST_CMD_ADC_STANDBY_MODE 0x2C
364 #define ADC9_FAST_CMD_ADC_SHUTDOWN_MODE 0x30
365 #define ADC9_FAST_CMD_FULL_SHUTDOWN_MODE 0x34
366 #define ADC9_FAST_CMD_DEV_FULL_RESET 0x38
367 
373 #define ADC9_CALC_COEF 8388608
374  // End group macro
376 // --------------------------------------------------------------- PUBLIC TYPES
385 typedef struct
386 {
387  // Output pins
388 
389  digital_out_t mck;
390  digital_out_t cs;
391 
392  // Input pins
393 
394  digital_in_t int_pin;
395 
396  // Modules
397 
398  spi_master_t spi;
399  pin_name_t chip_select;
400 
401 } adc9_t;
402 
406 typedef struct
407 {
408  // static variable
409  uint8_t dev_adr;
410  uint8_t reg;
411  uint8_t cmd;
412 
413 } adc9_rw_t;
414 
418 typedef struct
419 {
420  // Communication gpio pins
421 
422  pin_name_t miso;
423  pin_name_t mosi;
424  pin_name_t sck;
425  pin_name_t cs;
426 
427  // Additional gpio pins
428 
429  pin_name_t mck;
430  pin_name_t int_pin;
431 
432  // static variable
433 
434  uint32_t spi_speed;
435  uint8_t spi_mode;
436  spi_master_chip_select_polarity_t cs_polarity;
437 
438 } adc9_cfg_t;
439  // End types group
441 // ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
442 
447 #ifdef __cplusplus
448 extern "C"{
449 #endif
450 
460 
470 
479 void adc9_default_cfg ( adc9_t *ctx, adc9_rw_t *rw );
480 
493 (
494  adc9_t *ctx,
495  uint8_t *wr_buf,
496  uint16_t wr_len,
497  uint8_t *rd_buf,
498  uint16_t rd_len
499 );
500 
516 uint8_t adc9_write_fast_cmd ( adc9_t *ctx, adc9_rw_t *rw );
517 
534 uint8_t adc9_write_u8 ( adc9_t *ctx, adc9_rw_t *rw, uint8_t wr_data );
535 
553 uint8_t adc9_read_u8 ( adc9_t *ctx, adc9_rw_t *rw, uint8_t *rd_data );
554 
571 uint8_t adc9_write_u16 ( adc9_t *ctx, adc9_rw_t *rw, uint16_t wr_data );
572 
590 uint8_t adc9_read_u16 ( adc9_t *ctx, adc9_rw_t *rw, uint16_t *rd_data );
591 
608 uint8_t adc9_write_u24 ( adc9_t *ctx, adc9_rw_t *rw, uint32_t wr_data );
609 
627 uint8_t adc9_read_u24 ( adc9_t *ctx, adc9_rw_t *rw, uint32_t *rd_data );
628 
646 uint8_t adc9_read_u32 ( adc9_t *ctx, adc9_rw_t *rw, uint32_t *rd_data );
647 
657 uint8_t adc9_irq_pin_state ( adc9_t *ctx );
658 
674 uint8_t adc9_read_def_adc ( adc9_t *ctx, adc9_rw_t *rw, int32_t *rd_data );
675 
691 uint8_t adc9_read_24_left_adc ( adc9_t *ctx, adc9_rw_t *rw, int32_t *rd_data );
692 
708 uint8_t adc9_read_sign_adc ( adc9_t *ctx, adc9_rw_t *rw, int32_t *adc_val );
709 
726 uint8_t adc9_read_chan_adc ( adc9_t *ctx, adc9_rw_t *rw, int32_t *adc_val, uint8_t *chan );
727 
740 float adc9_volt_calc ( adc9_t *ctx, int32_t adc_val, uint16_t v_ref, uint8_t gain );
741 
742 #ifdef __cplusplus
743 }
744 #endif
745 #endif // _ADC9_H_
746  // End public_function group
749 
750 // ------------------------------------------------------------------------- END
adc9_read_chan_adc
uint8_t adc9_read_chan_adc(adc9_t *ctx, adc9_rw_t *rw, int32_t *adc_val, uint8_t *chan)
Read Channel and ADC value function.
adc9_read_u8
uint8_t adc9_read_u8(adc9_t *ctx, adc9_rw_t *rw, uint8_t *rd_data)
Read byte function.
adc9_t::int_pin
digital_in_t int_pin
Definition: adc9.h:394
adc9_cfg_t::spi_mode
uint8_t spi_mode
Definition: adc9.h:435
adc9_t::mck
digital_out_t mck
Definition: adc9.h:389
adc9_read_u16
uint8_t adc9_read_u16(adc9_t *ctx, adc9_rw_t *rw, uint16_t *rd_data)
Read word function.
adc9_cfg_t::mosi
pin_name_t mosi
Definition: adc9.h:423
ADC9_RETVAL
#define ADC9_RETVAL
Definition: adc9.h:77
adc9_generic_transfer
void adc9_generic_transfer(adc9_t *ctx, uint8_t *wr_buf, uint16_t wr_len, uint8_t *rd_buf, uint16_t rd_len)
Generic transfer function.
adc9_t::cs
digital_out_t cs
Definition: adc9.h:390
adc9_default_cfg
void adc9_default_cfg(adc9_t *ctx, adc9_rw_t *rw)
Click Default Configuration function.
adc9_rw_t::dev_adr
uint8_t dev_adr
Definition: adc9.h:409
adc9_t::chip_select
pin_name_t chip_select
Definition: adc9.h:399
adc9_read_24_left_adc
uint8_t adc9_read_24_left_adc(adc9_t *ctx, adc9_rw_t *rw, int32_t *rd_data)
Read left justified adc value function.
adc9_cfg_t::spi_speed
uint32_t spi_speed
Definition: adc9.h:434
adc9_write_u8
uint8_t adc9_write_u8(adc9_t *ctx, adc9_rw_t *rw, uint8_t wr_data)
Write byte function.
adc9_cfg_t::int_pin
pin_name_t int_pin
Definition: adc9.h:430
adc9_write_fast_cmd
uint8_t adc9_write_fast_cmd(adc9_t *ctx, adc9_rw_t *rw)
Write fast commands function.
adc9_read_u24
uint8_t adc9_read_u24(adc9_t *ctx, adc9_rw_t *rw, uint32_t *rd_data)
Read 24-bit function.
adc9_rw_t::cmd
uint8_t cmd
Definition: adc9.h:411
adc9_rw_t::reg
uint8_t reg
Definition: adc9.h:410
adc9_volt_calc
float adc9_volt_calc(adc9_t *ctx, int32_t adc_val, uint16_t v_ref, uint8_t gain)
Calculate Voltage function.
adc9_write_u24
uint8_t adc9_write_u24(adc9_t *ctx, adc9_rw_t *rw, uint32_t wr_data)
Write 24-bit function.
adc9_cfg_t::mck
pin_name_t mck
Definition: adc9.h:429
adc9_write_u16
uint8_t adc9_write_u16(adc9_t *ctx, adc9_rw_t *rw, uint16_t wr_data)
Write word function.
adc9_read_def_adc
uint8_t adc9_read_def_adc(adc9_t *ctx, adc9_rw_t *rw, int32_t *rd_data)
Read default adc format value function.
adc9_cfg_t::cs
pin_name_t cs
Definition: adc9.h:425
adc9_t
Click ctx object definition.
Definition: adc9.h:386
adc9_cfg_setup
void adc9_cfg_setup(adc9_cfg_t *cfg)
Config Object Initialization function.
adc9_read_sign_adc
uint8_t adc9_read_sign_adc(adc9_t *ctx, adc9_rw_t *rw, int32_t *adc_val)
Read Sign and ADC value function.
adc9_read_u32
uint8_t adc9_read_u32(adc9_t *ctx, adc9_rw_t *rw, uint32_t *rd_data)
Read 32-bit function.
adc9_cfg_t
Click configuration structure definition.
Definition: adc9.h:419
adc9_cfg_t::sck
pin_name_t sck
Definition: adc9.h:424
adc9_cfg_t::miso
pin_name_t miso
Definition: adc9.h:422
adc9_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: adc9.h:436
adc9_init
ADC9_RETVAL adc9_init(adc9_t *ctx, adc9_cfg_t *cfg)
Initialization function.
adc9_rw_t
Click wr object definition.
Definition: adc9.h:407
adc9_irq_pin_state
uint8_t adc9_irq_pin_state(adc9_t *ctx)
Get IRQ pin state function.
adc9_t::spi
spi_master_t spi
Definition: adc9.h:398