adc9  2.0.0.0
adc9.h
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1 /*
2  * MikroSDK - MikroE Software Development Kit
3  * Copyright© 2020 MikroElektronika d.o.o.
4  *
5  * Permission is hereby granted, free of charge, to any person
6  * obtaining a copy of this software and associated documentation
7  * files (the "Software"), to deal in the Software without restriction,
8  * including without limitation the rights to use, copy, modify, merge,
9  * publish, distribute, sublicense, and/or sell copies of the Software,
10  * and to permit persons to whom the Software is furnished to do so,
11  * subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be
14  * included in all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19  * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22  * OR OTHER DEALINGS IN THE SOFTWARE.
23  */
24 
33 // ----------------------------------------------------------------------------
34 
35 #ifndef ADC9_H
36 #define ADC9_H
37 
42 #ifdef PREINIT_SUPPORTED
43 #include "preinit.h"
44 #endif
45 
46 #ifdef MikroCCoreVersion
47  #if MikroCCoreVersion >= 1
48  #include "delays.h"
49  #endif
50 #endif
51 
52 #include "drv_digital_out.h"
53 #include "drv_digital_in.h"
54 #include "drv_spi_master.h"
55 
56 
57 // -------------------------------------------------------------- PUBLIC MACROS
68 #define ADC9_MAP_MIKROBUS( cfg, mikrobus ) \
69  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
70  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
71  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
72  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
73  cfg.mck = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
74  cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
75 
81 #define ADC9_RETVAL uint8_t
82 
83 #define ADC9_OK 0x00
84 #define ADC9_INIT_ERROR 0xFF
85 
91 #define ADC9_DEVICE_ADR 0x01
92 
98 #define ADC9_CMD_DONT_CARE 0x00
99 #define ADC9_CMD_STAT_READ 0x01
100 #define ADC9_CMD_INC_WRITE 0x02
101 #define ADC9_CMD_INC_READ 0x03
102 
108 #define ADC9_REG_ADC_DATA 0x00
109 #define ADC9_REG_CFG_0 0x01
110 #define ADC9_REG_CFG_1 0x02
111 #define ADC9_REG_CFG_2 0x03
112 #define ADC9_REG_CFG_3 0x04
113 #define ADC9_REG_IRQ 0x05
114 #define ADC9_REG_MUX 0x06
115 #define ADC9_REG_SCAN 0x07
116 #define ADC9_REG_TIMER 0x08
117 #define ADC9_REG_OFFSET_CAL 0x09
118 #define ADC9_REG_GAIN_CAL 0x0A
119 #define ADC9_RSV_REG_W_A 0x0B
120 #define ADC9_REG_LOCK 0x0D
121 #define ADC9_RSV_REG 0x0E
122 #define ADC9_REG_CRC_CFG 0x0F
123 
129 #define ADC9_CFG_0_VREF_SEL_0 0x00
130 #define ADC9_CFG_0_VREF_SEL_1 0x40
131 #define ADC9_CFG_0_VREF_SEL_2 0x80
132 #define ADC9_CFG_0_VREF_SEL_3 0xC0
133 
134 #define ADC9_CFG_0_CLK_SEL_0 0x00
135 #define ADC9_CFG_0_CLK_SEL_1 0x10
136 #define ADC9_CFG_0_CLK_SEL_2 0x20
137 #define ADC9_CFG_0_CLK_SEL_3 0x30
138 
139 #define ADC9_CFG_0_CS_SEL_0 0x00
140 #define ADC9_CFG_0_CS_SEL_1 0x04
141 #define ADC9_CFG_0_CS_SEL_2 0x08
142 #define ADC9_CFG_0_CS_SEL_3 0x0C
143 
144 #define ADC9_CFG_0_MODE_SHD_DEF 0x00
145 #define ADC9_CFG_0_MODE_SHD 0x01
146 #define ADC9_CFG_0_MODE_STANDBY 0x02
147 #define ADC9_CFG_0_MODE_CONV 0x03
148 
154 #define ADC9_CFG_1_PRE_1 0x00
155 #define ADC9_CFG_1_PRE_2 0x40
156 #define ADC9_CFG_1_PRE_4 0x80
157 #define ADC9_CFG_1_PRE_8 0xC0
158 
164 #define ADC9_CFG_1_OSR_98304 0x3C
165 #define ADC9_CFG_1_OSR_81920 0x38
166 #define ADC9_CFG_1_OSR_49152 0x34
167 #define ADC9_CFG_1_OSR_40960 0x30
168 #define ADC9_CFG_1_OSR_24576 0x2C
169 #define ADC9_CFG_1_OSR_20480 0x28
170 #define ADC9_CFG_1_OSR_16384 0x24
171 #define ADC9_CFG_1_OSR_8192 0x20
172 #define ADC9_CFG_1_OSR_4096 0x1C
173 #define ADC9_CFG_1_OSR_2048 0x18
174 #define ADC9_CFG_1_OSR_1024 0x14
175 #define ADC9_CFG_1_OSR_512 0x10
176 #define ADC9_CFG_1_OSR_256 0x0C
177 #define ADC9_CFG_1_OSR_128 0x08
178 #define ADC9_CFG_1_OSR_64 0x04
179 #define ADC9_CFG_1_OSR_32 0x00
180 
181 #define ADC9_CFG_1_DITHER_MAX 0x03
182 #define ADC9_CFG_1_DITHER_MED 0x02
183 #define ADC9_CFG_1_DITHER_MIN 0x01
184 #define ADC9_CFG_1_DITHER_DEF 0x00
185 
191 #define ADC9_CFG_2_BOOST_X_2 0xC0
192 #define ADC9_CFG_2_BOOST_X_1 0x80
193 #define ADC9_CFG_2_BOOST_X_066 0x40
194 #define ADC9_CFG_2_BOOST_X_05 0x00
195 
196 #define ADC9_CFG_2_GAIN_X_64 0x38
197 #define ADC9_CFG_2_GAIN_X_32 0x30
198 #define ADC9_CFG_2_GAIN_X_16 0x28
199 #define ADC9_CFG_2_GAIN_X_8 0x20
200 #define ADC9_CFG_2_GAIN_X_4 0x18
201 #define ADC9_CFG_2_GAIN_X_2 0x10
202 #define ADC9_CFG_2_GAIN_X_1 0x08
203 #define ADC9_CFG_2_GAIN_X_033 0x00
204 
205 #define ADC9_CFG_2_AZ_MUX_EN 0x04
206 #define ADC9_CFG_2_AZ_MUX_DIS 0x00
207 #define ADC9_CFG_2_AZ_VREF_EN 0x02
208 #define ADC9_CFG_2_AZ_VREF_DIS 0x00
209 
210 #define ADC9_CFG_2_AZ_FREQ_HIGH 0x01
211 #define ADC9_CFG_2_AZ_FREQ_LOW 0x00
212 
218 #define ADC9_CFG_3_CONV_MODE_CONT 0xC0
219 #define ADC9_CFG_3_CONV_MODE_STANDBY 0x80
220 #define ADC9_CFG_3_CONV_MODE_SHD 0x40
221 #define ADC9_CFG_3_CONV_MODE_SHD0 0x00
222 
223 #define ADC9_CFG_3_DATA_FORMAT_CH_ADC 0x30
224 #define ADC9_CFG_3_DATA_FORMAT_SIGN_ADC 0x20
225 #define ADC9_CFG_3_DATA_FORMAT_LEFT_JUST 0x10
226 #define ADC9_CFG_3_DATA_FORMAT_DEF 0x00
227 
228 #define ADC9_CFG_3_CRC_FORMAT_32 0x08
229 #define ADC9_CFG_3_CRC_FORMAT_16 0x00
230 
231 #define ADC9_CFG_3_CRC_COM_EN 0x04
232 #define ADC9_CFG_3_CRC_COM_DIS 0x00
233 
234 #define ADC9_CFG_3_CRC_OFF_CAL_EN 0x02
235 #define ADC9_CFG_3_CRC_OFF_CAL_DIS 0x00
236 #define ADC9_CFG_3_CRC_GAIN_CAL_EN 0x01
237 #define ADC9_CFG_3_CRC_GAIN_CAL_DIS 0x00
238 
244 #define ADC9_IRQ_MODE_MDAT 0x08
245 #define ADC9_IRQ_MODE_IRQ 0x00
246 #define ADC9_IRQ_MODE_LOGIC_HIGH 0x04
247 #define ADC9_IRQ_MODE_HIGH_Z 0x00
248 #define ADC9_IRQ_FASTCMD_EN 0x02
249 #define ADC9_IRQ_FASTCMD_DIS 0x00
250 #define ADC9_IRQ_STP_EN 0x01
251 #define ADC9_IRQ_STP_DIS 0x00
252 
258 #define ADC9_MUX_VIN_POS_NO_IN 0xF0
259 #define ADC9_MUX_VIN_POS_VCM 0xE0
260 #define ADC9_MUX_VIN_POS_TEMP 0xD0
261 #define ADC9_MUX_VIN_POS_VREF_EXT_MINUS 0xC0
262 #define ADC9_MUX_VIN_POS_VREF_EXT_PLUS 0xB0
263 #define ADC9_MUX_VIN_POS_VREF_INT 0xA0
264 #define ADC9_MUX_VIN_POS_AVDD 0x90
265 #define ADC9_MUX_VIN_POS_VSS 0x80
266 #define ADC9_MUX_VIN_POS_CH7 0x70
267 #define ADC9_MUX_VIN_POS_CH6 0x60
268 #define ADC9_MUX_VIN_POS_CH5 0x50
269 #define ADC9_MUX_VIN_POS_CH4 0x40
270 #define ADC9_MUX_VIN_POS_CH3 0x30
271 #define ADC9_MUX_VIN_POS_CH2 0x20
272 #define ADC9_MUX_VIN_POS_CH1 0x10
273 #define ADC9_MUX_VIN_POS_CH0 0x00
274 
280 #define ADC9_MUX_VIN_NEG_NO_IN 0x0F
281 #define ADC9_MUX_VIN_NEG_VCM 0x0E
282 #define ADC9_MUX_VIN_NEG_TEMP 0x0D
283 #define ADC9_MUX_VIN_NEG_VREF_EXT_MINUS 0x0C
284 #define ADC9_MUX_VIN_NEG_VREF_EXT_PLUS 0x0B
285 #define ADC9_MUX_VIN_NEG_VREF_INT 0x0A
286 #define ADC9_MUX_VIN_NEG_AVDD 0x09
287 #define ADC9_MUX_VIN_NEG_VSS 0x08
288 #define ADC9_MUX_VIN_NEG_CH7 0x07
289 #define ADC9_MUX_VIN_NEG_CH6 0x06
290 #define ADC9_MUX_VIN_NEG_CH5 0x05
291 #define ADC9_MUX_VIN_NEG_CH4 0x04
292 #define ADC9_MUX_VIN_NEG_CH3 0x03
293 #define ADC9_MUX_VIN_NEG_CH2 0x02
294 #define ADC9_MUX_VIN_NEG_CH1 0x01
295 #define ADC9_MUX_VIN_NEG_CH0 0x00
296 
302 #define ADC9_SCAN_DLY_DM_CLK_X_512 0x00E00000
303 #define ADC9_SCAN_DLY_DM_CLK_X_256 0x00C00000
304 #define ADC9_SCAN_DLY_DM_CLK_X_128 0x00A00000
305 #define ADC9_SCAN_DLY_DM_CLK_X_64 0x00800000
306 #define ADC9_SCAN_DLY_DM_CLK_X_32 0x00600000
307 #define ADC9_SCAN_DLY_DM_CLK_X_16 0x00400000
308 #define ADC9_SCAN_DLY_DM_CLK_X_8 0x00200000
309 #define ADC9_SCAN_DLY_NO_DELAY 0x00000000
310 
311 #define ADC9_SCAN_PSAV_VREF_OFF 0x00100000
312 #define ADC9_SCAN_PSAV_VREF_ON 0x00000000
313 
314 #define ADC9_SCAN_OFFSET 0x00008000
315 #define ADC9_SCAN_VREF 0x00004000
316 #define ADC9_SCAN_AVDD 0x00002000
317 #define ADC9_SCAN_TEMP 0x00001000
318 #define ADC9_SCAN_DIFF_D 0x00000800
319 #define ADC9_SCAN_DIFF_C 0x00000400
320 #define ADC9_SCAN_DIFF_B 0x00000200
321 #define ADC9_SCAN_DIFF_A 0x00000100
322 #define ADC9_SCAN_CH7 0x00000080
323 #define ADC9_SCAN_CH6 0x00000040
324 #define ADC9_SCAN_CH5 0x00000020
325 #define ADC9_SCAN_CH4 0x00000010
326 #define ADC9_SCAN_CH3 0x00000008
327 #define ADC9_SCAN_CH2 0x00000004
328 #define ADC9_SCAN_CH1 0x00000002
329 #define ADC9_SCAN_CH0 0x00000001
330 
336 #define ADC9_TIMER_DLY_DMCLK_X_16777215 0x00FFFFFF
337 #define ADC9_TIMER_DLY_DMCLK_X_8388607 0x007FFFFF
338 #define ADC9_TIMER_DLY_DMCLK_X_4194303 0x003FFFFF
339 #define ADC9_TIMER_DLY_DMCLK_X_2097151 0x001FFFFF
340 #define ADC9_TIMER_DLY_DMCLK_X_1048575 0x000FFFFF
341 #define ADC9_TIMER_DLY_DMCLK_X_524287 0x0007FFFF
342 #define ADC9_TIMER_DLY_DMCLK_X_262143 0x0003FFFF
343 #define ADC9_TIMER_DLY_DMCLK_X_131071 0x0001FFFF
344 #define ADC9_TIMER_DLY_DMCLK_X_65535 0x0000FFFF
345 #define ADC9_TIMER_DLY_DMCLK_X_32767 0x00007FFF
346 #define ADC9_TIMER_DLY_DMCLK_X_16383 0x00003FFF
347 #define ADC9_TIMER_DLY_DMCLK_X_8191 0x00001FFF
348 #define ADC9_TIMER_DLY_DMCLK_X_4095 0x00000FFF
349 #define ADC9_TIMER_DLY_DMCLK_X_2047 0x000007FF
350 #define ADC9_TIMER_DLY_DMCLK_X_1023 0x000003FF
351 #define ADC9_TIMER_DLY_DMCLK_X_511 0x000001FF
352 #define ADC9_TIMER_DLY_DMCLK_X_255 0x000000FF
353 #define ADC9_TIMER_DLY_DMCLK_X_127 0x0000007F
354 #define ADC9_TIMER_DLY_DMCLK_X_63 0x0000003F
355 #define ADC9_TIMER_DLY_DMCLK_X_31 0x0000001F
356 #define ADC9_TIMER_DLY_DMCLK_X_15 0x0000000F
357 #define ADC9_TIMER_DLY_DMCLK_X_2 0x00000002
358 #define ADC9_TIMER_DLY_DMCLK_X_1 0x00000001
359 #define ADC9_TIMER_DLY_NO_DELAY 0x00000000
360 
366 #define ADC9_FAST_CMD_ADC_CONV_START 0x28
367 #define ADC9_FAST_CMD_ADC_STANDBY_MODE 0x2C
368 #define ADC9_FAST_CMD_ADC_SHUTDOWN_MODE 0x30
369 #define ADC9_FAST_CMD_FULL_SHUTDOWN_MODE 0x34
370 #define ADC9_FAST_CMD_DEV_FULL_RESET 0x38
371 
377 #define ADC9_CALC_COEF 8388608
378  // End group macro
380 // --------------------------------------------------------------- PUBLIC TYPES
389 typedef struct
390 {
391  // Output pins
392 
393  digital_out_t mck;
394  digital_out_t cs;
395 
396  // Input pins
397 
398  digital_in_t int_pin;
399 
400  // Modules
401 
402  spi_master_t spi;
403  pin_name_t chip_select;
404 
405 } adc9_t;
406 
410 typedef struct
411 {
412  // static variable
413  uint8_t dev_adr;
414  uint8_t reg;
415  uint8_t cmd;
416 
417 } adc9_rw_t;
418 
422 typedef struct
423 {
424  // Communication gpio pins
425 
426  pin_name_t miso;
427  pin_name_t mosi;
428  pin_name_t sck;
429  pin_name_t cs;
430 
431  // Additional gpio pins
432 
433  pin_name_t mck;
434  pin_name_t int_pin;
435 
436  // static variable
437 
438  uint32_t spi_speed;
439  uint8_t spi_mode;
440  spi_master_chip_select_polarity_t cs_polarity;
441 
442 } adc9_cfg_t;
443  // End types group
445 // ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
446 
451 #ifdef __cplusplus
452 extern "C"{
453 #endif
454 
464 
474 
483 void adc9_default_cfg ( adc9_t *ctx, adc9_rw_t *rw );
484 
497 (
498  adc9_t *ctx,
499  uint8_t *wr_buf,
500  uint16_t wr_len,
501  uint8_t *rd_buf,
502  uint16_t rd_len
503 );
504 
520 uint8_t adc9_write_fast_cmd ( adc9_t *ctx, adc9_rw_t *rw );
521 
538 uint8_t adc9_write_u8 ( adc9_t *ctx, adc9_rw_t *rw, uint8_t wr_data );
539 
557 uint8_t adc9_read_u8 ( adc9_t *ctx, adc9_rw_t *rw, uint8_t *rd_data );
558 
575 uint8_t adc9_write_u16 ( adc9_t *ctx, adc9_rw_t *rw, uint16_t wr_data );
576 
594 uint8_t adc9_read_u16 ( adc9_t *ctx, adc9_rw_t *rw, uint16_t *rd_data );
595 
612 uint8_t adc9_write_u24 ( adc9_t *ctx, adc9_rw_t *rw, uint32_t wr_data );
613 
631 uint8_t adc9_read_u24 ( adc9_t *ctx, adc9_rw_t *rw, uint32_t *rd_data );
632 
650 uint8_t adc9_read_u32 ( adc9_t *ctx, adc9_rw_t *rw, uint32_t *rd_data );
651 
661 uint8_t adc9_irq_pin_state ( adc9_t *ctx );
662 
678 uint8_t adc9_read_def_adc ( adc9_t *ctx, adc9_rw_t *rw, int32_t *rd_data );
679 
695 uint8_t adc9_read_24_left_adc ( adc9_t *ctx, adc9_rw_t *rw, int32_t *rd_data );
696 
712 uint8_t adc9_read_sign_adc ( adc9_t *ctx, adc9_rw_t *rw, int32_t *adc_val );
713 
730 uint8_t adc9_read_chan_adc ( adc9_t *ctx, adc9_rw_t *rw, int32_t *adc_val, uint8_t *chan );
731 
744 float adc9_volt_calc ( adc9_t *ctx, int32_t adc_val, uint16_t v_ref, uint8_t gain );
745 
746 #ifdef __cplusplus
747 }
748 #endif
749 #endif // _ADC9_H_
750  // End public_function group
753 
754 // ------------------------------------------------------------------------- END
adc9_read_chan_adc
uint8_t adc9_read_chan_adc(adc9_t *ctx, adc9_rw_t *rw, int32_t *adc_val, uint8_t *chan)
Read Channel and ADC value function.
adc9_read_u8
uint8_t adc9_read_u8(adc9_t *ctx, adc9_rw_t *rw, uint8_t *rd_data)
Read byte function.
adc9_t::int_pin
digital_in_t int_pin
Definition: adc9.h:398
adc9_cfg_t::spi_mode
uint8_t spi_mode
Definition: adc9.h:439
adc9_t::mck
digital_out_t mck
Definition: adc9.h:393
adc9_read_u16
uint8_t adc9_read_u16(adc9_t *ctx, adc9_rw_t *rw, uint16_t *rd_data)
Read word function.
adc9_cfg_t::mosi
pin_name_t mosi
Definition: adc9.h:427
ADC9_RETVAL
#define ADC9_RETVAL
Definition: adc9.h:81
adc9_generic_transfer
void adc9_generic_transfer(adc9_t *ctx, uint8_t *wr_buf, uint16_t wr_len, uint8_t *rd_buf, uint16_t rd_len)
Generic transfer function.
adc9_t::cs
digital_out_t cs
Definition: adc9.h:394
adc9_default_cfg
void adc9_default_cfg(adc9_t *ctx, adc9_rw_t *rw)
Click Default Configuration function.
adc9_rw_t::dev_adr
uint8_t dev_adr
Definition: adc9.h:413
adc9_t::chip_select
pin_name_t chip_select
Definition: adc9.h:403
adc9_read_24_left_adc
uint8_t adc9_read_24_left_adc(adc9_t *ctx, adc9_rw_t *rw, int32_t *rd_data)
Read left justified adc value function.
adc9_cfg_t::spi_speed
uint32_t spi_speed
Definition: adc9.h:438
adc9_write_u8
uint8_t adc9_write_u8(adc9_t *ctx, adc9_rw_t *rw, uint8_t wr_data)
Write byte function.
adc9_cfg_t::int_pin
pin_name_t int_pin
Definition: adc9.h:434
adc9_write_fast_cmd
uint8_t adc9_write_fast_cmd(adc9_t *ctx, adc9_rw_t *rw)
Write fast commands function.
adc9_read_u24
uint8_t adc9_read_u24(adc9_t *ctx, adc9_rw_t *rw, uint32_t *rd_data)
Read 24-bit function.
adc9_rw_t::cmd
uint8_t cmd
Definition: adc9.h:415
adc9_rw_t::reg
uint8_t reg
Definition: adc9.h:414
adc9_volt_calc
float adc9_volt_calc(adc9_t *ctx, int32_t adc_val, uint16_t v_ref, uint8_t gain)
Calculate Voltage function.
adc9_write_u24
uint8_t adc9_write_u24(adc9_t *ctx, adc9_rw_t *rw, uint32_t wr_data)
Write 24-bit function.
adc9_cfg_t::mck
pin_name_t mck
Definition: adc9.h:433
adc9_write_u16
uint8_t adc9_write_u16(adc9_t *ctx, adc9_rw_t *rw, uint16_t wr_data)
Write word function.
adc9_read_def_adc
uint8_t adc9_read_def_adc(adc9_t *ctx, adc9_rw_t *rw, int32_t *rd_data)
Read default adc format value function.
adc9_cfg_t::cs
pin_name_t cs
Definition: adc9.h:429
adc9_t
Click ctx object definition.
Definition: adc9.h:390
adc9_cfg_setup
void adc9_cfg_setup(adc9_cfg_t *cfg)
Config Object Initialization function.
adc9_read_sign_adc
uint8_t adc9_read_sign_adc(adc9_t *ctx, adc9_rw_t *rw, int32_t *adc_val)
Read Sign and ADC value function.
adc9_read_u32
uint8_t adc9_read_u32(adc9_t *ctx, adc9_rw_t *rw, uint32_t *rd_data)
Read 32-bit function.
adc9_cfg_t
Click configuration structure definition.
Definition: adc9.h:423
adc9_cfg_t::sck
pin_name_t sck
Definition: adc9.h:428
adc9_cfg_t::miso
pin_name_t miso
Definition: adc9.h:426
adc9_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: adc9.h:440
adc9_init
ADC9_RETVAL adc9_init(adc9_t *ctx, adc9_cfg_t *cfg)
Initialization function.
adc9_rw_t
Click wr object definition.
Definition: adc9.h:411
adc9_irq_pin_state
uint8_t adc9_irq_pin_state(adc9_t *ctx)
Get IRQ pin state function.
adc9_t::spi
spi_master_t spi
Definition: adc9.h:402