hbridge3  2.0.0.0
hbridge3.h
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1 /*
2  * MikroSDK - MikroE Software Development Kit
3  * Copyright© 2020 MikroElektronika d.o.o.
4  *
5  * Permission is hereby granted, free of charge, to any person
6  * obtaining a copy of this software and associated documentation
7  * files (the "Software"), to deal in the Software without restriction,
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9  * publish, distribute, sublicense, and/or sell copies of the Software,
10  * and to permit persons to whom the Software is furnished to do so,
11  * subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be
14  * included in all copies or substantial portions of the Software.
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16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19  * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22  * OR OTHER DEALINGS IN THE SOFTWARE.
23  */
24 
33 // ----------------------------------------------------------------------------
34 
35 #ifndef HBRIDGE3_H
36 #define HBRIDGE3_H
37 
42 #ifdef PREINIT_SUPPORTED
43 #include "preinit.h"
44 #endif
45 
46 #ifdef MikroCCoreVersion
47  #if MikroCCoreVersion >= 1
48  #include "delays.h"
49  #endif
50 #endif
51 
52 #include "drv_digital_out.h"
53 #include "drv_digital_in.h"
54 #include "drv_pwm.h"
55 #include "drv_spi_master.h"
56 
57 // -------------------------------------------------------------- PUBLIC MACROS
67 #define HBRIDGE3_MAP_MIKROBUS( cfg, mikrobus ) \
68  cfg.pwm = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
69  cfg.dir = MIKROBUS( mikrobus, MIKROBUS_AN ); \
70  cfg.dis = MIKROBUS( mikrobus, MIKROBUS_RST ); \
71  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
72  cfg.sdo = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
73  cfg.sdi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
74  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK )
75 
81 #define HBRIDGE3_RETVAL uint8_t
82 
83 #define HBRIDGE3_OK 0x00
84 #define HBRIDGE3_INIT_ERROR 0xFF
85 
91 #define HBRIDGE3_DEF_FREQ 20000
92 
98 #define HBRIDGE3_CMD_RD_DIA 0x00
99 #define HBRIDGE3_CMD_RES_DIA 0x80
100 #define HBRIDGE3_CMD_RD_REV 0x20
101 #define HBRIDGE3_CMD_RD_CTRL 0x60
102 #define HBRIDGE3_CMD_WR_CTRL 0xE0
103 #define HBRIDGE3_CMD_WR_CTRL_RD_DIA 0xC0
104 
110 #define HBRIDGE3_CTRL_VIA_PWM_DIR 0x00
111 #define HBRIDGE3_CTRL_VIA_SPI 0x80
112 #define HBRIDGE3_SPI_ENA_OUT 0x40
113 #define HBRIDGE3_SPI_DIS_OUT 0x00
114 #define HBRIDGE3_SPI_DIR_1 0x00
115 #define HBRIDGE3_SPI_DIR_2 0x20
116 #define HBRIDGE3_SPI_PWM_0 0x00
117 #define HBRIDGE3_SPI_PWM_1 0x01
118  // End group macro
120 // --------------------------------------------------------------- PUBLIC TYPES
129 typedef struct
130 {
131  // Output pins
132 
133  digital_out_t dir;
134  digital_out_t dis;
135  digital_out_t cs;
136 
137 
138  // Modules
139  spi_master_t spi;
140  pin_name_t chip_select;
141  pwm_t pwm;
142 
143  // ctx variable
144 
145  uint16_t pwm_period;
146  uint32_t pwm_freq;
147 
148 } hbridge3_t;
149 
153 typedef struct
154 {
155  // Communication gpio pins
156 
157  pin_name_t pwm;
158  pin_name_t sdo;
159  pin_name_t sdi;
160  pin_name_t sck;
161 
162  // Additional gpio pins
163 
164  pin_name_t dir;
165  pin_name_t dis;
166  pin_name_t cs;
167 
168  // static variable
169 
170  uint32_t dev_pwm_freq;
171  uint32_t spi_speed;
172  spi_master_mode_t spi_mode;
173  spi_master_chip_select_polarity_t cs_polarity;
174 
176  // End types group
178 // ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
179 
185 #ifdef __cplusplus
186 extern "C"{
187 #endif
188 
198 
208 
216 void hbridge3_default_cfg ( hbridge3_t *ctx, float duty_cycle );
217 
226 void hbridge3_set_duty_cycle ( hbridge3_t *ctx, float duty_cycle );
227 
236 
245 
254 void hbridge3_dir_set ( hbridge3_t *ctx, uint8_t pin_state );
255 
264 void hbridge3_dis_set ( hbridge3_t *ctx, uint8_t pin_state );
265 
274 void hbridge3_cs_set ( hbridge3_t *ctx, uint8_t pin_state );
275 
276 
287 uint8_t hbridge3_spi ( hbridge3_t *ctx, uint8_t spi_command );
288 
289 
290 #ifdef __cplusplus
291 }
292 #endif
293 #endif // _HBRIDGE3_H_
294  // End public_function group
297 
298 // ------------------------------------------------------------------------- END
hbridge3_set_duty_cycle
void hbridge3_set_duty_cycle(hbridge3_t *ctx, float duty_cycle)
Generic sets PWM duty cycle.
hbridge3_cfg_setup
void hbridge3_cfg_setup(hbridge3_cfg_t *cfg)
Config Object Initialization function.
hbridge3_t::pwm_period
uint16_t pwm_period
Definition: hbridge3.h:145
hbridge3_pwm_start
void hbridge3_pwm_start(hbridge3_t *ctx)
Start PWM module.
hbridge3_cfg_t::sck
pin_name_t sck
Definition: hbridge3.h:160
hbridge3_cfg_t::sdo
pin_name_t sdo
Definition: hbridge3.h:158
hbridge3_t::pwm
pwm_t pwm
Definition: hbridge3.h:141
hbridge3_cs_set
void hbridge3_cs_set(hbridge3_t *ctx, uint8_t pin_state)
Setting CS pin state.
hbridge3_cfg_t::sdi
pin_name_t sdi
Definition: hbridge3.h:159
hbridge3_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: hbridge3.h:173
hbridge3_t::dis
digital_out_t dis
Definition: hbridge3.h:134
hbridge3_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: hbridge3.h:172
hbridge3_t::dir
digital_out_t dir
Definition: hbridge3.h:133
hbridge3_t
Click ctx object definition.
Definition: hbridge3.h:130
hbridge3_cfg_t::dev_pwm_freq
uint32_t dev_pwm_freq
Definition: hbridge3.h:170
hbridge3_t::cs
digital_out_t cs
Definition: hbridge3.h:135
hbridge3_dir_set
void hbridge3_dir_set(hbridge3_t *ctx, uint8_t pin_state)
Setting AN pin state.
hbridge3_init
HBRIDGE3_RETVAL hbridge3_init(hbridge3_t *ctx, hbridge3_cfg_t *cfg)
Initialization function.
hbridge3_cfg_t::cs
pin_name_t cs
Definition: hbridge3.h:166
hbridge3_pwm_stop
void hbridge3_pwm_stop(hbridge3_t *ctx)
Stop PWM module.
hbridge3_dis_set
void hbridge3_dis_set(hbridge3_t *ctx, uint8_t pin_state)
Setting RST pin state.
hbridge3_cfg_t
Click configuration structure definition.
Definition: hbridge3.h:154
hbridge3_t::pwm_freq
uint32_t pwm_freq
Definition: hbridge3.h:146
hbridge3_spi
uint8_t hbridge3_spi(hbridge3_t *ctx, uint8_t spi_command)
Sending SPI command.
hbridge3_cfg_t::spi_speed
uint32_t spi_speed
Definition: hbridge3.h:171
hbridge3_cfg_t::dis
pin_name_t dis
Definition: hbridge3.h:165
HBRIDGE3_RETVAL
#define HBRIDGE3_RETVAL
Definition: hbridge3.h:81
hbridge3_t::spi
spi_master_t spi
Definition: hbridge3.h:139
hbridge3_cfg_t::dir
pin_name_t dir
Definition: hbridge3.h:164
hbridge3_default_cfg
void hbridge3_default_cfg(hbridge3_t *ctx, float duty_cycle)
Click Default Configuration function.
hbridge3_t::chip_select
pin_name_t chip_select
Definition: hbridge3.h:140
hbridge3_cfg_t::pwm
pin_name_t pwm
Definition: hbridge3.h:157