nvsram3  2.0.0.0
nvsram3.h
Go to the documentation of this file.
1 /****************************************************************************
2 ** Copyright (C) 2020 MikroElektronika d.o.o.
3 ** Contact: https://www.mikroe.com/contact
4 **
5 ** Permission is hereby granted, free of charge, to any person obtaining a copy
6 ** of this software and associated documentation files (the "Software"), to deal
7 ** in the Software without restriction, including without limitation the rights
8 ** to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 ** copies of the Software, and to permit persons to whom the Software is
10 ** furnished to do so, subject to the following conditions:
11 ** The above copyright notice and this permission notice shall be
12 ** included in all copies or substantial portions of the Software.
13 **
14 ** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15 ** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
16 ** OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
17 ** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
18 ** DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT
19 ** OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 ** USE OR OTHER DEALINGS IN THE SOFTWARE.
21 ****************************************************************************/
22 
28 #ifndef NVSRAM3_H
29 #define NVSRAM3_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
35 #include "drv_digital_out.h"
36 #include "drv_digital_in.h"
37 #include "drv_i2c_master.h"
38 
60 #define NVSRAM3_CONTROL_REG_MEM_CTRL 0x00
61 #define NVSRAM3_CONTROL_REG_SERIAL_NUMBER 0x01
62 #define NVSRAM3_CONTROL_REG_DEVICE_ID 0x09
63 #define NVSRAM3_CONTROL_REG_CMD 0xAA
64 
70 #define NVSRAM3_RTC_REG_FLAGS 0x00
71 #define NVSRAM3_RTC_REG_TIME_KEEPING_CENTURIES 0x01
72 #define NVSRAM3_RTC_REG_ALARM_SECONDS 0x02
73 #define NVSRAM3_RTC_REG_ALARM_MINUTES 0x03
74 #define NVSRAM3_RTC_REG_ALARM_HOURS 0x04
75 #define NVSRAM3_RTC_REG_ALARM_DAY 0x05
76 #define NVSRAM3_RTC_REG_INTERRUPT_STATUS_CONTROL 0x06
77 #define NVSRAM3_RTC_REG_WATCHDOG_TIMER 0x07
78 #define NVSRAM3_RTC_REG_CALIBRATION_CONTROL 0x08
79 #define NVSRAM3_RTC_REG_TIME_KEEPING_SECONDS 0x09
80 #define NVSRAM3_RTC_REG_TIME_KEEPING_MINUTES 0x0A
81 #define NVSRAM3_RTC_REG_TIME_KEEPING_HOURS 0x0B
82 #define NVSRAM3_RTC_REG_TIME_KEEPING_DAY 0x0C
83 #define NVSRAM3_RTC_REG_TIME_KEEPING_DATE 0x0D
84 #define NVSRAM3_RTC_REG_TIME_KEEPING_MONTHS 0x0E
85 #define NVSRAM3_RTC_REG_TIME_KEEPING_YEARS 0x0F
86  // nvsram3_reg
88 
103 #define NVSRAM3_SERIAL_NUMBER_LOCK 0x40
104 #define NVSRAM3_SERIAL_NUMBER_UNLOCK 0x00
105 #define NVSRAM3_BLOCK_PROTECT_QUARTER 0x04
106 #define NVSRAM3_BLOCK_PROTECT_HALF 0x08
107 #define NVSRAM3_BLOCK_PROTECT_FULL 0x0C
108 
109 #define NVSRAM3_STORE_COMMAND 0x3C
110 #define NVSRAM3_RECALL_COMMAND 0x60
111 #define NVSRAM3_ASENB_COMMAND 0x59
112 #define NVSRAM3_ASDISB_COMMAND 0x19
113 #define NVSRAM3_SLEEP_COMMAND 0xB9
114 
119 #define NVSRAM3_RTC_WRITE_ENABLE 0x02
120 #define NVSRAM3_RTC_WRITE_DISABLE 0x00
121 #define NVSRAM3_RTC_READ_ENABLE 0x01
122 #define NVSRAM3_RTC_READ_DISABLE 0x00
123 
129 #define NVSRAM3_MEMORY_DEV_ADDR_0 0x50
130 #define NVSRAM3_MEMORY_DEV_ADDR_1 0x52
131 #define NVSRAM3_MEMORY_DEV_ADDR_2 0x54
132 #define NVSRAM3_MEMORY_DEV_ADDR_3 0x56
133 
134 #define NVSRAM3_RTC_DEV_ADDR_0 0x68
135 #define NVSRAM3_RTC_DEV_ADDR_1 0x6A
136 #define NVSRAM3_RTC_DEV_ADDR_2 0x6C
137 #define NVSRAM3_RTC_DEV_ADDR_3 0x6E
138 
139 #define NVSRAM3_CONTROL_DEV_ADDR_0 0x18
140 #define NVSRAM3_CONTROL_DEV_ADDR_1 0x1A
141 #define NVSRAM3_CONTROL_DEV_ADDR_2 0x1C
142 #define NVSRAM3_CONTROL_DEV_ADDR_3 0x1E
143 
149 #define NVSRAM3_HSB_ENABLE 0x00
150 #define NVSRAM3_HSB_DISABLE 0x01
151 
152 #define NVSRAM3_WP_ENABLE 0x00
153 #define NVSRAM3_WP_DISABLE 0x01
154  // nvsram3_set
156 
167 #define NVSRAM3_SUCCESS 0
168 #define NVSRAM3_ERROR -1
169 
170  // status
172 
187 #define NVSRAM3_MAP_MIKROBUS( cfg, mikrobus ) \
188  cfg.scl = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
189  cfg.sda = MIKROBUS( mikrobus, MIKROBUS_SDA ); \
190  cfg.hsb = MIKROBUS( mikrobus, MIKROBUS_RST ); \
191  cfg.wp = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
192  cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
193  // nvsram3_map // nvsram3
196 
201 typedef struct
202 {
203  // Output pins
204 
205  digital_out_t hsb;
206  digital_out_t wp;
208  // Input pins
209 
210  digital_in_t int_pin;
212  // Modules
213 
214  i2c_master_t i2c;
216  // I2C slave address
217 
218  uint8_t slave_address;
220 } nvsram3_t;
221 
226 typedef struct
227 {
228  pin_name_t scl;
229  pin_name_t sda;
231  pin_name_t hsb;
232  pin_name_t wp;
233  pin_name_t int_pin;
235  uint32_t i2c_speed;
236  uint8_t i2c_address;
238 } nvsram3_cfg_t;
239 
240 typedef struct
241 {
242 
243  uint8_t hours;
244  uint8_t min;
245  uint8_t sec;
246 
248 
249 typedef struct
250 {
251 
252  uint16_t year;
253  uint8_t month;
254  uint8_t day;
255  uint8_t day_of_week;
257 
258 typedef struct
259 {
260 
261  uint8_t day;
262  uint8_t hours;
263  uint8_t min;
264  uint8_t sec;
265 
267 
286 
303 err_t nvsram3_init ( nvsram3_t *ctx, nvsram3_cfg_t *cfg );
304 
321 
339 err_t nvsram3_generic_write ( nvsram3_t *ctx, uint8_t reg, uint8_t *tx_buf, uint8_t tx_len );
340 
358 err_t nvsram3_generic_read ( nvsram3_t *ctx, uint8_t reg, uint8_t *rx_buf, uint8_t rx_len );
359 
372 err_t nvsram3_send_cmd ( nvsram3_t *ctx, uint8_t cmd );
373 
389 err_t nvsram3_memory_write ( nvsram3_t *ctx, uint32_t mem_addr, uint8_t *data_in, uint8_t n_bytes );
390 
406 err_t nvsram3_memory_read ( nvsram3_t *ctx, uint32_t mem_addr, uint8_t *data_out, uint8_t n_bytes );
407 
418 
432 err_t nvsram3_rtc_read_reg ( nvsram3_t *ctx, uint8_t rtc_reg, uint8_t *data_out );
433 
447 err_t nvsram3_rtc_write_reg ( nvsram3_t *ctx, uint8_t rtc_reg, uint8_t data_in ) ;
448 
461 
475 
488 
502 
515 
529 
545 err_t nvsram3_hardware_store ( nvsram3_t *ctx, uint8_t state );
546 
562 err_t nvsram3_hw_write_protection ( nvsram3_t *ctx, uint8_t state );
563 
564 #ifdef __cplusplus
565 }
566 #endif
567 #endif // NVSRAM3_H
568  // nvsram3
570 
571 // ------------------------------------------------------------------------ END
nvsram3_set_rtc_alarm
err_t nvsram3_set_rtc_alarm(nvsram3_t *ctx, nvsram3_rtc_alarm_t rtc_alarm)
nvSRAM 3 set RTC alarm function.
nvsram3_hw_write_protection
err_t nvsram3_hw_write_protection(nvsram3_t *ctx, uint8_t state)
nvSRAM 3 write protection function.
nvsram3_send_cmd
err_t nvsram3_send_cmd(nvsram3_t *ctx, uint8_t cmd)
nvSRAM 3 send command function.
nvsram3_cfg_t::sda
pin_name_t sda
Definition: nvsram3.h:229
nvsram3_get_rtc_time
void nvsram3_get_rtc_time(nvsram3_t *ctx, nvsram3_rtc_time_t *rtc_time)
nvSRAM 3 get RTC time function.
nvsram3_init
err_t nvsram3_init(nvsram3_t *ctx, nvsram3_cfg_t *cfg)
nvSRAM 3 initialization function.
nvsram3_rtc_alarm_t::min
uint8_t min
Definition: nvsram3.h:263
nvsram3_default_cfg
err_t nvsram3_default_cfg(nvsram3_t *ctx)
nvSRAM 3 default configuration function.
nvsram3_t::wp
digital_out_t wp
Definition: nvsram3.h:206
nvsram3_rtc_time_t::min
uint8_t min
Definition: nvsram3.h:244
nvsram3_rtc_read_reg
err_t nvsram3_rtc_read_reg(nvsram3_t *ctx, uint8_t rtc_reg, uint8_t *data_out)
nvSRAM 3 RTC read register function.
nvsram3_memory_write
err_t nvsram3_memory_write(nvsram3_t *ctx, uint32_t mem_addr, uint8_t *data_in, uint8_t n_bytes)
nvSRAM 3 write memory function.
nvsram3_cfg_t::i2c_speed
uint32_t i2c_speed
Definition: nvsram3.h:235
nvsram3_rtc_time_t
Definition: nvsram3.h:241
nvsram3_rtc_write_reg
err_t nvsram3_rtc_write_reg(nvsram3_t *ctx, uint8_t rtc_reg, uint8_t data_in)
nvSRAM 3 RTC write register function.
nvsram3_rtc_date_t::day
uint8_t day
Definition: nvsram3.h:254
nvsram3_t
nvSRAM 3 Click context object.
Definition: nvsram3.h:202
nvsram3_rtc_alarm_t
Definition: nvsram3.h:259
nvsram3_t::hsb
digital_out_t hsb
Definition: nvsram3.h:205
nvsram3_t::slave_address
uint8_t slave_address
Definition: nvsram3.h:218
nvsram3_memory_read
err_t nvsram3_memory_read(nvsram3_t *ctx, uint32_t mem_addr, uint8_t *data_out, uint8_t n_bytes)
nvSRAM 3 read memory function.
nvsram3_rtc_alarm_t::hours
uint8_t hours
Definition: nvsram3.h:262
nvsram3_rtc_date_t::year
uint16_t year
Definition: nvsram3.h:252
nvsram3_get_rtc_date
void nvsram3_get_rtc_date(nvsram3_t *ctx, nvsram3_rtc_date_t *rtc_date)
nvSRAM 3 get RTC date function.
nvsram3_set_rtc_date
err_t nvsram3_set_rtc_date(nvsram3_t *ctx, nvsram3_rtc_date_t rtc_date)
nvSRAM 3 set RTC date function.
nvsram3_rtc_date_t::day_of_week
uint8_t day_of_week
Definition: nvsram3.h:255
nvsram3_cfg_setup
void nvsram3_cfg_setup(nvsram3_cfg_t *cfg)
nvSRAM 3 configuration object setup function.
nvsram3_rtc_time_t::sec
uint8_t sec
Definition: nvsram3.h:245
nvsram3_cfg_t
nvSRAM 3 Click configuration object.
Definition: nvsram3.h:227
nvsram3_set_rtc_time
err_t nvsram3_set_rtc_time(nvsram3_t *ctx, nvsram3_rtc_time_t rtc_time)
nvSRAM 3 set RTC time function.
nvsram3_cfg_t::scl
pin_name_t scl
Definition: nvsram3.h:228
nvsram3_get_device_id
uint32_t nvsram3_get_device_id(nvsram3_t *ctx)
nvSRAM 3 get device ID function.
nvsram3_rtc_date_t::month
uint8_t month
Definition: nvsram3.h:253
nvsram3_cfg_t::i2c_address
uint8_t i2c_address
Definition: nvsram3.h:236
nvsram3_cfg_t::int_pin
pin_name_t int_pin
Definition: nvsram3.h:233
nvsram3_generic_write
err_t nvsram3_generic_write(nvsram3_t *ctx, uint8_t reg, uint8_t *tx_buf, uint8_t tx_len)
nvSRAM 3 I2C writing function.
nvsram3_cfg_t::wp
pin_name_t wp
Definition: nvsram3.h:232
nvsram3_rtc_time_t::hours
uint8_t hours
Definition: nvsram3.h:243
nvsram3_t::i2c
i2c_master_t i2c
Definition: nvsram3.h:214
nvsram3_t::int_pin
digital_in_t int_pin
Definition: nvsram3.h:210
nvsram3_get_rtc_alarm
void nvsram3_get_rtc_alarm(nvsram3_t *ctx, nvsram3_rtc_alarm_t *rtc_alarm)
nvSRAM 3 get RTC alarm function.
nvsram3_rtc_alarm_t::sec
uint8_t sec
Definition: nvsram3.h:264
nvsram3_hardware_store
err_t nvsram3_hardware_store(nvsram3_t *ctx, uint8_t state)
nvSRAM 3 hardware store function.
nvsram3_rtc_alarm_t::day
uint8_t day
Definition: nvsram3.h:261
nvsram3_rtc_date_t
Definition: nvsram3.h:250
nvsram3_generic_read
err_t nvsram3_generic_read(nvsram3_t *ctx, uint8_t reg, uint8_t *rx_buf, uint8_t rx_len)
nvSRAM 3 I2C reading function.
nvsram3_cfg_t::hsb
pin_name_t hsb
Definition: nvsram3.h:231