canfd6  2.0.0.0
canfd6.h
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3 ** Contact: https://www.mikroe.com/contact
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22 
28 #ifndef CANFD6_H
29 #define CANFD6_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
35 #include "drv_digital_out.h"
36 #include "drv_digital_in.h"
37 #include "drv_spi_master.h"
38 
50 #define CANFD6_MCAN_CACHE_CONFIGURATION
51 
52 #ifdef CANFD6_MCAN_CACHE_CONFIGURATION
53 #define CANFD6_MCAN_CACHE_SIDFC 0
54 #define CANFD6_MCAN_CACHE_XIDFC 1
55 #define CANFD6_MCAN_CACHE_RXF0C 2
56 #define CANFD6_MCAN_CACHE_RXF1C 3
57 #define CANFD6_MCAN_CACHE_RXBC 4
58 #define CANFD6_MCAN_CACHE_TXEFC 5
59 #define CANFD6_MCAN_CACHE_TXBC 6
60 #define CANFD6_MCAN_CACHE_RXESC 7
61 #define CANFD6_MCAN_CACHE_TXESC 8
62 #endif
63 
68 #define CANFD6_MRAM_SIZE 2048
69 
80 #define CANFD6_REG_SPI_CONFIG 0x0000
81 #define CANFD6_REG_DEV_CONFIG 0x0800
82 #define CANFD6_REG_MCAN 0x1000
83 #define CANFD6_REG_MRAM 0x8000
84  // canfd6_reg1
86 
97 #define CANFD6_REG_SPI_DEVICE_ID0 0x0000
98 #define CANFD6_REG_SPI_DEVICE_ID1 0x0004
99 #define CANFD6_REG_SPI_REVISION 0x0008
100 #define CANFD6_REG_SPI_STATUS 0x000C
101 #define CANFD6_REG_SPI_ERROR_STATUS_MASK 0x0010
102  // canfd6_reg2
104 
115 #define CANFD6_REG_DEV_MODES_AND_PINS 0x0800
116 #define CANFD6_REG_DEV_TIMESTAMP_PRESCALER 0x0804
117 #define CANFD6_REG_DEV_TEST_REGISTERS 0x0808
118 #define CANFD6_REG_DEV_IR 0x0820
119 #define CANFD6_REG_DEV_IE 0x0830
120  // canfd6_reg3
122 
133 #define CANFD6_REG_MCAN_CREL 0x1000
134 #define CANFD6_REG_MCAN_ENDN 0x1004
135 #define CANFD6_REG_MCAN_CUST 0x1008
136 #define CANFD6_REG_MCAN_DBTP 0x100C
137 #define CANFD6_REG_MCAN_TEST 0x1010
138 #define CANFD6_REG_MCAN_RWD 0x1014
139 #define CANFD6_REG_MCAN_CCCR 0x1018
140 #define CANFD6_REG_MCAN_NBTP 0x101C
141 #define CANFD6_REG_MCAN_TSCC 0x1020
142 #define CANFD6_REG_MCAN_TSCV 0x1024
143 #define CANFD6_REG_MCAN_TOCC 0x1028
144 #define CANFD6_REG_MCAN_TOCV 0x102C
145 #define CANFD6_REG_MCAN_ECR 0x1040
146 #define CANFD6_REG_MCAN_PSR 0x1044
147 #define CANFD6_REG_MCAN_TDCR 0x1048
148 #define CANFD6_REG_MCAN_IR 0x1050
149 #define CANFD6_REG_MCAN_IE 0x1054
150 #define CANFD6_REG_MCAN_ILS 0x1058
151 #define CANFD6_REG_MCAN_ILE 0x105C
152 #define CANFD6_REG_MCAN_GFC 0x1080
153 #define CANFD6_REG_MCAN_SIDFC 0x1084
154 #define CANFD6_REG_MCAN_XIDFC 0x1088
155 #define CANFD6_REG_MCAN_XIDAM 0x1090
156 #define CANFD6_REG_MCAN_HPMS 0x1094
157 #define CANFD6_REG_MCAN_NDAT1 0x1098
158 #define CANFD6_REG_MCAN_NDAT2 0x109C
159 #define CANFD6_REG_MCAN_RXF0C 0x10A0
160 #define CANFD6_REG_MCAN_RXF0S 0x10A4
161 #define CANFD6_REG_MCAN_RXF0A 0x10A8
162 #define CANFD6_REG_MCAN_RXBC 0x10AC
163 #define CANFD6_REG_MCAN_RXF1C 0x10B0
164 #define CANFD6_REG_MCAN_RXF1S 0x10B4
165 #define CANFD6_REG_MCAN_RXF1A 0x10B8
166 #define CANFD6_REG_MCAN_RXESC 0x10BC
167 #define CANFD6_REG_MCAN_TXBC 0x10C0
168 #define CANFD6_REG_MCAN_TXFQS 0x10C4
169 #define CANFD6_REG_MCAN_TXESC 0x10C8
170 #define CANFD6_REG_MCAN_TXBRP 0x10CC
171 #define CANFD6_REG_MCAN_TXBAR 0x10D0
172 #define CANFD6_REG_MCAN_TXBCR 0x10D4
173 #define CANFD6_REG_MCAN_TXBTO 0x10D8
174 #define CANFD6_REG_MCAN_TXBCF 0x10DC
175 #define CANFD6_REG_MCAN_TXBTIE 0x10E0
176 #define CANFD6_REG_MCAN_TXBCIE 0x10E4
177 #define CANFD6_REG_MCAN_TXEFC 0x10F0
178 #define CANFD6_REG_MCAN_TXEFS 0x10F4
179 #define CANFD6_REG_MCAN_TXEFA 0x10F8
180  // canfd6_reg4
182 
193 #define CANFD6_MCAN_DLC_0B 0x00000000
194 #define CANFD6_MCAN_DLC_1B 0x00000001
195 #define CANFD6_MCAN_DLC_2B 0x00000002
196 #define CANFD6_MCAN_DLC_3B 0x00000003
197 #define CANFD6_MCAN_DLC_4B 0x00000004
198 #define CANFD6_MCAN_DLC_5B 0x00000005
199 #define CANFD6_MCAN_DLC_6B 0x00000006
200 #define CANFD6_MCAN_DLC_7B 0x00000007
201 #define CANFD6_MCAN_DLC_8B 0x00000008
202 #define CANFD6_MCAN_DLC_12B 0x00000009
203 #define CANFD6_MCAN_DLC_16B 0x0000000A
204 #define CANFD6_MCAN_DLC_20B 0x0000000B
205 #define CANFD6_MCAN_DLC_24B 0x0000000C
206 #define CANFD6_MCAN_DLC_32B 0x0000000D
207 #define CANFD6_MCAN_DLC_48B 0x0000000E
208 #define CANFD6_MCAN_DLC_64B 0x0000000F
209  // canfd6_reg5
211 
216 #define CANFD6_REG_BITS_MCAN_DBTP_TDC_EN 0x00800000
217 
228 #define CANFD6_REG_BITS_MCAN_TEST_RX_DOM 0x00000000
229 #define CANFD6_REG_BITS_MCAN_TEST_RX_REC 0x00000080
230 #define CANFD6_REG_BITS_MCAN_TEST_TX_SP 0x00000020
231 #define CANFD6_REG_BITS_MCAN_TEST_TX_DOM 0x00000040
232 #define CANFD6_REG_BITS_MCAN_TEST_TX_REC 0x00000060
233 #define CANFD6_REG_BITS_MCAN_TEST_LOOP_BACK 0x00000010
234  // canfd6_reg6
236 
247 #define CANFD6_REG_BITS_MCAN_CCCR_RESERVED_MASK 0xFFFF0C00
248 #define CANFD6_REG_BITS_MCAN_CCCR_NISO_ISO 0x00000000
249 #define CANFD6_REG_BITS_MCAN_CCCR_NISO_BOSCH 0x00008000
250 #define CANFD6_REG_BITS_MCAN_CCCR_TXP 0x00004000
251 #define CANFD6_REG_BITS_MCAN_CCCR_EFBI 0x00002000
252 #define CANFD6_REG_BITS_MCAN_CCCR_PXHD_DIS 0x00001000
253 #define CANFD6_REG_BITS_MCAN_CCCR_BRSE 0x00000200
254 #define CANFD6_REG_BITS_MCAN_CCCR_FDOE 0x00000100
255 #define CANFD6_REG_BITS_MCAN_CCCR_TEST 0x00000080
256 #define CANFD6_REG_BITS_MCAN_CCCR_DAR_DIS 0x00000040
257 #define CANFD6_REG_BITS_MCAN_CCCR_MON 0x00000020
258 #define CANFD6_REG_BITS_MCAN_CCCR_CSR 0x00000010
259 #define CANFD6_REG_BITS_MCAN_CCCR_CSA 0x00000008
260 #define CANFD6_REG_BITS_MCAN_CCCR_ASM 0x00000004
261 #define CANFD6_REG_BITS_MCAN_CCCR_CCE 0x00000002
262 #define CANFD6_REG_BITS_MCAN_CCCR_INIT 0x00000001
263  // canfd6_reg7
265 
276 #define CANFD6_REG_BITS_MCAN_IE_ARAE 0x20000000
277 #define CANFD6_REG_BITS_MCAN_IE_PEDE 0x10000000
278 #define CANFD6_REG_BITS_MCAN_IE_PEAE 0x08000000
279 #define CANFD6_REG_BITS_MCAN_IE_WDIE 0x04000000
280 #define CANFD6_REG_BITS_MCAN_IE_BOE 0x02000000
281 #define CANFD6_REG_BITS_MCAN_IE_EWE 0x01000000
282 #define CANFD6_REG_BITS_MCAN_IE_EPE 0x00800000
283 #define CANFD6_REG_BITS_MCAN_IE_ELOE 0x00400000
284 #define CANFD6_REG_BITS_MCAN_IE_BEUE 0x00200000
285 #define CANFD6_REG_BITS_MCAN_IE_BECE 0x00100000
286 #define CANFD6_REG_BITS_MCAN_IE_DRXE 0x00080000
287 #define CANFD6_REG_BITS_MCAN_IE_TOOE 0x00040000
288 #define CANFD6_REG_BITS_MCAN_IE_MRAFE 0x00020000
289 #define CANFD6_REG_BITS_MCAN_IE_TSWE 0x00010000
290 #define CANFD6_REG_BITS_MCAN_IE_TEFLE 0x00008000
291 #define CANFD6_REG_BITS_MCAN_IE_TEFFE 0x00004000
292 #define CANFD6_REG_BITS_MCAN_IE_TEFWE 0x00002000
293 #define CANFD6_REG_BITS_MCAN_IE_TEFNE 0x00001000
294 #define CANFD6_REG_BITS_MCAN_IE_TFEE 0x00000800
295 #define CANFD6_REG_BITS_MCAN_IE_TCFE 0x00000400
296 #define CANFD6_REG_BITS_MCAN_IE_TCE 0x00000200
297 #define CANFD6_REG_BITS_MCAN_IE_HPME 0x00000100
298 #define CANFD6_REG_BITS_MCAN_IE_RF1LE 0x00000080
299 #define CANFD6_REG_BITS_MCAN_IE_RF1FE 0x00000040
300 #define CANFD6_REG_BITS_MCAN_IE_RF1WE 0x00000020
301 #define CANFD6_REG_BITS_MCAN_IE_RF1NE 0x00000010
302 #define CANFD6_REG_BITS_MCAN_IE_RF0LE 0x00000008
303 #define CANFD6_REG_BITS_MCAN_IE_RF0FE 0x00000004
304 #define CANFD6_REG_BITS_MCAN_IE_RF0WE 0x00000002
305 #define CANFD6_REG_BITS_MCAN_IE_RF0NE 0x00000001
306  // canfd6_reg8
308 
319 #define CANFD6_REG_BITS_MCAN_IR_ARA 0x20000000
320 #define CANFD6_REG_BITS_MCAN_IR_PED 0x10000000
321 #define CANFD6_REG_BITS_MCAN_IR_PEA 0x08000000
322 #define CANFD6_REG_BITS_MCAN_IR_WDI 0x04000000
323 #define CANFD6_REG_BITS_MCAN_IR_BO 0x02000000
324 #define CANFD6_REG_BITS_MCAN_IR_EW 0x01000000
325 #define CANFD6_REG_BITS_MCAN_IR_EP 0x00800000
326 #define CANFD6_REG_BITS_MCAN_IR_ELO 0x00400000
327 #define CANFD6_REG_BITS_MCAN_IR_BEU 0x00200000
328 #define CANFD6_REG_BITS_MCAN_IR_BEC 0x00100000
329 #define CANFD6_REG_BITS_MCAN_IR_DRX 0x00080000
330 #define CANFD6_REG_BITS_MCAN_IR_TOO 0x00040000
331 #define CANFD6_REG_BITS_MCAN_IR_MRAF 0x00020000
332 #define CANFD6_REG_BITS_MCAN_IR_TSW 0x00010000
333 #define CANFD6_REG_BITS_MCAN_IR_TEFL 0x00008000
334 #define CANFD6_REG_BITS_MCAN_IR_TEFF 0x00004000
335 #define CANFD6_REG_BITS_MCAN_IR_TEFW 0x00002000
336 #define CANFD6_REG_BITS_MCAN_IR_TEFN 0x00001000
337 #define CANFD6_REG_BITS_MCAN_IR_TFE 0x00000800
338 #define CANFD6_REG_BITS_MCAN_IR_TCF 0x00000400
339 #define CANFD6_REG_BITS_MCAN_IR_TC 0x00000200
340 #define CANFD6_REG_BITS_MCAN_IR_HPM 0x00000100
341 #define CANFD6_REG_BITS_MCAN_IR_RF1L 0x00000080
342 #define CANFD6_REG_BITS_MCAN_IR_RF1F 0x00000040
343 #define CANFD6_REG_BITS_MCAN_IR_RF1W 0x00000020
344 #define CANFD6_REG_BITS_MCAN_IR_RF1N 0x00000010
345 #define CANFD6_REG_BITS_MCAN_IR_RF0L 0x00000008
346 #define CANFD6_REG_BITS_MCAN_IR_RF0F 0x00000004
347 #define CANFD6_REG_BITS_MCAN_IR_RF0W 0x00000002
348 #define CANFD6_REG_BITS_MCAN_IR_RF0N 0x00000001
349  // canfd6_reg9
351 
362 #define CANFD6_REG_BITS_MCAN_IE_ARAL 0x20000000
363 #define CANFD6_REG_BITS_MCAN_IE_PEDL 0x10000000
364 #define CANFD6_REG_BITS_MCAN_IE_PEAL 0x08000000
365 #define CANFD6_REG_BITS_MCAN_IE_WDIL 0x04000000
366 #define CANFD6_REG_BITS_MCAN_IE_BOL 0x02000000
367 #define CANFD6_REG_BITS_MCAN_IE_EWL 0x01000000
368 #define CANFD6_REG_BITS_MCAN_IE_EPL 0x00800000
369 #define CANFD6_REG_BITS_MCAN_IE_ELOL 0x00400000
370 #define CANFD6_REG_BITS_MCAN_IE_BEUL 0x00200000
371 #define CANFD6_REG_BITS_MCAN_IE_BECL 0x00100000
372 #define CANFD6_REG_BITS_MCAN_IE_DRXL 0x00080000
373 #define CANFD6_REG_BITS_MCAN_IE_TOOL 0x00040000
374 #define CANFD6_REG_BITS_MCAN_IE_MRAFL 0x00020000
375 #define CANFD6_REG_BITS_MCAN_IE_TSWL 0x00010000
376 #define CANFD6_REG_BITS_MCAN_IE_TEFLL 0x00008000
377 #define CANFD6_REG_BITS_MCAN_IE_TEFFL 0x00004000
378 #define CANFD6_REG_BITS_MCAN_IE_TEFWL 0x00002000
379 #define CANFD6_REG_BITS_MCAN_IE_TEFNL 0x00001000
380 #define CANFD6_REG_BITS_MCAN_IE_TFEL 0x00000800
381 #define CANFD6_REG_BITS_MCAN_IE_TCFL 0x00000400
382 #define CANFD6_REG_BITS_MCAN_IE_TCL 0x00000200
383 #define CANFD6_REG_BITS_MCAN_IE_HPML 0x00000100
384 #define CANFD6_REG_BITS_MCAN_IE_RF1LL 0x00000080
385 #define CANFD6_REG_BITS_MCAN_IE_RF1FL 0x00000040
386 #define CANFD6_REG_BITS_MCAN_IE_RF1WL 0x00000020
387 #define CANFD6_REG_BITS_MCAN_IE_RF1NL 0x00000010
388 #define CANFD6_REG_BITS_MCAN_IE_RF0LL 0x00000008
389 #define CANFD6_REG_BITS_MCAN_IE_RF0FL 0x00000004
390 #define CANFD6_REG_BITS_MCAN_IE_RF0WL 0x00000002
391 #define CANFD6_REG_BITS_MCAN_IE_RF0NL 0x00000001
392  // canfd6_reg10
394 
405 #define CANFD6_REG_BITS_MCAN_ILE_EINT1 0x00000002
406 #define CANFD6_REG_BITS_MCAN_ILE_EINT0 0x00000001
407  // canfd6_reg11
409 
420 #define CANFD6_REG_BITS_MCAN_GFC_ANFS_FIFO0 0x00000000
421 #define CANFD6_REG_BITS_MCAN_GFC_ANFS_FIFO1 0x00000010
422 #define CANFD6_REG_BITS_MCAN_GFC_ANFE_FIFO0 0x00000000
423 #define CANFD6_REG_BITS_MCAN_GFC_ANFE_FIFO1 0x00000004
424 #define CANFD6_REG_BITS_MCAN_GFC_RRFS 0x00000002
425 #define CANFD6_REG_BITS_MCAN_GFC_RRFE 0x00000001
426 #define CANFD6_REG_BITS_MCAN_GFC_MASK 0x0000003F
427  // canfd6_reg12
429 
434 #define CANFD6_REG_BITS_MCAN_RXF0C_F0OM_OVERWRITE 0x80000000
435 
446 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_8B 0x00000000
447 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_12B 0x00000100
448 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_16B 0x00000200
449 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_20B 0x00000300
450 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_24B 0x00000400
451 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_32B 0x00000500
452 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_48B 0x00000600
453 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_64B 0x00000700
454 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_8B 0x00000000
455 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_12B 0x00000010
456 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_16B 0x00000020
457 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_20B 0x00000030
458 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_24B 0x00000040
459 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_32B 0x00000050
460 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_48B 0x00000060
461 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_64B 0x00000070
462 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_8B 0x00000000
463 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_12B 0x00000001
464 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_16B 0x00000002
465 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_20B 0x00000003
466 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_24B 0x00000004
467 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_32B 0x00000005
468 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_48B 0x00000006
469 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_64B 0x00000007
470  // canfd6_reg13
472 
477 #define CANFD6_REG_BITS_MCAN_TXBC_TFQM 0x40000000
478 
489 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_8 0x00000000
490 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_12 0x00000001
491 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_16 0x00000002
492 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_20 0x00000003
493 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_24 0x00000004
494 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_32 0x00000005
495 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_48 0x00000006
496 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_64 0x00000007
497  // canfd6_reg14
499 
510 #define CANFD6_REG_BITS_MCAN_TSCC_PRESCALER_MASK 0x000F0000
511 #define CANFD6_REG_BITS_MCAN_TSCC_COUNTER_ALWAYS_0 0x00000000
512 #define CANFD6_REG_BITS_MCAN_TSCC_COUNTER_USE_TCP 0x00000001
513 #define CANFD6_REG_BITS_MCAN_TSCC_COUNTER_EXTERNAL 0x00000002
514  // canfd6_reg15
516 
527 #define CANFD6_REG_BITS_MCAN_TXBAR_AR31 0x80000000
528 #define CANFD6_REG_BITS_MCAN_TXBAR_AR30 0x40000000
529 #define CANFD6_REG_BITS_MCAN_TXBAR_AR29 0x20000000
530 #define CANFD6_REG_BITS_MCAN_TXBAR_AR28 0x10000000
531 #define CANFD6_REG_BITS_MCAN_TXBAR_AR27 0x08000000
532 #define CANFD6_REG_BITS_MCAN_TXBAR_AR26 0x04000000
533 #define CANFD6_REG_BITS_MCAN_TXBAR_AR25 0x02000000
534 #define CANFD6_REG_BITS_MCAN_TXBAR_AR24 0x01000000
535 #define CANFD6_REG_BITS_MCAN_TXBAR_AR23 0x00800000
536 #define CANFD6_REG_BITS_MCAN_TXBAR_AR22 0x00400000
537 #define CANFD6_REG_BITS_MCAN_TXBAR_AR21 0x00200000
538 #define CANFD6_REG_BITS_MCAN_TXBAR_AR20 0x00100000
539 #define CANFD6_REG_BITS_MCAN_TXBAR_AR19 0x00080000
540 #define CANFD6_REG_BITS_MCAN_TXBAR_AR18 0x00040000
541 #define CANFD6_REG_BITS_MCAN_TXBAR_AR17 0x00020000
542 #define CANFD6_REG_BITS_MCAN_TXBAR_AR16 0x00010000
543 #define CANFD6_REG_BITS_MCAN_TXBAR_AR15 0x00008000
544 #define CANFD6_REG_BITS_MCAN_TXBAR_AR14 0x00004000
545 #define CANFD6_REG_BITS_MCAN_TXBAR_AR13 0x00002000
546 #define CANFD6_REG_BITS_MCAN_TXBAR_AR12 0x00001000
547 #define CANFD6_REG_BITS_MCAN_TXBAR_AR11 0x00000800
548 #define CANFD6_REG_BITS_MCAN_TXBAR_AR10 0x00000400
549 #define CANFD6_REG_BITS_MCAN_TXBAR_AR9 0x00000200
550 #define CANFD6_REG_BITS_MCAN_TXBAR_AR8 0x00000100
551 #define CANFD6_REG_BITS_MCAN_TXBAR_AR7 0x00000080
552 #define CANFD6_REG_BITS_MCAN_TXBAR_AR6 0x00000040
553 #define CANFD6_REG_BITS_MCAN_TXBAR_AR5 0x00000020
554 #define CANFD6_REG_BITS_MCAN_TXBAR_AR4 0x00000010
555 #define CANFD6_REG_BITS_MCAN_TXBAR_AR3 0x00000008
556 #define CANFD6_REG_BITS_MCAN_TXBAR_AR2 0x00000004
557 #define CANFD6_REG_BITS_MCAN_TXBAR_AR1 0x00000002
558 #define CANFD6_REG_BITS_MCAN_TXBAR_AR0 0x00000001
559  // canfd6_reg16
561 
572 #define CANFD6_REG_BITS_MCAN_TXBCR_CR31 0x80000000
573 #define CANFD6_REG_BITS_MCAN_TXBCR_CR30 0x40000000
574 #define CANFD6_REG_BITS_MCAN_TXBCR_CR29 0x20000000
575 #define CANFD6_REG_BITS_MCAN_TXBCR_CR28 0x10000000
576 #define CANFD6_REG_BITS_MCAN_TXBCR_CR27 0x08000000
577 #define CANFD6_REG_BITS_MCAN_TXBCR_CR26 0x04000000
578 #define CANFD6_REG_BITS_MCAN_TXBCR_CR25 0x02000000
579 #define CANFD6_REG_BITS_MCAN_TXBCR_CR24 0x01000000
580 #define CANFD6_REG_BITS_MCAN_TXBCR_CR23 0x00800000
581 #define CANFD6_REG_BITS_MCAN_TXBCR_CR22 0x00400000
582 #define CANFD6_REG_BITS_MCAN_TXBCR_CR21 0x00200000
583 #define CANFD6_REG_BITS_MCAN_TXBCR_CR20 0x00100000
584 #define CANFD6_REG_BITS_MCAN_TXBCR_CR19 0x00080000
585 #define CANFD6_REG_BITS_MCAN_TXBCR_CR18 0x00040000
586 #define CANFD6_REG_BITS_MCAN_TXBCR_CR17 0x00020000
587 #define CANFD6_REG_BITS_MCAN_TXBCR_CR16 0x00010000
588 #define CANFD6_REG_BITS_MCAN_TXBCR_CR15 0x00008000
589 #define CANFD6_REG_BITS_MCAN_TXBCR_CR14 0x00004000
590 #define CANFD6_REG_BITS_MCAN_TXBCR_CR13 0x00002000
591 #define CANFD6_REG_BITS_MCAN_TXBCR_CR12 0x00001000
592 #define CANFD6_REG_BITS_MCAN_TXBCR_CR11 0x00000800
593 #define CANFD6_REG_BITS_MCAN_TXBCR_CR10 0x00000400
594 #define CANFD6_REG_BITS_MCAN_TXBCR_CR9 0x00000200
595 #define CANFD6_REG_BITS_MCAN_TXBCR_CR8 0x00000100
596 #define CANFD6_REG_BITS_MCAN_TXBCR_CR7 0x00000080
597 #define CANFD6_REG_BITS_MCAN_TXBCR_CR6 0x00000040
598 #define CANFD6_REG_BITS_MCAN_TXBCR_CR5 0x00000020
599 #define CANFD6_REG_BITS_MCAN_TXBCR_CR4 0x00000010
600 #define CANFD6_REG_BITS_MCAN_TXBCR_CR3 0x00000008
601 #define CANFD6_REG_BITS_MCAN_TXBCR_CR2 0x00000004
602 #define CANFD6_REG_BITS_MCAN_TXBCR_CR1 0x00000002
603 #define CANFD6_REG_BITS_MCAN_TXBCR_CR0 0x00000001
604  // canfd6_reg17
606 
617 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE31 0x80000000
618 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE30 0x40000000
619 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE29 0x20000000
620 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE28 0x10000000
621 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE27 0x08000000
622 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE26 0x04000000
623 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE25 0x02000000
624 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE24 0x01000000
625 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE23 0x00800000
626 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE22 0x00400000
627 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE21 0x00200000
628 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE20 0x00100000
629 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE19 0x00080000
630 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE18 0x00040000
631 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE17 0x00020000
632 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE16 0x00010000
633 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE15 0x00008000
634 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE14 0x00004000
635 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE13 0x00002000
636 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE12 0x00001000
637 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE11 0x00000800
638 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE10 0x00000400
639 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE9 0x00000200
640 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE8 0x00000100
641 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE7 0x00000080
642 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE6 0x00000040
643 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE5 0x00000020
644 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE4 0x00000010
645 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE3 0x00000008
646 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE2 0x00000004
647 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE1 0x00000002
648 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE0 0x00000001
649  // canfd6_reg18
651 
662 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE31 0x80000000
663 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE30 0x40000000
664 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE29 0x20000000
665 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE28 0x10000000
666 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE27 0x08000000
667 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE26 0x04000000
668 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE25 0x02000000
669 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE24 0x01000000
670 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE23 0x00800000
671 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE22 0x00400000
672 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE21 0x00200000
673 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE20 0x00100000
674 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE19 0x00080000
675 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE18 0x00040000
676 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE17 0x00020000
677 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE16 0x00010000
678 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE15 0x00008000
679 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE14 0x00004000
680 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE13 0x00002000
681 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE12 0x00001000
682 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE11 0x00000800
683 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE10 0x00000400
684 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE9 0x00000200
685 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE8 0x00000100
686 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE7 0x00000080
687 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE6 0x00000040
688 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE5 0x00000020
689 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE4 0x00000010
690 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE3 0x00000008
691 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE2 0x00000004
692 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE1 0x00000002
693 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE0 0x00000001
694  // canfd6_reg19
696 
707 #define CANFD6_REG_BITS_DEVICE_MODE_FORCED_SET_BITS 0x00000020
708 
709 #define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_MASK 0xC0000000
710 #define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_DIS 0x00000000
711 #define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_RISING 0x40000000
712 #define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_FALLING 0x80000000
713 #define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_BOTHEDGES 0xC0000000
714 
715 #define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_MASK 0x30000000
716 #define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_60MS 0x00000000
717 #define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_600MS 0x10000000
718 #define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_3S 0x20000000
719 #define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_6S 0x30000000
720 
721 #define CANFD6_REG_BITS_DEVICE_MODE_WD_CLK_MASK 0x08000000
722 #define CANFD6_REG_BITS_DEVICE_MODE_WD_CLK_20MHZ 0x00000000
723 #define CANFD6_REG_BITS_DEVICE_MODE_WD_CLK_40MHZ 0x08000000
724 
725 #define CANFD6_REG_BITS_DEVICE_MODE_GPO2_MASK 0x00C00000
726 #define CANFD6_REG_BITS_DEVICE_MODE_GPO2_CAN_FAULT 0x00000000
727 #define CANFD6_REG_BITS_DEVICE_MODE_GPO2_MCAN_INT0 0x00400000
728 #define CANFD6_REG_BITS_DEVICE_MODE_GPO2_WDT 0x00800000
729 #define CANFD6_REG_BITS_DEVICE_MODE_GPO2_NINT 0x00C00000
730 
731 #define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_ENMASK 0x00200000
732 #define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_EN 0x00200000
733 #define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_DIS 0x00000000
734 
735 #define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_VOLT_MASK 0x00080000
736 #define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_VOLT_INTERNAL 0x00000000
737 #define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_VOLT_VIO 0x00080000
738 
739 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_RESET_BIT 0x00040000
740 
741 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_MASK 0x00020000
742 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_INT 0x00000000
743 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_INH_PULSE 0x00010000
744 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_WDT_PULSE 0x00020000
745 
746 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_MASK 0x0000C000
747 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_GPO 0x00000000
748 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_CLKOUT 0x00004000
749 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_GPI 0x00008000
750 
751 #define CANFD6_REG_BITS_DEVICE_MODE_FAIL_SAFE_MASK 0x00002000
752 #define CANFD6_REG_BITS_DEVICE_MODE_FAIL_SAFE_EN 0x00002000
753 #define CANFD6_REG_BITS_DEVICE_MODE_FAIL_SAFE_DIS 0x00000000
754 
755 #define CANFD6_REG_BITS_DEVICE_MODE_CLKOUT_MASK 0x00001000
756 #define CANFD6_REG_BITS_DEVICE_MODE_CLKOUT_DIV1 0x00000000
757 #define CANFD6_REG_BITS_DEVICE_MODE_CLKOUT_DIV2 0x00001000
758 
759 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_MASK 0x00000C00
760 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_SPI_INT 0x00000000
761 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_MCAN_INT1 0x00000400
762 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_UVLO_THERM 0x00000800
763 
764 #define CANFD6_REG_BITS_DEVICE_MODE_INH_MASK 0x00000200
765 #define CANFD6_REG_BITS_DEVICE_MODE_INH_DIS 0x00000200
766 #define CANFD6_REG_BITS_DEVICE_MODE_INH_EN 0x00000000
767 
768 #define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_CONFIG_MASK 0x00000100
769 #define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_CONFIG_INH 0x00000000
770 #define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_CONFIG_WKRQ 0x00000100
771 
772 #define CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_MASK 0x000000C0
773 #define CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_SLEEP 0x00000000
774 #define CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_STANDBY 0x00000040
775 #define CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_NORMAL 0x00000080
776 
777 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_MASK 0x00000008
778 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_EN 0x00000008
779 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_DIS 0x00000000
780 
781 #define CANFD6_REG_BITS_DEVICE_MODE_DEVICE_RESET 0x00000004
782 
783 #define CANFD6_REG_BITS_DEVICE_MODE_SWE_MASK 0x00000002
784 #define CANFD6_REG_BITS_DEVICE_MODE_SWE_DIS 0x00000002
785 #define CANFD6_REG_BITS_DEVICE_MODE_SWE_EN 0x00000000
786 
787 #define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_MASK 0x00000001
788 #define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_PHY 0x00000000
789 #define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_CONTROLLER 0x00000001
790  // canfd6_reg20
792 
803 #define CANFD6_REG_BITS_DEVICE_IR_CANLGND 0x08000000
804 #define CANFD6_REG_BITS_DEVICE_IR_CANBUSOPEN 0x04000000
805 #define CANFD6_REG_BITS_DEVICE_IR_CANBUSGND 0x02000000
806 #define CANFD6_REG_BITS_DEVICE_IR_CANBUSBAT 0x01000000
807 #define CANFD6_REG_BITS_DEVICE_IR_UVSUP 0x00400000
808 #define CANFD6_REG_BITS_DEVICE_IR_UVIO 0x00200000
809 #define CANFD6_REG_BITS_DEVICE_IR_PWRON 0x00100000
810 #define CANFD6_REG_BITS_DEVICE_IR_TSD 0x00080000
811 #define CANFD6_REG_BITS_DEVICE_IR_WDTO 0x00040000
812 #define CANFD6_REG_BITS_DEVICE_IR_ECCERR 0x00010000
813 #define CANFD6_REG_BITS_DEVICE_IR_CANINT 0x00008000
814 #define CANFD6_REG_BITS_DEVICE_IR_LWU 0x00004000
815 #define CANFD6_REG_BITS_DEVICE_IR_WKERR 0x00002000
816 #define CANFD6_REG_BITS_DEVICE_IR_FRAME_OVF 0x00001000
817 #define CANFD6_REG_BITS_DEVICE_IR_CANSLNT 0x00000400
818 #define CANFD6_REG_BITS_DEVICE_IR_CANDOM 0x00000100
819 #define CANFD6_REG_BITS_DEVICE_IR_GLOBALERR 0x00000080
820 #define CANFD6_REG_BITS_DEVICE_IR_nWKRQ 0x00000040
821 #define CANFD6_REG_BITS_DEVICE_IR_CANERR 0x00000020
822 #define CANFD6_REG_BITS_DEVICE_IR_CANBUSFAULT 0x00000010
823 #define CANFD6_REG_BITS_DEVICE_IR_SPIERR 0x00000008
824 #define CANFD6_REG_BITS_DEVICE_IR_SWERR 0x00000004
825 #define CANFD6_REG_BITS_DEVICE_IR_M_CAN_INT 0x00000002
826 #define CANFD6_REG_BITS_DEVICE_IR_VTWD 0x00000001
827  // canfd6_reg21
829 
840 #define CANFD6_REG_BITS_DEVICE_IE_UVCCOUT 0x00800000
841 #define CANFD6_REG_BITS_DEVICE_IE_UVSUP 0x00400000
842 #define CANFD6_REG_BITS_DEVICE_IE_UVIO 0x00200000
843 #define CANFD6_REG_BITS_DEVICE_IE_PWRON 0x00100000
844 #define CANFD6_REG_BITS_DEVICE_IE_TSD 0x00080000
845 #define CANFD6_REG_BITS_DEVICE_IE_WDTO 0x00040000
846 #define CANFD6_REG_BITS_DEVICE_IE_ECCERR 0x00010000
847 #define CANFD6_REG_BITS_DEVICE_IE_CANINT 0x00008000
848 #define CANFD6_REG_BITS_DEVICE_IE_LWU 0x00004000
849 #define CANFD6_REG_BITS_DEVICE_IE_WKERR 0x00002000
850 #define CANFD6_REG_BITS_DEVICE_IE_FRAME_OVF 0x00001000
851 #define CANFD6_REG_BITS_DEVICE_IE_CANSLNT 0x00000400
852 #define CANFD6_REG_BITS_DEVICE_IE_CANDOM 0x00000100
853 #define CANFD6_REG_BITS_DEVICE_IE_MASK 0x7F69D700
854  // canfd6_reg22
856 
871 #define CANFD6_MAP_MIKROBUS( cfg, mikrobus ) \
872  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
873  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
874  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
875  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
876  cfg.wkr = MIKROBUS( mikrobus, MIKROBUS_AN ); \
877  cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
878  cfg.wkp = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
879  cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
880  // canfd6_map // canfd6
883 
888 typedef struct
889 {
890  // Output pins
891 
892  digital_out_t wkr;
893  digital_out_t rst;
894  digital_out_t wkp;
896  // Input pins
897 
898  digital_in_t int_pin;
900  // Modules
901 
902  spi_master_t spi;
904  pin_name_t chip_select;
906 } canfd6_t;
907 
912 typedef struct
913 {
914  // Communication gpio pins
915 
916  pin_name_t miso;
917  pin_name_t mosi;
918  pin_name_t sck;
919  pin_name_t cs;
921  // Additional gpio pins
922 
923  pin_name_t wkr;
924  pin_name_t rst;
925  pin_name_t wkp;
926  pin_name_t int_pin;
928  // static variable
929 
930  uint32_t spi_speed;
931  spi_master_mode_t spi_mode;
932  spi_master_chip_select_polarity_t cs_polarity;
934 } canfd6_cfg_t;
935 
940 typedef enum
941 {
943  CANFD6_ERROR = -1
944 
946 
951 typedef enum
952 {
955 
957 
962 typedef enum
963 {
966 
968 
973 typedef enum
974 {
979 
981 
986 typedef enum
987 {
991 
993 
998 typedef enum
999 {
1003 
1005 
1010 typedef enum
1020 
1022 
1027 typedef enum
1039 
1044 typedef enum
1049  CANFD6_SID_SFT_RANGE = 0x0
1052 
1057 typedef enum
1069 
1074 typedef enum
1079  CANFD6_XID_EFT_RANGE = 0x0
1082 
1087 typedef enum
1091  CANFD6_GFC_REJECT = 2
1094 
1099 typedef enum
1106 
1111 typedef enum
1117 
1122 typedef enum
1129 
1134 typedef enum
1142 
1147 typedef enum
1155 
1160 typedef struct
1162  uint8_t data_bitrate_prescaler : 6;
1163  uint8_t data_tqbefore_samplepoint : 6;
1164  uint8_t data_tqafter_samplepoint : 5;
1167 
1172 typedef struct
1174  uint8_t data_bitrate_prescaler : 5;
1175  uint8_t data_time_seg1_and_prop : 5;
1176  uint8_t data_time_seg2 : 4;
1177  uint8_t data_sync_jumpwidth : 4;
1178  uint8_t tdc_offset : 7;
1179  uint8_t tdc_filter : 7;
1182 
1187 typedef struct
1189  uint16_t nominal_bitrate_prescaler : 10;
1190  uint16_t nominal_tqbefore_samplepoint : 9;
1191  uint8_t nominal_tqafter_samplepoint : 8;
1194 
1199 typedef struct
1201  uint16_t nominal_bitrate_prescaler : 9;
1202  uint8_t nominal_time_seg1_and_prop : 8;
1203  uint8_t nominal_time_seg2 : 7;
1204  uint8_t nominal_sync_jumpwidth : 7;
1207 
1212 typedef struct
1214  uint8_t sid_num_elements : 8;
1215  uint8_t xid_num_elements : 7;
1216  uint8_t rx0_num_elements : 7;
1217  canfd6_mram_elem_data_size_t rx0_element_size : 3;
1218  uint8_t rx1_num_elements : 7;
1219  canfd6_mram_elem_data_size_t rx1_element_size : 3;
1220  uint8_t rx_buf_num_elements : 7;
1221  canfd6_mram_elem_data_size_t rx_buf_element_size : 3;
1222  uint8_t tx_event_fifo_num_elements : 6;
1223  uint8_t tx_buffer_num_elements : 6;
1224  canfd6_mram_elem_data_size_t tx_buf_element_size : 3;
1227 
1232 typedef struct
1233 {
1234  union
1235  {
1236  uint32_t word;
1237  struct
1238  {
1239  uint8_t reserved : 2;
1240  uint8_t ASM : 1;
1241  uint8_t reserved2 : 1;
1242  uint8_t CSR : 1;
1243  uint8_t MON : 1;
1244  uint8_t DAR : 1;
1245  uint8_t TEST : 1;
1246  uint8_t FDOE : 1;
1247  uint8_t BRSE : 1;
1248  uint8_t reserved3 : 2;
1249  uint8_t PXHD : 1;
1250  uint8_t EFBI : 1;
1251  uint8_t TXP : 1;
1252  uint8_t NISO : 1;
1253  };
1254  };
1256 
1261 typedef struct
1262 {
1263  union
1264  {
1265  uint32_t word;
1266  struct
1267  {
1268  uint8_t RF0N : 1;
1269  uint8_t RF0W : 1;
1270  uint8_t RF0F : 1;
1271  uint8_t RF0L : 1;
1272  uint8_t RF1N : 1;
1273  uint8_t RF1W : 1;
1274  uint8_t RF1F : 1;
1275  uint8_t RF1L : 1;
1276  uint8_t HPM : 1;
1277  uint8_t TC : 1;
1278  uint8_t TCF : 1;
1279  uint8_t TFE : 1;
1280  uint8_t TEFN : 1;
1281  uint8_t TEFW : 1;
1282  uint8_t TEFF : 1;
1283  uint8_t TEFL : 1;
1284  uint8_t TSW : 1;
1285  uint8_t MRAF : 1;
1286  uint8_t TOO : 1;
1287  uint8_t DRX : 1;
1288  uint8_t BEC : 1;
1289  uint8_t BEU : 1;
1290  uint8_t ELO : 1;
1291  uint8_t EP : 1;
1292  uint8_t EW : 1;
1293  uint8_t BO : 1;
1294  uint8_t WDI : 1;
1295  uint8_t PEA : 1;
1296  uint8_t PED : 1;
1297  uint8_t ARA : 1;
1298  uint8_t reserved : 2;
1299  };
1300  };
1302 
1307 typedef struct
1308 {
1309  union
1310  {
1311  uint32_t word;
1312  struct
1313  {
1314  uint8_t RF0NE : 1;
1315  uint8_t RF0WE : 1;
1316  uint8_t RF0FE : 1;
1317  uint8_t RF0LE : 1;
1318  uint8_t RF1NE : 1;
1319  uint8_t RF1WE : 1;
1320  uint8_t RF1FE : 1;
1321  uint8_t RF1LE : 1;
1322  uint8_t HPME : 1;
1323  uint8_t TCE : 1;
1324  uint8_t TCFE : 1;
1325  uint8_t TFEE : 1;
1326  uint8_t TEFNE : 1;
1327  uint8_t TEFWE : 1;
1328  uint8_t TEFFE : 1;
1329  uint8_t TEFLE : 1;
1330  uint8_t TSWE : 1;
1331  uint8_t MRAFE : 1;
1332  uint8_t TOOE : 1;
1333  uint8_t DRXE : 1;
1334  uint8_t BECE : 1;
1335  uint8_t BEUE : 1;
1336  uint8_t ELOE : 1;
1337  uint8_t EPE : 1;
1338  uint8_t EWE : 1;
1339  uint8_t BOE : 1;
1340  uint8_t WDIE : 1;
1341  uint8_t PEAE : 1;
1342  uint8_t PEDE : 1;
1343  uint8_t ARAE : 1;
1344  uint8_t reserved : 2;
1345  };
1346  };
1348 
1353 typedef struct
1355  uint32_t ID : 29;
1356  uint8_t RTR : 1;
1357  uint8_t XTD : 1;
1358  uint8_t ESI : 1;
1359  uint16_t RXTS : 16;
1360  uint8_t DLC : 4;
1361  uint8_t BRS : 1;
1362  uint8_t FDF : 1;
1363  uint8_t reserved : 2;
1364  uint8_t FIDX : 7;
1365  uint8_t ANMF : 1;
1368 
1373 typedef struct
1375  uint32_t ID : 29;
1376  uint8_t RTR : 1;
1377  uint8_t XTD : 1;
1378  uint8_t ESI : 1;
1379  uint8_t DLC : 4;
1380  uint8_t BRS : 1;
1381  uint8_t FDF : 1;
1382  uint8_t reserved : 1;
1383  uint8_t EFC : 1;
1384  uint8_t MM : 8;
1387 
1392 typedef struct
1393 {
1394  union
1395  {
1396  uint32_t word;
1397  struct
1398  {
1399  uint16_t SFID2 : 11;
1400  uint8_t reserved : 5;
1401  uint16_t SFID1 : 11;
1403  canfd6_sid_sfec_values_t SFT : 2;
1404  };
1405  };
1407 
1412 typedef struct
1414  uint32_t EFID2 : 29;
1415  uint8_t reserved : 1;
1417  uint32_t EFID1 : 29;
1418  canfd6_xid_efec_values_t EFEC : 3;
1421 
1426 typedef struct
1427 {
1428  union
1429  {
1430  uint32_t word;
1431  struct
1432  {
1433  uint8_t RRFE : 1;
1434  uint8_t RRFS : 1;
1437  uint32_t reserved : 26;
1438  };
1439  };
1441 
1446 typedef struct
1447 {
1448  union
1449  {
1450  uint32_t word;
1451  struct
1452  {
1453  uint8_t VTWD : 1;
1454  uint8_t M_CAN_INT : 1;
1455  uint8_t SWERR : 1;
1456  uint8_t SPIERR : 1;
1457  uint8_t CBF : 1;
1458  uint8_t CANERR : 1;
1459  uint8_t WKRQ : 1;
1460  uint8_t GLOBALERR : 1;
1461  uint8_t CANDOM : 1;
1462  uint8_t RESERVED : 1;
1463  uint8_t CANTO : 1;
1464  uint8_t RESERVED2 : 1;
1465  uint8_t FRAME_OVF : 1;
1466  uint8_t WKERR : 1;
1467  uint8_t LWU : 1;
1468  uint8_t CANINT : 1;
1469  uint8_t ECCERR : 1;
1470  uint8_t RESERVED3 : 1;
1471  uint8_t WDTO : 1;
1472  uint8_t TSD : 1;
1473  uint8_t PWRON : 1;
1474  uint8_t UVIO : 1;
1475  uint8_t UVSUP : 1;
1476  uint8_t SMS : 1;
1477  uint8_t CANBUSBAT : 1;
1478  uint8_t CANBUSGND : 1;
1479  uint8_t CANBUSOPEN : 1;
1480  uint8_t CANLGND : 1;
1481  uint8_t CANHBAT : 1;
1482  uint8_t CANHCANL : 1;
1483  uint8_t CANBUSTERMOPEN : 1;
1484  uint8_t CANBUSNORM : 1;
1485  };
1486  };
1488 
1493 typedef struct
1494 {
1495  union
1496  {
1497  uint32_t word;
1498  struct
1499  {
1500  uint8_t RESERVED1 : 8;
1501  uint8_t CANDOMEN : 1;
1502  uint8_t RESERVED2 : 1;
1503  uint8_t CANTOEN : 1;
1504  uint8_t RESERVED3 : 1;
1505  uint8_t FRAME_OVFEN : 1;
1506  uint8_t WKERREN : 1;
1507  uint8_t LWUEN : 1;
1508  uint8_t CANINTEN : 1;
1509  uint8_t ECCERREN : 1;
1510  uint8_t RESERVED4 : 1;
1511  uint8_t WDTOEN : 1;
1512  uint8_t TSDEN : 1;
1513  uint8_t PWRONEN : 1;
1514  uint8_t UVIOEN : 1;
1515  uint8_t UVSUPEN : 1;
1516  uint8_t SMSEN : 1;
1517  uint8_t CANBUSBATEN : 1;
1518  uint8_t CANBUSGNDEN : 1;
1519  uint8_t CANBUSOPENEN : 1;
1520  uint8_t CANLGNDEN : 1;
1521  uint8_t CANHBATEN : 1;
1522  uint8_t CANHCANLEN : 1;
1523  uint8_t CANBUSTERMOPENEN : 1;
1524  uint8_t CANBUSNORMEN : 1;
1525  };
1526  };
1528 
1533 typedef struct
1534 {
1535  union
1536  {
1537  uint32_t word;
1538  struct
1539  {
1540  uint8_t RESERVED0 : 1;
1541  uint8_t SWE_DIS: 1;
1542  uint8_t DEVICE_RESET : 1;
1543  uint8_t WD_EN : 1;
1544  uint8_t RESERVED1 : 4;
1545  uint8_t nWKRQ_CONFIG : 1;
1546  uint8_t INH_DIS : 1;
1547  canfd6_dev_config_gpo1_t GPIO1_GPO_CONFIG : 2;
1548  uint8_t RESERVED2 : 1;
1549  uint8_t FAIL_SAFE_EN : 1;
1550  canfd6_dev_config_gpio1_t GPIO1_CONFIG : 2;
1552  uint8_t WD_BIT_RESET : 1;
1553  uint8_t nWKRQ_VOLTAGE : 1;
1554  uint8_t RESERVED3 : 2;
1555  canfd6_dev_config_gpo2_t GPO2_CONFIG : 2;
1556  uint8_t RESERVED4 : 3;
1557  uint8_t CLK_REF : 1;
1558  uint8_t RESERVED5 : 2;
1559  canfd6_dev_config_wake_t WAKE_CONFIG : 2;
1560  };
1561  };
1563 
1579 void canfd6_cfg_setup ( canfd6_cfg_t *cfg );
1580 
1595 err_t canfd6_init ( canfd6_t *ctx, canfd6_cfg_t *cfg );
1596 
1607 void canfd6_default_cfg ( canfd6_t *ctx );
1608 
1618 void canfd6_wkr_pin_state ( canfd6_t *ctx, canfd6_pin_state_t state );
1619 
1629 void canfd6_rst_pin_state ( canfd6_t *ctx, canfd6_pin_state_t state );
1630 
1640 void canfd6_wkp_pin_state ( canfd6_t *ctx, canfd6_pin_state_t state );
1641 
1651 uint8_t canfd6_get_int_pin ( canfd6_t *ctx );
1652 
1666 
1680 
1692 
1704 
1716 
1728 
1741 
1754 
1766 
1778 
1791 
1804 
1817 
1837 err_t canfd6_mram_configure ( canfd6_t *ctx, canfd6_mram_config_t *mram_config );
1838 
1849 void canfd6_mram_clear ( canfd6_t *ctx );
1850 
1867 uint8_t canfd6_mcan_read_nextfifo ( canfd6_t *ctx, canfd6_mcan_fifo_enum_t fifo_def, canfd6_mcan_rx_header_t *header, uint8_t data_payload[ ] );
1868 
1884 uint8_t canfd6_mcan_read_rxbuffer ( canfd6_t *ctx, uint8_t buf_index, canfd6_mcan_rx_header_t *header, uint8_t data_payload[ ] );
1885 
1900 uint32_t canfd6_mcan_write_txbuffer ( canfd6_t *ctx, uint8_t buf_index, canfd6_mcan_tx_header_t *header, uint8_t data_payload[ ] );
1901 
1915 err_t canfd6_mcan_transmit_buffer_contents ( canfd6_t *ctx, uint8_t buf_index );
1916 
1931 err_t canfd6_mcan_write_sid_filter ( canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_sid_filter_t *filter );
1932 
1947 err_t canfd6_mcan_read_sid_filter ( canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_sid_filter_t *filter );
1948 
1963 err_t canfd6_mcan_write_xid_filter ( canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_xid_filter_t *filter );
1964 
1979 err_t canfd6_mcan_read_xid_filter ( canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_xid_filter_t *filter );
1980 
1991 
2003 
2013 
2025 
2037 
2047 uint8_t canfd6_mcan_dlc_to_bytes ( uint8_t input_dlc );
2048 
2058 uint8_t canfd6_mcan_txrxesc_data_byte_value ( uint8_t input_esc_value );
2059 
2069 uint16_t canfd6_device_read_version ( canfd6_t *ctx );
2070 
2081 void canfd6_device_configure ( canfd6_t *ctx, canfd6_dev_config_t *dev_cfg );
2082 
2094 
2106 
2118 
2128 
2137 void canfd6_device_clear_spierr ( canfd6_t *ctx );
2138 
2150 
2162 
2176 err_t canfd6_device_set_mode ( canfd6_t *ctx, canfd6_device_mode_enum_t mode_define );
2177 
2189 
2204 
2214 
2225 
2239 err_t canfd6_wdt_configure ( canfd6_t *ctx, canfd6_wdt_timer_enum_t wdt_timeout );
2240 
2251 
2260 void canfd6_wdt_enable ( canfd6_t *ctx );
2261 
2270 void canfd6_wdt_disable ( canfd6_t *ctx );
2271 
2280 void canfd6_wdt_reset ( canfd6_t *ctx );
2281 
2282 #ifdef __cplusplus
2283 }
2284 #endif
2285 #endif // CANFD6_H
2286  // canfd6
2288 
2289 // ------------------------------------------------------------------------ END
canfd6_mcan_interrupt_enable_t
CAN FD 6 Click MCAN interrupt enable.
Definition: canfd6.h:1306
CANFD6_XID_EFEC_REJECTMATCH
Definition: canfd6.h:1061
CANFD6_DEV_CONFIG_GPO1_MCAN_INT1
Definition: canfd6.h:1101
canfd6_device_mode_enum_t
canfd6_device_mode_enum_t
CAN FD 6 Click device mode enum.
Definition: canfd6.h:997
CANFD6_GFC_REJECT
Definition: canfd6.h:1090
CANFD6_SID_SFEC_REJECTMATCH
Definition: canfd6.h:1031
CANFD6_MRAM_20_Byte_Data
Definition: canfd6.h:1014
canfd6_device_enable_testmode
err_t canfd6_device_enable_testmode(canfd6_t *ctx, canfd6_device_test_mode_enum_t mode_define)
CAN FD 6 device enable testmode function.
canfd6_device_disable_testmode
void canfd6_device_disable_testmode(canfd6_t *ctx)
CAN FD 6 device disable testmode function.
canfd6_device_clear_interrupts_all
void canfd6_device_clear_interrupts_all(canfd6_t *ctx)
CAN FD 6 device clear interrupts all function.
canfd6_device_interrupts_t
CAN FD 6 Click device interrupt bit field struct.
Definition: canfd6.h:1445
canfd6_mcan_nominal_timing_raw_t
CAN FD 6 Click nominal timing raw structure.
Definition: canfd6.h:1198
canfd6_xid_efec_values_t
canfd6_xid_efec_values_t
CAN FD 6 XID EFEC enum.
Definition: canfd6.h:1056
canfd6_mcan_configure_interrupt_enable
void canfd6_mcan_configure_interrupt_enable(canfd6_t *ctx, canfd6_mcan_interrupt_enable_t *ie)
CAN FD 6 configure interrupt enable function.
CANFD6_XID_EFEC_PRIORITYSTORERX1
Definition: canfd6.h:1064
canfd6_mram_configure
err_t canfd6_mram_configure(canfd6_t *ctx, canfd6_mram_config_t *mram_config)
CAN FD 6 mram configure function.
canfd6_device_clear_spierr
void canfd6_device_clear_spierr(canfd6_t *ctx)
CAN FD 6 device clear spierr function.
CANFD6_PIN_STATE_LOW
Definition: canfd6.h:952
CANFD6_XID_EFEC_STORERX0
Definition: canfd6.h:1059
CANFD6_DEV_CONFIG_WDT_ACTION_nINT
Definition: canfd6.h:1123
CANFD6_MRAM_64_Byte_Data
Definition: canfd6.h:1018
CANFD6_XID_EFT_DUALID
Definition: canfd6.h:1077
canfd6_cfg_setup
void canfd6_cfg_setup(canfd6_cfg_t *cfg)
CAN FD 6 configuration object setup function.
canfd6_mcan_read_nominaltiming_raw
void canfd6_mcan_read_nominaltiming_raw(canfd6_t *ctx, canfd6_mcan_nominal_timing_raw_t *nom_timing)
CAN FD 6 read nominal timing raw function.
canfd6_mcan_write_sid_filter
err_t canfd6_mcan_write_sid_filter(canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_sid_filter_t *filter)
CAN FD 6 write sid filter function.
canfd6_mcan_read_interrupts
void canfd6_mcan_read_interrupts(canfd6_t *ctx, canfd6_mcan_interrupts_t *ir)
CAN FD 6 read interrupts function.
CANFD6_DEVICE_MODE_SLEEP
Definition: canfd6.h:1001
canfd6_wdt_configure
err_t canfd6_wdt_configure(canfd6_t *ctx, canfd6_wdt_timer_enum_t wdt_timeout)
CAN FD 6 wdt configure function.
CANFD6_PIN_STATE_HIGH
Definition: canfd6.h:953
CANFD6_DEV_CONFIG_WAKE_DISABLED
Definition: canfd6.h:1148
CANFD6_SID_SFEC_PRIORITYSTORERX0
Definition: canfd6.h:1033
CANFD6_DEV_CONFIG_GPO2_MIRROR_INT
Definition: canfd6.h:1138
canfd6_wdt_reset
void canfd6_wdt_reset(canfd6_t *ctx)
CAN FD 6 wdt reset function.
canfd6_device_configure_ie
void canfd6_device_configure_ie(canfd6_t *ctx, canfd6_device_interrupt_enable_t *ie)
CAN FD 6 device configure ie function.
canfd6_mcan_configure_globalfilter
void canfd6_mcan_configure_globalfilter(canfd6_t *ctx, canfd6_mcan_global_filter_configuration_t *gfc)
CAN FD 6 configure global filter function.
CANFD6_DEV_CONFIG_WAKE_FALLING_EDGE
Definition: canfd6.h:1150
CANFD6_DEVICE_TEST_MODE_PHY
Definition: canfd6.h:988
CANFD6_XID_EFEC_PRIORITYSTORERX0
Definition: canfd6.h:1063
CANFD6_SID_SFT_CLASSIC
Definition: canfd6.h:1046
canfd6_mcan_write_txbuffer
uint32_t canfd6_mcan_write_txbuffer(canfd6_t *ctx, uint8_t buf_index, canfd6_mcan_tx_header_t *header, uint8_t data_payload[])
CAN FD 6 write tx buffer function.
CANFD6_XID_EFEC_PRIORITY
Definition: canfd6.h:1062
canfd6_mcan_interrupts_t
CAN FD 6 Click MCAN interrupts.
Definition: canfd6.h:1260
canfd6_device_configure
void canfd6_device_configure(canfd6_t *ctx, canfd6_dev_config_t *dev_cfg)
CAN FD 6 device configure function.
CANFD6_ERROR
Definition: canfd6.h:942
canfd6_mcan_txrxesc_data_byte_value
uint8_t canfd6_mcan_txrxesc_data_byte_value(uint8_t input_esc_value)
CAN FD 6 txrxesc data byte value function.
canfd6_mram_clear
void canfd6_mram_clear(canfd6_t *ctx)
CAN FD 6 mram clear function.
canfd6_wdt_enable
void canfd6_wdt_enable(canfd6_t *ctx)
CAN FD 6 wdt enable function.
CANFD6_DEV_CONFIG_WAKE_BOTH_EDGES
Definition: canfd6.h:1151
canfd6_mcan_nominal_timing_simple_t
CAN FD 6 Click nominal timing simple structure.
Definition: canfd6.h:1186
canfd6_device_read_interrupts
void canfd6_device_read_interrupts(canfd6_t *ctx, canfd6_device_interrupts_t *ir)
CAN FD 6 device read interrupts function.
CANFD6_DEV_CONFIG_GPO2_NO_ACTION
Definition: canfd6.h:1135
canfd6_device_interrupt_enable_t
CAN FD 6 Click device interrupt enable bit field struct.
Definition: canfd6.h:1492
canfd6_mcan_write_xid_filter
err_t canfd6_mcan_write_xid_filter(canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_xid_filter_t *filter)
CAN FD 6 write xid filter function.
canfd6_mcan_transmit_buffer_contents
err_t canfd6_mcan_transmit_buffer_contents(canfd6_t *ctx, uint8_t buf_index)
CAN FD 6 transmit buffer contents function.
canfd6_device_read_config
void canfd6_device_read_config(canfd6_t *ctx, canfd6_dev_config_t *dev_cfg)
CAN FD 6 device read config function.
canfd6_rst_pin_state
void canfd6_rst_pin_state(canfd6_t *ctx, canfd6_pin_state_t state)
CAN FD 6 rst pin state function.
canfd6_mcan_tx_header_t
CAN FD 6 Click CAN message header for transmitted messages.
Definition: canfd6.h:1372
canfd6_mcan_configure_datatiming_simple
void canfd6_mcan_configure_datatiming_simple(canfd6_t *ctx, canfd6_mcan_data_timing_simple_t *data_timing)
CAN FD 6 configure data timing simple function.
CANFD6_GFC_ACCEPT_INTO_RXFIFO0
Definition: canfd6.h:1088
canfd6_init
err_t canfd6_init(canfd6_t *ctx, canfd6_cfg_t *cfg)
CAN FD 6 initialization function.
canfd6_dev_config_gpo1_t
canfd6_dev_config_gpo1_t
CAN FD 6 GPO1 config enum.
Definition: canfd6.h:1098
CANFD6_DEV_CONFIG_WDT_ACTION_PULSE_INH
Definition: canfd6.h:1124
CANFD6_WDT_6S
Definition: canfd6.h:977
canfd6_mcan_read_nextfifo
uint8_t canfd6_mcan_read_nextfifo(canfd6_t *ctx, canfd6_mcan_fifo_enum_t fifo_def, canfd6_mcan_rx_header_t *header, uint8_t data_payload[])
CAN FD 6 read next fifo function.
CANFD6_XID_EFEC_DISABLED
Definition: canfd6.h:1058
CANFD6_SID_SFEC_STORERXBUFORDEBUG
Definition: canfd6.h:1035
CANFD6_DEVICE_MODE_NORMAL
Definition: canfd6.h:999
CANFD6_DEV_CONFIG_WAKE_RISING_EDGE
Definition: canfd6.h:1149
CANFD6_DEV_CONFIG_GPO2_WATCHDOG
Definition: canfd6.h:1137
canfd6_mcan_global_filter_configuration_t
CAN FD 6 Click Global Filter Configuration Register struct.
Definition: canfd6.h:1425
canfd6_mcan_read_datatimingfd_raw
void canfd6_mcan_read_datatimingfd_raw(canfd6_t *ctx, canfd6_mcan_data_timing_raw_t *data_timing)
CAN FD 6 read data timing fd raw function.
CANFD6_SID_SFEC_STORERX0
Definition: canfd6.h:1029
canfd6_mcan_read_datatimingfd_simple
void canfd6_mcan_read_datatimingfd_simple(canfd6_t *ctx, canfd6_mcan_data_timing_simple_t *data_timing)
CAN FD 6 read data timing fd simple function.
canfd6_wdt_timer_enum_t
canfd6_wdt_timer_enum_t
CAN FD 6 Click WDT timer enum.
Definition: canfd6.h:972
canfd6_cfg_t
CAN FD 6 Click configuration object.
Definition: canfd6.h:911
CANFD6_MRAM_8_Byte_Data
Definition: canfd6.h:1011
CANFD6_GFC_ACCEPT_INTO_RXFIFO1
Definition: canfd6.h:1089
CANFD6_MRAM_32_Byte_Data
Definition: canfd6.h:1016
canfd6_gfc_no_match_behavior_t
canfd6_gfc_no_match_behavior_t
CAN FD 6 GFC enum.
Definition: canfd6.h:1086
canfd6_dev_config_wake_t
canfd6_dev_config_wake_t
CAN FD 6 wake config enum.
Definition: canfd6.h:1146
CANFD6_WDT_3S
Definition: canfd6.h:976
CANFD6_XID_EFT_CLASSIC
Definition: canfd6.h:1076
CANFD6_WDT_600MS
Definition: canfd6.h:975
canfd6_mram_config_t
CAN FD 6 Click MRAM config.
Definition: canfd6.h:1211
canfd6_sid_sft_values_t
canfd6_sid_sft_values_t
CAN FD 6 SID SFT enum.
Definition: canfd6.h:1043
canfd6_mcan_read_nominaltiming_simple
void canfd6_mcan_read_nominaltiming_simple(canfd6_t *ctx, canfd6_mcan_nominal_timing_simple_t *nom_timing)
CAN FD 6 read nominal timing simple function.
canfd6_mcan_fifo_enum_t
canfd6_mcan_fifo_enum_t
CAN FD 6 Click RX FIFO enum.
Definition: canfd6.h:961
canfd6_mcan_configure_datatiming_raw
void canfd6_mcan_configure_datatiming_raw(canfd6_t *ctx, canfd6_mcan_data_timing_raw_t *data_timing)
CAN FD 6 configure data timing raw function.
canfd6_mcan_read_rxbuffer
uint8_t canfd6_mcan_read_rxbuffer(canfd6_t *ctx, uint8_t buf_index, canfd6_mcan_rx_header_t *header, uint8_t data_payload[])
CAN FD 6 read rx buffer function.
canfd6_mcan_configure_nominaltiming_simple
void canfd6_mcan_configure_nominaltiming_simple(canfd6_t *ctx, canfd6_mcan_nominal_timing_simple_t *nom_timing)
CAN FD 6 configure nominal timing simple function.
CANFD6_DEV_CONFIG_GPIO1_CONFIG_WDT_INPUT
Definition: canfd6.h:1113
CANFD6_SID_SFEC_PRIORITYSTORERX1
Definition: canfd6.h:1034
canfd6_wdt_read
canfd6_wdt_timer_enum_t canfd6_wdt_read(canfd6_t *ctx)
CAN FD 6 wdt read function.
canfd6_sid_sfec_values_t
canfd6_sid_sfec_values_t
CAN FD 6 SID SFEC enum.
Definition: canfd6.h:1026
CANFD6_MRAM_24_Byte_Data
Definition: canfd6.h:1015
canfd6_mcan_read_interrupt_enable
void canfd6_mcan_read_interrupt_enable(canfd6_t *ctx, canfd6_mcan_interrupt_enable_t *ie)
CAN FD 6 read interrupt enable function.
CANFD6_SID_SFEC_STORERX1
Definition: canfd6.h:1030
canfd6_device_read_mode
canfd6_device_mode_enum_t canfd6_device_read_mode(canfd6_t *ctx)
CAN FD 6 device read mode function.
canfd6_mcan_cccr_config_t
CAN FD 6 Click CCCR config.
Definition: canfd6.h:1231
CANFD6_DEV_CONFIG_GPO1_SPI_FAULT_INT
Definition: canfd6.h:1100
canfd6_mcan_read_sid_filter
err_t canfd6_mcan_read_sid_filter(canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_sid_filter_t *filter)
CAN FD 6 read sid filter function.
canfd6_mcan_read_xid_filter
err_t canfd6_mcan_read_xid_filter(canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_xid_filter_t *filter)
CAN FD 6 read xid filter function.
canfd6_get_int_pin
uint8_t canfd6_get_int_pin(canfd6_t *ctx)
CAN FD 6 get int pin function.
canfd6_mcan_data_timing_raw_t
CAN FD 6 Click data timing raw structure.
Definition: canfd6.h:1171
canfd6_configure_cccr_register
void canfd6_configure_cccr_register(canfd6_t *ctx, canfd6_mcan_cccr_config_t *cccr_config)
CAN FD 6 configure cccr register function.
CANFD6_DEVICE_TEST_MODE_CONTROLLER
Definition: canfd6.h:989
CANFD6_RXFIFO1
Definition: canfd6.h:964
CANFD6_DEV_CONFIG_GPIO1_CONFIG_GPO
Definition: canfd6.h:1112
canfd6_device_clear_interrupts
void canfd6_device_clear_interrupts(canfd6_t *ctx, canfd6_device_interrupts_t *ir)
CAN FD 6 device clear interrupts function.
canfd6_dev_config_gpio1_t
canfd6_dev_config_gpio1_t
CAN FD 6 GPIO1 config enum.
Definition: canfd6.h:1110
canfd6_mcan_dlc_to_bytes
uint8_t canfd6_mcan_dlc_to_bytes(uint8_t input_dlc)
CAN FD 6 dlc to bytes function.
canfd6_return_value_t
canfd6_return_value_t
CAN FD 6 Click return value data.
Definition: canfd6.h:939
canfd6_wkr_pin_state
void canfd6_wkr_pin_state(canfd6_t *ctx, canfd6_pin_state_t state)
CAN FD 6 wkr pin state function.
canfd6_t
CAN FD 6 Click context object.
Definition: canfd6.h:887
CANFD6_XID_EFEC_STORERXBUFORDEBUG
Definition: canfd6.h:1065
CANFD6_SID_SFT_RANGE
Definition: canfd6.h:1048
CANFD6_MRAM_48_Byte_Data
Definition: canfd6.h:1017
canfd6_device_test_mode_enum_t
canfd6_device_test_mode_enum_t
CAN FD 6 Click device test enum.
Definition: canfd6.h:985
CANFD6_SID_SFEC_DISABLED
Definition: canfd6.h:1028
canfd6_device_read_interrupt_enable
void canfd6_device_read_interrupt_enable(canfd6_t *ctx, canfd6_device_interrupt_enable_t *ie)
CAN FD 6 device read interrupt enable function.
canfd6_xid_eft_values_t
canfd6_xid_eft_values_t
CAN FD 6 XID EFT enum.
Definition: canfd6.h:1073
canfd6_read_cccr_register
void canfd6_read_cccr_register(canfd6_t *ctx, canfd6_mcan_cccr_config_t *cccr_config)
CAN FD 6 read cccr register function.
canfd6_mcan_rx_header_t
CAN FD 6 Click CAN message header.
Definition: canfd6.h:1352
canfd6_dev_config_wdt_action_t
canfd6_dev_config_wdt_action_t
CAN FD 6 WDT action enum.
Definition: canfd6.h:1121
canfd6_device_read_version
uint16_t canfd6_device_read_version(canfd6_t *ctx)
CAN FD 6 device read version function.
CANFD6_RXFIFO0
Definition: canfd6.h:963
CANFD6_OK
Definition: canfd6.h:941
canfd6_mcan_data_timing_simple_t
CAN FD 6 Click data timing simple structure.
Definition: canfd6.h:1159
CANFD6_SID_SFT_DISABLED
Definition: canfd6.h:1045
canfd6_mcan_configure_nominaltiming_raw
void canfd6_mcan_configure_nominaltiming_raw(canfd6_t *ctx, canfd6_mcan_nominal_timing_raw_t *nom_timing)
CAN FD 6 configure nominal timing raw function.
CANFD6_MRAM_12_Byte_Data
Definition: canfd6.h:1012
CANFD6_SID_SFT_DUALID
Definition: canfd6.h:1047
canfd6_wkp_pin_state
void canfd6_wkp_pin_state(canfd6_t *ctx, canfd6_pin_state_t state)
CAN FD 6 wkp pin state function.
canfd6_device_read_testmode
canfd6_device_test_mode_enum_t canfd6_device_read_testmode(canfd6_t *ctx)
CAN FD 6 device read testmode function.
CANFD6_MRAM_16_Byte_Data
Definition: canfd6.h:1013
CANFD6_DEV_CONFIG_WDT_ACTION_PULSE_WDT_OUT
Definition: canfd6.h:1125
canfd6_default_cfg
void canfd6_default_cfg(canfd6_t *ctx)
CAN FD 6 default configuration function.
CANFD6_DEVICE_TEST_MODE_NORMAL
Definition: canfd6.h:987
CANFD6_DEVICE_MODE_STANDBY
Definition: canfd6.h:1000
CANFD6_XID_EFT_RANGENOMASK
Definition: canfd6.h:1075
CANFD6_DEV_CONFIG_GPO2_MCAN_INT0
Definition: canfd6.h:1136
canfd6_enable_protected_registers
err_t canfd6_enable_protected_registers(canfd6_t *ctx)
CAN FD 6 enable protected registers function.
canfd6_wdt_disable
void canfd6_wdt_disable(canfd6_t *ctx)
CAN FD 6 wdt disable function.
CANFD6_XID_EFEC_STORERX1
Definition: canfd6.h:1060
canfd6_mcan_sid_filter_t
CAN FD 6 Click standard ID filter struct.
Definition: canfd6.h:1391
canfd6_pin_state_t
canfd6_pin_state_t
CAN FD 6 Click pin states.
Definition: canfd6.h:950
canfd6_mram_elem_data_size_t
canfd6_mram_elem_data_size_t
CAN FD 6 Click MRAM element data size.
Definition: canfd6.h:1009
canfd6_device_set_mode
err_t canfd6_device_set_mode(canfd6_t *ctx, canfd6_device_mode_enum_t mode_define)
CAN FD 6 device set mode function.
CANFD6_XID_EFT_RANGE
Definition: canfd6.h:1078
canfd6_mcan_clear_interrupts_all
void canfd6_mcan_clear_interrupts_all(canfd6_t *ctx)
CAN FD 6 clear interrupts all function.
CANFD6_SID_SFEC_PRIORITY
Definition: canfd6.h:1032
canfd6_disable_protected_registers
err_t canfd6_disable_protected_registers(canfd6_t *ctx)
CAN FD 6 disable protected registers function.
canfd6_mcan_xid_filter_t
CAN FD 6 Click extended ID filter struct.
Definition: canfd6.h:1411
canfd6_dev_config_gpo2_t
canfd6_dev_config_gpo2_t
CAN FD 6 GPO2 config enum.
Definition: canfd6.h:1133
canfd6_mcan_clear_interrupts
void canfd6_mcan_clear_interrupts(canfd6_t *ctx, canfd6_mcan_interrupts_t *ir)
CAN FD 6 clear interrupts function.
CANFD6_WDT_60MS
Definition: canfd6.h:974
CANFD6_DEV_CONFIG_GPO1_UVO_OR_THERMAL_INT
Definition: canfd6.h:1102
canfd6_dev_config_t
CAN FD 6 Click device config struct.
Definition: canfd6.h:1532