canfd6  2.0.0.0
canfd6.h
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2 ** Copyright (C) 2020 MikroElektronika d.o.o.
3 ** Contact: https://www.mikroe.com/contact
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5 ** Permission is hereby granted, free of charge, to any person obtaining a copy
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22 
28 #ifndef CANFD6_H
29 #define CANFD6_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
35 #include "mikrosdk_version.h"
36 
37 #ifdef __GNUC__
38 #if mikroSDK_GET_VERSION < 20800ul
39 #include "rcu_delays.h"
40 #else
41 #include "delays.h"
42 #endif
43 #endif
44 
45 #include "drv_digital_out.h"
46 #include "drv_digital_in.h"
47 #include "drv_spi_master.h"
48 
60 #define CANFD6_MCAN_CACHE_CONFIGURATION
61 
62 #ifdef CANFD6_MCAN_CACHE_CONFIGURATION
63 #define CANFD6_MCAN_CACHE_SIDFC 0
64 #define CANFD6_MCAN_CACHE_XIDFC 1
65 #define CANFD6_MCAN_CACHE_RXF0C 2
66 #define CANFD6_MCAN_CACHE_RXF1C 3
67 #define CANFD6_MCAN_CACHE_RXBC 4
68 #define CANFD6_MCAN_CACHE_TXEFC 5
69 #define CANFD6_MCAN_CACHE_TXBC 6
70 #define CANFD6_MCAN_CACHE_RXESC 7
71 #define CANFD6_MCAN_CACHE_TXESC 8
72 #endif
73 
78 #define CANFD6_MRAM_SIZE 2048
79 
90 #define CANFD6_REG_SPI_CONFIG 0x0000
91 #define CANFD6_REG_DEV_CONFIG 0x0800
92 #define CANFD6_REG_MCAN 0x1000
93 #define CANFD6_REG_MRAM 0x8000
94  // canfd6_reg1
96 
107 #define CANFD6_REG_SPI_DEVICE_ID0 0x0000
108 #define CANFD6_REG_SPI_DEVICE_ID1 0x0004
109 #define CANFD6_REG_SPI_REVISION 0x0008
110 #define CANFD6_REG_SPI_STATUS 0x000C
111 #define CANFD6_REG_SPI_ERROR_STATUS_MASK 0x0010
112  // canfd6_reg2
114 
125 #define CANFD6_REG_DEV_MODES_AND_PINS 0x0800
126 #define CANFD6_REG_DEV_TIMESTAMP_PRESCALER 0x0804
127 #define CANFD6_REG_DEV_TEST_REGISTERS 0x0808
128 #define CANFD6_REG_DEV_IR 0x0820
129 #define CANFD6_REG_DEV_IE 0x0830
130  // canfd6_reg3
132 
143 #define CANFD6_REG_MCAN_CREL 0x1000
144 #define CANFD6_REG_MCAN_ENDN 0x1004
145 #define CANFD6_REG_MCAN_CUST 0x1008
146 #define CANFD6_REG_MCAN_DBTP 0x100C
147 #define CANFD6_REG_MCAN_TEST 0x1010
148 #define CANFD6_REG_MCAN_RWD 0x1014
149 #define CANFD6_REG_MCAN_CCCR 0x1018
150 #define CANFD6_REG_MCAN_NBTP 0x101C
151 #define CANFD6_REG_MCAN_TSCC 0x1020
152 #define CANFD6_REG_MCAN_TSCV 0x1024
153 #define CANFD6_REG_MCAN_TOCC 0x1028
154 #define CANFD6_REG_MCAN_TOCV 0x102C
155 #define CANFD6_REG_MCAN_ECR 0x1040
156 #define CANFD6_REG_MCAN_PSR 0x1044
157 #define CANFD6_REG_MCAN_TDCR 0x1048
158 #define CANFD6_REG_MCAN_IR 0x1050
159 #define CANFD6_REG_MCAN_IE 0x1054
160 #define CANFD6_REG_MCAN_ILS 0x1058
161 #define CANFD6_REG_MCAN_ILE 0x105C
162 #define CANFD6_REG_MCAN_GFC 0x1080
163 #define CANFD6_REG_MCAN_SIDFC 0x1084
164 #define CANFD6_REG_MCAN_XIDFC 0x1088
165 #define CANFD6_REG_MCAN_XIDAM 0x1090
166 #define CANFD6_REG_MCAN_HPMS 0x1094
167 #define CANFD6_REG_MCAN_NDAT1 0x1098
168 #define CANFD6_REG_MCAN_NDAT2 0x109C
169 #define CANFD6_REG_MCAN_RXF0C 0x10A0
170 #define CANFD6_REG_MCAN_RXF0S 0x10A4
171 #define CANFD6_REG_MCAN_RXF0A 0x10A8
172 #define CANFD6_REG_MCAN_RXBC 0x10AC
173 #define CANFD6_REG_MCAN_RXF1C 0x10B0
174 #define CANFD6_REG_MCAN_RXF1S 0x10B4
175 #define CANFD6_REG_MCAN_RXF1A 0x10B8
176 #define CANFD6_REG_MCAN_RXESC 0x10BC
177 #define CANFD6_REG_MCAN_TXBC 0x10C0
178 #define CANFD6_REG_MCAN_TXFQS 0x10C4
179 #define CANFD6_REG_MCAN_TXESC 0x10C8
180 #define CANFD6_REG_MCAN_TXBRP 0x10CC
181 #define CANFD6_REG_MCAN_TXBAR 0x10D0
182 #define CANFD6_REG_MCAN_TXBCR 0x10D4
183 #define CANFD6_REG_MCAN_TXBTO 0x10D8
184 #define CANFD6_REG_MCAN_TXBCF 0x10DC
185 #define CANFD6_REG_MCAN_TXBTIE 0x10E0
186 #define CANFD6_REG_MCAN_TXBCIE 0x10E4
187 #define CANFD6_REG_MCAN_TXEFC 0x10F0
188 #define CANFD6_REG_MCAN_TXEFS 0x10F4
189 #define CANFD6_REG_MCAN_TXEFA 0x10F8
190  // canfd6_reg4
192 
203 #define CANFD6_MCAN_DLC_0B 0x00000000
204 #define CANFD6_MCAN_DLC_1B 0x00000001
205 #define CANFD6_MCAN_DLC_2B 0x00000002
206 #define CANFD6_MCAN_DLC_3B 0x00000003
207 #define CANFD6_MCAN_DLC_4B 0x00000004
208 #define CANFD6_MCAN_DLC_5B 0x00000005
209 #define CANFD6_MCAN_DLC_6B 0x00000006
210 #define CANFD6_MCAN_DLC_7B 0x00000007
211 #define CANFD6_MCAN_DLC_8B 0x00000008
212 #define CANFD6_MCAN_DLC_12B 0x00000009
213 #define CANFD6_MCAN_DLC_16B 0x0000000A
214 #define CANFD6_MCAN_DLC_20B 0x0000000B
215 #define CANFD6_MCAN_DLC_24B 0x0000000C
216 #define CANFD6_MCAN_DLC_32B 0x0000000D
217 #define CANFD6_MCAN_DLC_48B 0x0000000E
218 #define CANFD6_MCAN_DLC_64B 0x0000000F
219  // canfd6_reg5
221 
226 #define CANFD6_REG_BITS_MCAN_DBTP_TDC_EN 0x00800000
227 
238 #define CANFD6_REG_BITS_MCAN_TEST_RX_DOM 0x00000000
239 #define CANFD6_REG_BITS_MCAN_TEST_RX_REC 0x00000080
240 #define CANFD6_REG_BITS_MCAN_TEST_TX_SP 0x00000020
241 #define CANFD6_REG_BITS_MCAN_TEST_TX_DOM 0x00000040
242 #define CANFD6_REG_BITS_MCAN_TEST_TX_REC 0x00000060
243 #define CANFD6_REG_BITS_MCAN_TEST_LOOP_BACK 0x00000010
244  // canfd6_reg6
246 
257 #define CANFD6_REG_BITS_MCAN_CCCR_RESERVED_MASK 0xFFFF0C00
258 #define CANFD6_REG_BITS_MCAN_CCCR_NISO_ISO 0x00000000
259 #define CANFD6_REG_BITS_MCAN_CCCR_NISO_BOSCH 0x00008000
260 #define CANFD6_REG_BITS_MCAN_CCCR_TXP 0x00004000
261 #define CANFD6_REG_BITS_MCAN_CCCR_EFBI 0x00002000
262 #define CANFD6_REG_BITS_MCAN_CCCR_PXHD_DIS 0x00001000
263 #define CANFD6_REG_BITS_MCAN_CCCR_BRSE 0x00000200
264 #define CANFD6_REG_BITS_MCAN_CCCR_FDOE 0x00000100
265 #define CANFD6_REG_BITS_MCAN_CCCR_TEST 0x00000080
266 #define CANFD6_REG_BITS_MCAN_CCCR_DAR_DIS 0x00000040
267 #define CANFD6_REG_BITS_MCAN_CCCR_MON 0x00000020
268 #define CANFD6_REG_BITS_MCAN_CCCR_CSR 0x00000010
269 #define CANFD6_REG_BITS_MCAN_CCCR_CSA 0x00000008
270 #define CANFD6_REG_BITS_MCAN_CCCR_ASM 0x00000004
271 #define CANFD6_REG_BITS_MCAN_CCCR_CCE 0x00000002
272 #define CANFD6_REG_BITS_MCAN_CCCR_INIT 0x00000001
273  // canfd6_reg7
275 
286 #define CANFD6_REG_BITS_MCAN_IE_ARAE 0x20000000
287 #define CANFD6_REG_BITS_MCAN_IE_PEDE 0x10000000
288 #define CANFD6_REG_BITS_MCAN_IE_PEAE 0x08000000
289 #define CANFD6_REG_BITS_MCAN_IE_WDIE 0x04000000
290 #define CANFD6_REG_BITS_MCAN_IE_BOE 0x02000000
291 #define CANFD6_REG_BITS_MCAN_IE_EWE 0x01000000
292 #define CANFD6_REG_BITS_MCAN_IE_EPE 0x00800000
293 #define CANFD6_REG_BITS_MCAN_IE_ELOE 0x00400000
294 #define CANFD6_REG_BITS_MCAN_IE_BEUE 0x00200000
295 #define CANFD6_REG_BITS_MCAN_IE_BECE 0x00100000
296 #define CANFD6_REG_BITS_MCAN_IE_DRXE 0x00080000
297 #define CANFD6_REG_BITS_MCAN_IE_TOOE 0x00040000
298 #define CANFD6_REG_BITS_MCAN_IE_MRAFE 0x00020000
299 #define CANFD6_REG_BITS_MCAN_IE_TSWE 0x00010000
300 #define CANFD6_REG_BITS_MCAN_IE_TEFLE 0x00008000
301 #define CANFD6_REG_BITS_MCAN_IE_TEFFE 0x00004000
302 #define CANFD6_REG_BITS_MCAN_IE_TEFWE 0x00002000
303 #define CANFD6_REG_BITS_MCAN_IE_TEFNE 0x00001000
304 #define CANFD6_REG_BITS_MCAN_IE_TFEE 0x00000800
305 #define CANFD6_REG_BITS_MCAN_IE_TCFE 0x00000400
306 #define CANFD6_REG_BITS_MCAN_IE_TCE 0x00000200
307 #define CANFD6_REG_BITS_MCAN_IE_HPME 0x00000100
308 #define CANFD6_REG_BITS_MCAN_IE_RF1LE 0x00000080
309 #define CANFD6_REG_BITS_MCAN_IE_RF1FE 0x00000040
310 #define CANFD6_REG_BITS_MCAN_IE_RF1WE 0x00000020
311 #define CANFD6_REG_BITS_MCAN_IE_RF1NE 0x00000010
312 #define CANFD6_REG_BITS_MCAN_IE_RF0LE 0x00000008
313 #define CANFD6_REG_BITS_MCAN_IE_RF0FE 0x00000004
314 #define CANFD6_REG_BITS_MCAN_IE_RF0WE 0x00000002
315 #define CANFD6_REG_BITS_MCAN_IE_RF0NE 0x00000001
316  // canfd6_reg8
318 
329 #define CANFD6_REG_BITS_MCAN_IR_ARA 0x20000000
330 #define CANFD6_REG_BITS_MCAN_IR_PED 0x10000000
331 #define CANFD6_REG_BITS_MCAN_IR_PEA 0x08000000
332 #define CANFD6_REG_BITS_MCAN_IR_WDI 0x04000000
333 #define CANFD6_REG_BITS_MCAN_IR_BO 0x02000000
334 #define CANFD6_REG_BITS_MCAN_IR_EW 0x01000000
335 #define CANFD6_REG_BITS_MCAN_IR_EP 0x00800000
336 #define CANFD6_REG_BITS_MCAN_IR_ELO 0x00400000
337 #define CANFD6_REG_BITS_MCAN_IR_BEU 0x00200000
338 #define CANFD6_REG_BITS_MCAN_IR_BEC 0x00100000
339 #define CANFD6_REG_BITS_MCAN_IR_DRX 0x00080000
340 #define CANFD6_REG_BITS_MCAN_IR_TOO 0x00040000
341 #define CANFD6_REG_BITS_MCAN_IR_MRAF 0x00020000
342 #define CANFD6_REG_BITS_MCAN_IR_TSW 0x00010000
343 #define CANFD6_REG_BITS_MCAN_IR_TEFL 0x00008000
344 #define CANFD6_REG_BITS_MCAN_IR_TEFF 0x00004000
345 #define CANFD6_REG_BITS_MCAN_IR_TEFW 0x00002000
346 #define CANFD6_REG_BITS_MCAN_IR_TEFN 0x00001000
347 #define CANFD6_REG_BITS_MCAN_IR_TFE 0x00000800
348 #define CANFD6_REG_BITS_MCAN_IR_TCF 0x00000400
349 #define CANFD6_REG_BITS_MCAN_IR_TC 0x00000200
350 #define CANFD6_REG_BITS_MCAN_IR_HPM 0x00000100
351 #define CANFD6_REG_BITS_MCAN_IR_RF1L 0x00000080
352 #define CANFD6_REG_BITS_MCAN_IR_RF1F 0x00000040
353 #define CANFD6_REG_BITS_MCAN_IR_RF1W 0x00000020
354 #define CANFD6_REG_BITS_MCAN_IR_RF1N 0x00000010
355 #define CANFD6_REG_BITS_MCAN_IR_RF0L 0x00000008
356 #define CANFD6_REG_BITS_MCAN_IR_RF0F 0x00000004
357 #define CANFD6_REG_BITS_MCAN_IR_RF0W 0x00000002
358 #define CANFD6_REG_BITS_MCAN_IR_RF0N 0x00000001
359  // canfd6_reg9
361 
372 #define CANFD6_REG_BITS_MCAN_IE_ARAL 0x20000000
373 #define CANFD6_REG_BITS_MCAN_IE_PEDL 0x10000000
374 #define CANFD6_REG_BITS_MCAN_IE_PEAL 0x08000000
375 #define CANFD6_REG_BITS_MCAN_IE_WDIL 0x04000000
376 #define CANFD6_REG_BITS_MCAN_IE_BOL 0x02000000
377 #define CANFD6_REG_BITS_MCAN_IE_EWL 0x01000000
378 #define CANFD6_REG_BITS_MCAN_IE_EPL 0x00800000
379 #define CANFD6_REG_BITS_MCAN_IE_ELOL 0x00400000
380 #define CANFD6_REG_BITS_MCAN_IE_BEUL 0x00200000
381 #define CANFD6_REG_BITS_MCAN_IE_BECL 0x00100000
382 #define CANFD6_REG_BITS_MCAN_IE_DRXL 0x00080000
383 #define CANFD6_REG_BITS_MCAN_IE_TOOL 0x00040000
384 #define CANFD6_REG_BITS_MCAN_IE_MRAFL 0x00020000
385 #define CANFD6_REG_BITS_MCAN_IE_TSWL 0x00010000
386 #define CANFD6_REG_BITS_MCAN_IE_TEFLL 0x00008000
387 #define CANFD6_REG_BITS_MCAN_IE_TEFFL 0x00004000
388 #define CANFD6_REG_BITS_MCAN_IE_TEFWL 0x00002000
389 #define CANFD6_REG_BITS_MCAN_IE_TEFNL 0x00001000
390 #define CANFD6_REG_BITS_MCAN_IE_TFEL 0x00000800
391 #define CANFD6_REG_BITS_MCAN_IE_TCFL 0x00000400
392 #define CANFD6_REG_BITS_MCAN_IE_TCL 0x00000200
393 #define CANFD6_REG_BITS_MCAN_IE_HPML 0x00000100
394 #define CANFD6_REG_BITS_MCAN_IE_RF1LL 0x00000080
395 #define CANFD6_REG_BITS_MCAN_IE_RF1FL 0x00000040
396 #define CANFD6_REG_BITS_MCAN_IE_RF1WL 0x00000020
397 #define CANFD6_REG_BITS_MCAN_IE_RF1NL 0x00000010
398 #define CANFD6_REG_BITS_MCAN_IE_RF0LL 0x00000008
399 #define CANFD6_REG_BITS_MCAN_IE_RF0FL 0x00000004
400 #define CANFD6_REG_BITS_MCAN_IE_RF0WL 0x00000002
401 #define CANFD6_REG_BITS_MCAN_IE_RF0NL 0x00000001
402  // canfd6_reg10
404 
415 #define CANFD6_REG_BITS_MCAN_ILE_EINT1 0x00000002
416 #define CANFD6_REG_BITS_MCAN_ILE_EINT0 0x00000001
417  // canfd6_reg11
419 
430 #define CANFD6_REG_BITS_MCAN_GFC_ANFS_FIFO0 0x00000000
431 #define CANFD6_REG_BITS_MCAN_GFC_ANFS_FIFO1 0x00000010
432 #define CANFD6_REG_BITS_MCAN_GFC_ANFE_FIFO0 0x00000000
433 #define CANFD6_REG_BITS_MCAN_GFC_ANFE_FIFO1 0x00000004
434 #define CANFD6_REG_BITS_MCAN_GFC_RRFS 0x00000002
435 #define CANFD6_REG_BITS_MCAN_GFC_RRFE 0x00000001
436 #define CANFD6_REG_BITS_MCAN_GFC_MASK 0x0000003F
437  // canfd6_reg12
439 
444 #define CANFD6_REG_BITS_MCAN_RXF0C_F0OM_OVERWRITE 0x80000000
445 
456 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_8B 0x00000000
457 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_12B 0x00000100
458 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_16B 0x00000200
459 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_20B 0x00000300
460 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_24B 0x00000400
461 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_32B 0x00000500
462 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_48B 0x00000600
463 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_64B 0x00000700
464 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_8B 0x00000000
465 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_12B 0x00000010
466 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_16B 0x00000020
467 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_20B 0x00000030
468 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_24B 0x00000040
469 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_32B 0x00000050
470 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_48B 0x00000060
471 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_64B 0x00000070
472 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_8B 0x00000000
473 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_12B 0x00000001
474 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_16B 0x00000002
475 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_20B 0x00000003
476 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_24B 0x00000004
477 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_32B 0x00000005
478 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_48B 0x00000006
479 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_64B 0x00000007
480  // canfd6_reg13
482 
487 #define CANFD6_REG_BITS_MCAN_TXBC_TFQM 0x40000000
488 
499 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_8 0x00000000
500 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_12 0x00000001
501 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_16 0x00000002
502 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_20 0x00000003
503 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_24 0x00000004
504 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_32 0x00000005
505 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_48 0x00000006
506 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_64 0x00000007
507  // canfd6_reg14
509 
520 #define CANFD6_REG_BITS_MCAN_TSCC_PRESCALER_MASK 0x000F0000
521 #define CANFD6_REG_BITS_MCAN_TSCC_COUNTER_ALWAYS_0 0x00000000
522 #define CANFD6_REG_BITS_MCAN_TSCC_COUNTER_USE_TCP 0x00000001
523 #define CANFD6_REG_BITS_MCAN_TSCC_COUNTER_EXTERNAL 0x00000002
524  // canfd6_reg15
526 
537 #define CANFD6_REG_BITS_MCAN_TXBAR_AR31 0x80000000
538 #define CANFD6_REG_BITS_MCAN_TXBAR_AR30 0x40000000
539 #define CANFD6_REG_BITS_MCAN_TXBAR_AR29 0x20000000
540 #define CANFD6_REG_BITS_MCAN_TXBAR_AR28 0x10000000
541 #define CANFD6_REG_BITS_MCAN_TXBAR_AR27 0x08000000
542 #define CANFD6_REG_BITS_MCAN_TXBAR_AR26 0x04000000
543 #define CANFD6_REG_BITS_MCAN_TXBAR_AR25 0x02000000
544 #define CANFD6_REG_BITS_MCAN_TXBAR_AR24 0x01000000
545 #define CANFD6_REG_BITS_MCAN_TXBAR_AR23 0x00800000
546 #define CANFD6_REG_BITS_MCAN_TXBAR_AR22 0x00400000
547 #define CANFD6_REG_BITS_MCAN_TXBAR_AR21 0x00200000
548 #define CANFD6_REG_BITS_MCAN_TXBAR_AR20 0x00100000
549 #define CANFD6_REG_BITS_MCAN_TXBAR_AR19 0x00080000
550 #define CANFD6_REG_BITS_MCAN_TXBAR_AR18 0x00040000
551 #define CANFD6_REG_BITS_MCAN_TXBAR_AR17 0x00020000
552 #define CANFD6_REG_BITS_MCAN_TXBAR_AR16 0x00010000
553 #define CANFD6_REG_BITS_MCAN_TXBAR_AR15 0x00008000
554 #define CANFD6_REG_BITS_MCAN_TXBAR_AR14 0x00004000
555 #define CANFD6_REG_BITS_MCAN_TXBAR_AR13 0x00002000
556 #define CANFD6_REG_BITS_MCAN_TXBAR_AR12 0x00001000
557 #define CANFD6_REG_BITS_MCAN_TXBAR_AR11 0x00000800
558 #define CANFD6_REG_BITS_MCAN_TXBAR_AR10 0x00000400
559 #define CANFD6_REG_BITS_MCAN_TXBAR_AR9 0x00000200
560 #define CANFD6_REG_BITS_MCAN_TXBAR_AR8 0x00000100
561 #define CANFD6_REG_BITS_MCAN_TXBAR_AR7 0x00000080
562 #define CANFD6_REG_BITS_MCAN_TXBAR_AR6 0x00000040
563 #define CANFD6_REG_BITS_MCAN_TXBAR_AR5 0x00000020
564 #define CANFD6_REG_BITS_MCAN_TXBAR_AR4 0x00000010
565 #define CANFD6_REG_BITS_MCAN_TXBAR_AR3 0x00000008
566 #define CANFD6_REG_BITS_MCAN_TXBAR_AR2 0x00000004
567 #define CANFD6_REG_BITS_MCAN_TXBAR_AR1 0x00000002
568 #define CANFD6_REG_BITS_MCAN_TXBAR_AR0 0x00000001
569  // canfd6_reg16
571 
582 #define CANFD6_REG_BITS_MCAN_TXBCR_CR31 0x80000000
583 #define CANFD6_REG_BITS_MCAN_TXBCR_CR30 0x40000000
584 #define CANFD6_REG_BITS_MCAN_TXBCR_CR29 0x20000000
585 #define CANFD6_REG_BITS_MCAN_TXBCR_CR28 0x10000000
586 #define CANFD6_REG_BITS_MCAN_TXBCR_CR27 0x08000000
587 #define CANFD6_REG_BITS_MCAN_TXBCR_CR26 0x04000000
588 #define CANFD6_REG_BITS_MCAN_TXBCR_CR25 0x02000000
589 #define CANFD6_REG_BITS_MCAN_TXBCR_CR24 0x01000000
590 #define CANFD6_REG_BITS_MCAN_TXBCR_CR23 0x00800000
591 #define CANFD6_REG_BITS_MCAN_TXBCR_CR22 0x00400000
592 #define CANFD6_REG_BITS_MCAN_TXBCR_CR21 0x00200000
593 #define CANFD6_REG_BITS_MCAN_TXBCR_CR20 0x00100000
594 #define CANFD6_REG_BITS_MCAN_TXBCR_CR19 0x00080000
595 #define CANFD6_REG_BITS_MCAN_TXBCR_CR18 0x00040000
596 #define CANFD6_REG_BITS_MCAN_TXBCR_CR17 0x00020000
597 #define CANFD6_REG_BITS_MCAN_TXBCR_CR16 0x00010000
598 #define CANFD6_REG_BITS_MCAN_TXBCR_CR15 0x00008000
599 #define CANFD6_REG_BITS_MCAN_TXBCR_CR14 0x00004000
600 #define CANFD6_REG_BITS_MCAN_TXBCR_CR13 0x00002000
601 #define CANFD6_REG_BITS_MCAN_TXBCR_CR12 0x00001000
602 #define CANFD6_REG_BITS_MCAN_TXBCR_CR11 0x00000800
603 #define CANFD6_REG_BITS_MCAN_TXBCR_CR10 0x00000400
604 #define CANFD6_REG_BITS_MCAN_TXBCR_CR9 0x00000200
605 #define CANFD6_REG_BITS_MCAN_TXBCR_CR8 0x00000100
606 #define CANFD6_REG_BITS_MCAN_TXBCR_CR7 0x00000080
607 #define CANFD6_REG_BITS_MCAN_TXBCR_CR6 0x00000040
608 #define CANFD6_REG_BITS_MCAN_TXBCR_CR5 0x00000020
609 #define CANFD6_REG_BITS_MCAN_TXBCR_CR4 0x00000010
610 #define CANFD6_REG_BITS_MCAN_TXBCR_CR3 0x00000008
611 #define CANFD6_REG_BITS_MCAN_TXBCR_CR2 0x00000004
612 #define CANFD6_REG_BITS_MCAN_TXBCR_CR1 0x00000002
613 #define CANFD6_REG_BITS_MCAN_TXBCR_CR0 0x00000001
614  // canfd6_reg17
616 
627 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE31 0x80000000
628 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE30 0x40000000
629 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE29 0x20000000
630 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE28 0x10000000
631 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE27 0x08000000
632 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE26 0x04000000
633 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE25 0x02000000
634 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE24 0x01000000
635 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE23 0x00800000
636 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE22 0x00400000
637 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE21 0x00200000
638 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE20 0x00100000
639 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE19 0x00080000
640 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE18 0x00040000
641 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE17 0x00020000
642 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE16 0x00010000
643 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE15 0x00008000
644 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE14 0x00004000
645 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE13 0x00002000
646 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE12 0x00001000
647 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE11 0x00000800
648 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE10 0x00000400
649 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE9 0x00000200
650 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE8 0x00000100
651 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE7 0x00000080
652 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE6 0x00000040
653 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE5 0x00000020
654 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE4 0x00000010
655 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE3 0x00000008
656 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE2 0x00000004
657 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE1 0x00000002
658 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE0 0x00000001
659  // canfd6_reg18
661 
672 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE31 0x80000000
673 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE30 0x40000000
674 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE29 0x20000000
675 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE28 0x10000000
676 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE27 0x08000000
677 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE26 0x04000000
678 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE25 0x02000000
679 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE24 0x01000000
680 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE23 0x00800000
681 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE22 0x00400000
682 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE21 0x00200000
683 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE20 0x00100000
684 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE19 0x00080000
685 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE18 0x00040000
686 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE17 0x00020000
687 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE16 0x00010000
688 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE15 0x00008000
689 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE14 0x00004000
690 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE13 0x00002000
691 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE12 0x00001000
692 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE11 0x00000800
693 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE10 0x00000400
694 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE9 0x00000200
695 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE8 0x00000100
696 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE7 0x00000080
697 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE6 0x00000040
698 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE5 0x00000020
699 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE4 0x00000010
700 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE3 0x00000008
701 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE2 0x00000004
702 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE1 0x00000002
703 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE0 0x00000001
704  // canfd6_reg19
706 
717 #define CANFD6_REG_BITS_DEVICE_MODE_FORCED_SET_BITS 0x00000020
718 
719 #define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_MASK 0xC0000000
720 #define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_DIS 0x00000000
721 #define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_RISING 0x40000000
722 #define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_FALLING 0x80000000
723 #define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_BOTHEDGES 0xC0000000
724 
725 #define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_MASK 0x30000000
726 #define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_60MS 0x00000000
727 #define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_600MS 0x10000000
728 #define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_3S 0x20000000
729 #define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_6S 0x30000000
730 
731 #define CANFD6_REG_BITS_DEVICE_MODE_WD_CLK_MASK 0x08000000
732 #define CANFD6_REG_BITS_DEVICE_MODE_WD_CLK_20MHZ 0x00000000
733 #define CANFD6_REG_BITS_DEVICE_MODE_WD_CLK_40MHZ 0x08000000
734 
735 #define CANFD6_REG_BITS_DEVICE_MODE_GPO2_MASK 0x00C00000
736 #define CANFD6_REG_BITS_DEVICE_MODE_GPO2_CAN_FAULT 0x00000000
737 #define CANFD6_REG_BITS_DEVICE_MODE_GPO2_MCAN_INT0 0x00400000
738 #define CANFD6_REG_BITS_DEVICE_MODE_GPO2_WDT 0x00800000
739 #define CANFD6_REG_BITS_DEVICE_MODE_GPO2_NINT 0x00C00000
740 
741 #define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_ENMASK 0x00200000
742 #define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_EN 0x00200000
743 #define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_DIS 0x00000000
744 
745 #define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_VOLT_MASK 0x00080000
746 #define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_VOLT_INTERNAL 0x00000000
747 #define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_VOLT_VIO 0x00080000
748 
749 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_RESET_BIT 0x00040000
750 
751 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_MASK 0x00020000
752 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_INT 0x00000000
753 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_INH_PULSE 0x00010000
754 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_WDT_PULSE 0x00020000
755 
756 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_MASK 0x0000C000
757 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_GPO 0x00000000
758 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_CLKOUT 0x00004000
759 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_GPI 0x00008000
760 
761 #define CANFD6_REG_BITS_DEVICE_MODE_FAIL_SAFE_MASK 0x00002000
762 #define CANFD6_REG_BITS_DEVICE_MODE_FAIL_SAFE_EN 0x00002000
763 #define CANFD6_REG_BITS_DEVICE_MODE_FAIL_SAFE_DIS 0x00000000
764 
765 #define CANFD6_REG_BITS_DEVICE_MODE_CLKOUT_MASK 0x00001000
766 #define CANFD6_REG_BITS_DEVICE_MODE_CLKOUT_DIV1 0x00000000
767 #define CANFD6_REG_BITS_DEVICE_MODE_CLKOUT_DIV2 0x00001000
768 
769 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_MASK 0x00000C00
770 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_SPI_INT 0x00000000
771 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_MCAN_INT1 0x00000400
772 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_UVLO_THERM 0x00000800
773 
774 #define CANFD6_REG_BITS_DEVICE_MODE_INH_MASK 0x00000200
775 #define CANFD6_REG_BITS_DEVICE_MODE_INH_DIS 0x00000200
776 #define CANFD6_REG_BITS_DEVICE_MODE_INH_EN 0x00000000
777 
778 #define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_CONFIG_MASK 0x00000100
779 #define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_CONFIG_INH 0x00000000
780 #define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_CONFIG_WKRQ 0x00000100
781 
782 #define CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_MASK 0x000000C0
783 #define CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_SLEEP 0x00000000
784 #define CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_STANDBY 0x00000040
785 #define CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_NORMAL 0x00000080
786 
787 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_MASK 0x00000008
788 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_EN 0x00000008
789 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_DIS 0x00000000
790 
791 #define CANFD6_REG_BITS_DEVICE_MODE_DEVICE_RESET 0x00000004
792 
793 #define CANFD6_REG_BITS_DEVICE_MODE_SWE_MASK 0x00000002
794 #define CANFD6_REG_BITS_DEVICE_MODE_SWE_DIS 0x00000002
795 #define CANFD6_REG_BITS_DEVICE_MODE_SWE_EN 0x00000000
796 
797 #define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_MASK 0x00000001
798 #define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_PHY 0x00000000
799 #define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_CONTROLLER 0x00000001
800  // canfd6_reg20
802 
813 #define CANFD6_REG_BITS_DEVICE_IR_CANLGND 0x08000000
814 #define CANFD6_REG_BITS_DEVICE_IR_CANBUSOPEN 0x04000000
815 #define CANFD6_REG_BITS_DEVICE_IR_CANBUSGND 0x02000000
816 #define CANFD6_REG_BITS_DEVICE_IR_CANBUSBAT 0x01000000
817 #define CANFD6_REG_BITS_DEVICE_IR_UVSUP 0x00400000
818 #define CANFD6_REG_BITS_DEVICE_IR_UVIO 0x00200000
819 #define CANFD6_REG_BITS_DEVICE_IR_PWRON 0x00100000
820 #define CANFD6_REG_BITS_DEVICE_IR_TSD 0x00080000
821 #define CANFD6_REG_BITS_DEVICE_IR_WDTO 0x00040000
822 #define CANFD6_REG_BITS_DEVICE_IR_ECCERR 0x00010000
823 #define CANFD6_REG_BITS_DEVICE_IR_CANINT 0x00008000
824 #define CANFD6_REG_BITS_DEVICE_IR_LWU 0x00004000
825 #define CANFD6_REG_BITS_DEVICE_IR_WKERR 0x00002000
826 #define CANFD6_REG_BITS_DEVICE_IR_FRAME_OVF 0x00001000
827 #define CANFD6_REG_BITS_DEVICE_IR_CANSLNT 0x00000400
828 #define CANFD6_REG_BITS_DEVICE_IR_CANDOM 0x00000100
829 #define CANFD6_REG_BITS_DEVICE_IR_GLOBALERR 0x00000080
830 #define CANFD6_REG_BITS_DEVICE_IR_nWKRQ 0x00000040
831 #define CANFD6_REG_BITS_DEVICE_IR_CANERR 0x00000020
832 #define CANFD6_REG_BITS_DEVICE_IR_CANBUSFAULT 0x00000010
833 #define CANFD6_REG_BITS_DEVICE_IR_SPIERR 0x00000008
834 #define CANFD6_REG_BITS_DEVICE_IR_SWERR 0x00000004
835 #define CANFD6_REG_BITS_DEVICE_IR_M_CAN_INT 0x00000002
836 #define CANFD6_REG_BITS_DEVICE_IR_VTWD 0x00000001
837  // canfd6_reg21
839 
850 #define CANFD6_REG_BITS_DEVICE_IE_UVCCOUT 0x00800000
851 #define CANFD6_REG_BITS_DEVICE_IE_UVSUP 0x00400000
852 #define CANFD6_REG_BITS_DEVICE_IE_UVIO 0x00200000
853 #define CANFD6_REG_BITS_DEVICE_IE_PWRON 0x00100000
854 #define CANFD6_REG_BITS_DEVICE_IE_TSD 0x00080000
855 #define CANFD6_REG_BITS_DEVICE_IE_WDTO 0x00040000
856 #define CANFD6_REG_BITS_DEVICE_IE_ECCERR 0x00010000
857 #define CANFD6_REG_BITS_DEVICE_IE_CANINT 0x00008000
858 #define CANFD6_REG_BITS_DEVICE_IE_LWU 0x00004000
859 #define CANFD6_REG_BITS_DEVICE_IE_WKERR 0x00002000
860 #define CANFD6_REG_BITS_DEVICE_IE_FRAME_OVF 0x00001000
861 #define CANFD6_REG_BITS_DEVICE_IE_CANSLNT 0x00000400
862 #define CANFD6_REG_BITS_DEVICE_IE_CANDOM 0x00000100
863 #define CANFD6_REG_BITS_DEVICE_IE_MASK 0x7F69D700
864  // canfd6_reg22
866 
881 #define CANFD6_MAP_MIKROBUS( cfg, mikrobus ) \
882  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
883  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
884  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
885  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
886  cfg.wkr = MIKROBUS( mikrobus, MIKROBUS_AN ); \
887  cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
888  cfg.wkp = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
889  cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
890  // canfd6_map // canfd6
893 
898 typedef struct
899 {
900  // Output pins
901 
902  digital_out_t wkr;
903  digital_out_t rst;
904  digital_out_t wkp;
906  // Input pins
907 
908  digital_in_t int_pin;
910  // Modules
911 
912  spi_master_t spi;
914  pin_name_t chip_select;
916 } canfd6_t;
917 
922 typedef struct
923 {
924  // Communication gpio pins
925 
926  pin_name_t miso;
927  pin_name_t mosi;
928  pin_name_t sck;
929  pin_name_t cs;
931  // Additional gpio pins
932 
933  pin_name_t wkr;
934  pin_name_t rst;
935  pin_name_t wkp;
936  pin_name_t int_pin;
938  // static variable
939 
940  uint32_t spi_speed;
941  spi_master_mode_t spi_mode;
942  spi_master_chip_select_polarity_t cs_polarity;
944 } canfd6_cfg_t;
945 
950 typedef enum
951 {
953  CANFD6_ERROR = -1
954 
956 
961 typedef enum
962 {
965 
967 
972 typedef enum
973 {
976 
978 
983 typedef enum
984 {
989 
991 
996 typedef enum
997 {
1001 
1003 
1008 typedef enum
1009 {
1013 
1015 
1020 typedef enum
1021 {
1030 
1032 
1037 typedef enum
1038 {
1049 
1054 typedef enum
1055 {
1059  CANFD6_SID_SFT_RANGE = 0x0
1062 
1067 typedef enum
1068 {
1079 
1084 typedef enum
1085 {
1089  CANFD6_XID_EFT_RANGE = 0x0
1092 
1097 typedef enum
1098 {
1101  CANFD6_GFC_REJECT = 2
1104 
1109 typedef enum
1110 {
1116 
1121 typedef enum
1122 {
1127 
1132 typedef enum
1133 {
1139 
1144 typedef enum
1145 {
1152 
1157 typedef enum
1158 {
1165 
1170 typedef struct
1171 {
1177 
1182 typedef struct
1183 {
1186  uint8_t data_time_seg2 : 4;
1187  uint8_t data_sync_jumpwidth : 4;
1188  uint8_t tdc_offset : 7;
1189  uint8_t tdc_filter : 7;
1192 
1197 typedef struct
1198 {
1204 
1209 typedef struct
1210 {
1213  uint8_t nominal_time_seg2 : 7;
1217 
1222 typedef struct
1223 {
1224  uint8_t sid_num_elements : 8;
1225  uint8_t xid_num_elements : 7;
1226  uint8_t rx0_num_elements : 7;
1228  uint8_t rx1_num_elements : 7;
1230  uint8_t rx_buf_num_elements : 7;
1237 
1242 typedef struct
1243 {
1244  union
1245  {
1246  uint32_t word;
1247  struct
1248  {
1249  uint8_t reserved : 2;
1250  uint8_t ASM : 1;
1251  uint8_t reserved2 : 1;
1252  uint8_t CSR : 1;
1253  uint8_t MON : 1;
1254  uint8_t DAR : 1;
1255  uint8_t TEST : 1;
1256  uint8_t FDOE : 1;
1257  uint8_t BRSE : 1;
1258  uint8_t reserved3 : 2;
1259  uint8_t PXHD : 1;
1260  uint8_t EFBI : 1;
1261  uint8_t TXP : 1;
1262  uint8_t NISO : 1;
1263  };
1264  };
1266 
1271 typedef struct
1272 {
1273  union
1274  {
1275  uint32_t word;
1276  struct
1277  {
1278  uint8_t RF0N : 1;
1279  uint8_t RF0W : 1;
1280  uint8_t RF0F : 1;
1281  uint8_t RF0L : 1;
1282  uint8_t RF1N : 1;
1283  uint8_t RF1W : 1;
1284  uint8_t RF1F : 1;
1285  uint8_t RF1L : 1;
1286  uint8_t HPM : 1;
1287  uint8_t TC : 1;
1288  uint8_t TCF : 1;
1289  uint8_t TFE : 1;
1290  uint8_t TEFN : 1;
1291  uint8_t TEFW : 1;
1292  uint8_t TEFF : 1;
1293  uint8_t TEFL : 1;
1294  uint8_t TSW : 1;
1295  uint8_t MRAF : 1;
1296  uint8_t TOO : 1;
1297  uint8_t DRX : 1;
1298  uint8_t BEC : 1;
1299  uint8_t BEU : 1;
1300  uint8_t ELO : 1;
1301  uint8_t EP : 1;
1302  uint8_t EW : 1;
1303  uint8_t BO : 1;
1304  uint8_t WDI : 1;
1305  uint8_t PEA : 1;
1306  uint8_t PED : 1;
1307  uint8_t ARA : 1;
1308  uint8_t reserved : 2;
1309  };
1310  };
1312 
1317 typedef struct
1318 {
1319  union
1320  {
1321  uint32_t word;
1322  struct
1323  {
1324  uint8_t RF0NE : 1;
1325  uint8_t RF0WE : 1;
1326  uint8_t RF0FE : 1;
1327  uint8_t RF0LE : 1;
1328  uint8_t RF1NE : 1;
1329  uint8_t RF1WE : 1;
1330  uint8_t RF1FE : 1;
1331  uint8_t RF1LE : 1;
1332  uint8_t HPME : 1;
1333  uint8_t TCE : 1;
1334  uint8_t TCFE : 1;
1335  uint8_t TFEE : 1;
1336  uint8_t TEFNE : 1;
1337  uint8_t TEFWE : 1;
1338  uint8_t TEFFE : 1;
1339  uint8_t TEFLE : 1;
1340  uint8_t TSWE : 1;
1341  uint8_t MRAFE : 1;
1342  uint8_t TOOE : 1;
1343  uint8_t DRXE : 1;
1344  uint8_t BECE : 1;
1345  uint8_t BEUE : 1;
1346  uint8_t ELOE : 1;
1347  uint8_t EPE : 1;
1348  uint8_t EWE : 1;
1349  uint8_t BOE : 1;
1350  uint8_t WDIE : 1;
1351  uint8_t PEAE : 1;
1352  uint8_t PEDE : 1;
1353  uint8_t ARAE : 1;
1354  uint8_t reserved : 2;
1355  };
1356  };
1358 
1363 typedef struct
1364 {
1365  uint32_t ID : 29;
1366  uint8_t RTR : 1;
1367  uint8_t XTD : 1;
1368  uint8_t ESI : 1;
1369  uint16_t RXTS : 16;
1370  uint8_t DLC : 4;
1371  uint8_t BRS : 1;
1372  uint8_t FDF : 1;
1373  uint8_t reserved : 2;
1374  uint8_t FIDX : 7;
1375  uint8_t ANMF : 1;
1378 
1383 typedef struct
1384 {
1385  uint32_t ID : 29;
1386  uint8_t RTR : 1;
1387  uint8_t XTD : 1;
1388  uint8_t ESI : 1;
1389  uint8_t DLC : 4;
1390  uint8_t BRS : 1;
1391  uint8_t FDF : 1;
1392  uint8_t reserved : 1;
1393  uint8_t EFC : 1;
1394  uint8_t MM : 8;
1397 
1402 typedef struct
1403 {
1404  union
1405  {
1406  uint32_t word;
1407  struct
1408  {
1409  uint16_t SFID2 : 11;
1410  uint8_t reserved : 5;
1411  uint16_t SFID1 : 11;
1414  };
1415  };
1417 
1422 typedef struct
1423 {
1424  uint32_t EFID2 : 29;
1425  uint8_t reserved : 1;
1427  uint32_t EFID1 : 29;
1431 
1436 typedef struct
1437 {
1438  union
1439  {
1440  uint32_t word;
1441  struct
1442  {
1443  uint8_t RRFE : 1;
1444  uint8_t RRFS : 1;
1447  uint32_t reserved : 26;
1448  };
1449  };
1451 
1456 typedef struct
1457 {
1458  union
1459  {
1460  uint32_t word;
1461  struct
1462  {
1463  uint8_t VTWD : 1;
1464  uint8_t M_CAN_INT : 1;
1465  uint8_t SWERR : 1;
1466  uint8_t SPIERR : 1;
1467  uint8_t CBF : 1;
1468  uint8_t CANERR : 1;
1469  uint8_t WKRQ : 1;
1470  uint8_t GLOBALERR : 1;
1471  uint8_t CANDOM : 1;
1472  uint8_t RESERVED : 1;
1473  uint8_t CANTO : 1;
1474  uint8_t RESERVED2 : 1;
1475  uint8_t FRAME_OVF : 1;
1476  uint8_t WKERR : 1;
1477  uint8_t LWU : 1;
1478  uint8_t CANINT : 1;
1479  uint8_t ECCERR : 1;
1480  uint8_t RESERVED3 : 1;
1481  uint8_t WDTO : 1;
1482  uint8_t TSD : 1;
1483  uint8_t PWRON : 1;
1484  uint8_t UVIO : 1;
1485  uint8_t UVSUP : 1;
1486  uint8_t SMS : 1;
1487  uint8_t CANBUSBAT : 1;
1488  uint8_t CANBUSGND : 1;
1489  uint8_t CANBUSOPEN : 1;
1490  uint8_t CANLGND : 1;
1491  uint8_t CANHBAT : 1;
1492  uint8_t CANHCANL : 1;
1493  uint8_t CANBUSTERMOPEN : 1;
1494  uint8_t CANBUSNORM : 1;
1495  };
1496  };
1498 
1503 typedef struct
1504 {
1505  union
1506  {
1507  uint32_t word;
1508  struct
1509  {
1510  uint8_t RESERVED1 : 8;
1511  uint8_t CANDOMEN : 1;
1512  uint8_t RESERVED2 : 1;
1513  uint8_t CANTOEN : 1;
1514  uint8_t RESERVED3 : 1;
1515  uint8_t FRAME_OVFEN : 1;
1516  uint8_t WKERREN : 1;
1517  uint8_t LWUEN : 1;
1518  uint8_t CANINTEN : 1;
1519  uint8_t ECCERREN : 1;
1520  uint8_t RESERVED4 : 1;
1521  uint8_t WDTOEN : 1;
1522  uint8_t TSDEN : 1;
1523  uint8_t PWRONEN : 1;
1524  uint8_t UVIOEN : 1;
1525  uint8_t UVSUPEN : 1;
1526  uint8_t SMSEN : 1;
1527  uint8_t CANBUSBATEN : 1;
1528  uint8_t CANBUSGNDEN : 1;
1529  uint8_t CANBUSOPENEN : 1;
1530  uint8_t CANLGNDEN : 1;
1531  uint8_t CANHBATEN : 1;
1532  uint8_t CANHCANLEN : 1;
1533  uint8_t CANBUSTERMOPENEN : 1;
1534  uint8_t CANBUSNORMEN : 1;
1535  };
1536  };
1538 
1543 typedef struct
1544 {
1545  union
1546  {
1547  uint32_t word;
1548  struct
1549  {
1550  uint8_t RESERVED0 : 1;
1551  uint8_t SWE_DIS: 1;
1552  uint8_t DEVICE_RESET : 1;
1553  uint8_t WD_EN : 1;
1554  uint8_t RESERVED1 : 4;
1555  uint8_t nWKRQ_CONFIG : 1;
1556  uint8_t INH_DIS : 1;
1558  uint8_t RESERVED2 : 1;
1559  uint8_t FAIL_SAFE_EN : 1;
1562  uint8_t WD_BIT_RESET : 1;
1563  uint8_t nWKRQ_VOLTAGE : 1;
1564  uint8_t RESERVED3 : 2;
1566  uint8_t RESERVED4 : 3;
1567  uint8_t CLK_REF : 1;
1568  uint8_t RESERVED5 : 2;
1570  };
1571  };
1573 
1590 
1605 err_t canfd6_init ( canfd6_t *ctx, canfd6_cfg_t *cfg );
1606 
1618 
1629 
1640 
1651 
1661 uint8_t canfd6_get_int_pin ( canfd6_t *ctx );
1662 
1676 
1690 
1702 
1714 
1726 
1738 
1751 
1764 
1776 
1788 
1801 
1814 
1827 
1848 
1860 
1877 uint8_t canfd6_mcan_read_nextfifo ( canfd6_t *ctx, canfd6_mcan_fifo_enum_t fifo_def, canfd6_mcan_rx_header_t *header, uint8_t data_payload[ ] );
1878 
1894 uint8_t canfd6_mcan_read_rxbuffer ( canfd6_t *ctx, uint8_t buf_index, canfd6_mcan_rx_header_t *header, uint8_t data_payload[ ] );
1895 
1910 uint32_t canfd6_mcan_write_txbuffer ( canfd6_t *ctx, uint8_t buf_index, canfd6_mcan_tx_header_t *header, uint8_t data_payload[ ] );
1911 
1925 err_t canfd6_mcan_transmit_buffer_contents ( canfd6_t *ctx, uint8_t buf_index );
1926 
1941 err_t canfd6_mcan_write_sid_filter ( canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_sid_filter_t *filter );
1942 
1957 err_t canfd6_mcan_read_sid_filter ( canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_sid_filter_t *filter );
1958 
1973 err_t canfd6_mcan_write_xid_filter ( canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_xid_filter_t *filter );
1974 
1989 err_t canfd6_mcan_read_xid_filter ( canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_xid_filter_t *filter );
1990 
2001 
2013 
2023 
2035 
2047 
2057 uint8_t canfd6_mcan_dlc_to_bytes ( uint8_t input_dlc );
2058 
2068 uint8_t canfd6_mcan_txrxesc_data_byte_value ( uint8_t input_esc_value );
2069 
2080 
2092 
2104 
2116 
2128 
2138 
2148 
2160 
2172 
2187 
2199 
2214 
2224 
2235 
2250 
2261 
2271 
2281 
2291 
2292 #ifdef __cplusplus
2293 }
2294 #endif
2295 #endif // CANFD6_H
2296  // canfd6
2298 
2299 // ------------------------------------------------------------------------ END
canfd6_mcan_interrupt_enable_t
CAN FD 6 Click MCAN interrupt enable.
Definition: canfd6.h:1318
canfd6_t::wkp
digital_out_t wkp
Definition: canfd6.h:904
canfd6_mcan_cccr_config_t::word
uint32_t word
Definition: canfd6.h:1246
CANFD6_XID_EFEC_REJECTMATCH
@ CANFD6_XID_EFEC_REJECTMATCH
Definition: canfd6.h:1072
CANFD6_DEV_CONFIG_GPO1_MCAN_INT1
@ CANFD6_DEV_CONFIG_GPO1_MCAN_INT1
Definition: canfd6.h:1112
canfd6_mcan_nominal_timing_simple_t::nominal_bitrate_prescaler
uint16_t nominal_bitrate_prescaler
Definition: canfd6.h:1199
canfd6_device_interrupts_t::WDTO
uint8_t WDTO
Definition: canfd6.h:1481
canfd6_mcan_tx_header_t::EFC
uint8_t EFC
Definition: canfd6.h:1393
canfd6_device_mode_enum_t
canfd6_device_mode_enum_t
CAN FD 6 Click device mode enum.
Definition: canfd6.h:1009
canfd6_dev_config_t::GPIO1_CONFIG
canfd6_dev_config_gpio1_t GPIO1_CONFIG
Definition: canfd6.h:1560
CANFD6_GFC_REJECT
@ CANFD6_GFC_REJECT
Definition: canfd6.h:1101
canfd6_device_interrupts_t::CANTO
uint8_t CANTO
Definition: canfd6.h:1473
CANFD6_SID_SFEC_REJECTMATCH
@ CANFD6_SID_SFEC_REJECTMATCH
Definition: canfd6.h:1042
canfd6_mram_config_t::rx1_num_elements
uint8_t rx1_num_elements
Definition: canfd6.h:1228
canfd6_mcan_interrupts_t::TFE
uint8_t TFE
Definition: canfd6.h:1289
canfd6_mcan_interrupts_t::TCF
uint8_t TCF
Definition: canfd6.h:1288
canfd6_mcan_tx_header_t::reserved
uint8_t reserved
Definition: canfd6.h:1392
canfd6_dev_config_t::DEVICE_RESET
uint8_t DEVICE_RESET
Definition: canfd6.h:1552
CANFD6_MRAM_20_Byte_Data
@ CANFD6_MRAM_20_Byte_Data
Definition: canfd6.h:1025
canfd6_device_enable_testmode
err_t canfd6_device_enable_testmode(canfd6_t *ctx, canfd6_device_test_mode_enum_t mode_define)
CAN FD 6 device enable testmode function.
canfd6_mcan_interrupts_t::RF0F
uint8_t RF0F
Definition: canfd6.h:1280
canfd6_mcan_interrupt_enable_t::RF1LE
uint8_t RF1LE
Definition: canfd6.h:1331
canfd6_device_interrupt_enable_t::CANBUSTERMOPENEN
uint8_t CANBUSTERMOPENEN
Definition: canfd6.h:1533
canfd6_device_disable_testmode
void canfd6_device_disable_testmode(canfd6_t *ctx)
CAN FD 6 device disable testmode function.
canfd6_mcan_tx_header_t::ID
uint32_t ID
Definition: canfd6.h:1385
canfd6_cfg_t::wkp
pin_name_t wkp
Definition: canfd6.h:935
canfd6_device_interrupts_t::word
uint32_t word
Definition: canfd6.h:1460
canfd6_mcan_interrupts_t::BEC
uint8_t BEC
Definition: canfd6.h:1298
canfd6_mram_config_t::rx_buf_num_elements
uint8_t rx_buf_num_elements
Definition: canfd6.h:1230
canfd6_mcan_rx_header_t::DLC
uint8_t DLC
Definition: canfd6.h:1370
canfd6_mram_config_t::tx_event_fifo_num_elements
uint8_t tx_event_fifo_num_elements
Definition: canfd6.h:1232
canfd6_device_clear_interrupts_all
void canfd6_device_clear_interrupts_all(canfd6_t *ctx)
CAN FD 6 device clear interrupts all function.
canfd6_device_interrupts_t
CAN FD 6 Click device interrupt bit field struct.
Definition: canfd6.h:1457
canfd6_mcan_nominal_timing_raw_t
CAN FD 6 Click nominal timing raw structure.
Definition: canfd6.h:1210
canfd6_dev_config_t::INH_DIS
uint8_t INH_DIS
Definition: canfd6.h:1556
canfd6_xid_efec_values_t
canfd6_xid_efec_values_t
CAN FD 6 XID EFEC enum.
Definition: canfd6.h:1068
canfd6_mcan_configure_interrupt_enable
void canfd6_mcan_configure_interrupt_enable(canfd6_t *ctx, canfd6_mcan_interrupt_enable_t *ie)
CAN FD 6 configure interrupt enable function.
canfd6_device_interrupts_t::CANINT
uint8_t CANINT
Definition: canfd6.h:1478
canfd6_mcan_interrupt_enable_t::PEDE
uint8_t PEDE
Definition: canfd6.h:1352
CANFD6_XID_EFEC_PRIORITYSTORERX1
@ CANFD6_XID_EFEC_PRIORITYSTORERX1
Definition: canfd6.h:1075
canfd6_mram_configure
err_t canfd6_mram_configure(canfd6_t *ctx, canfd6_mram_config_t *mram_config)
CAN FD 6 mram configure function.
canfd6_cfg_t::sck
pin_name_t sck
Definition: canfd6.h:928
canfd6_cfg_t::wkr
pin_name_t wkr
Definition: canfd6.h:933
canfd6_dev_config_t::RESERVED5
uint8_t RESERVED5
Definition: canfd6.h:1568
canfd6_device_clear_spierr
void canfd6_device_clear_spierr(canfd6_t *ctx)
CAN FD 6 device clear spierr function.
canfd6_mcan_global_filter_configuration_t::word
uint32_t word
Definition: canfd6.h:1440
canfd6_mcan_data_timing_raw_t::tdc_offset
uint8_t tdc_offset
Definition: canfd6.h:1188
canfd6_device_interrupt_enable_t::RESERVED2
uint8_t RESERVED2
Definition: canfd6.h:1512
CANFD6_PIN_STATE_LOW
@ CANFD6_PIN_STATE_LOW
Definition: canfd6.h:963
CANFD6_XID_EFEC_STORERX0
@ CANFD6_XID_EFEC_STORERX0
Definition: canfd6.h:1070
canfd6_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: canfd6.h:942
CANFD6_DEV_CONFIG_WDT_ACTION_nINT
@ CANFD6_DEV_CONFIG_WDT_ACTION_nINT
Definition: canfd6.h:1134
canfd6_mcan_interrupts_t::RF1F
uint8_t RF1F
Definition: canfd6.h:1284
CANFD6_MRAM_64_Byte_Data
@ CANFD6_MRAM_64_Byte_Data
Definition: canfd6.h:1029
canfd6_mcan_interrupt_enable_t::BEUE
uint8_t BEUE
Definition: canfd6.h:1345
canfd6_mcan_xid_filter_t::reserved
uint8_t reserved
Definition: canfd6.h:1425
canfd6_mcan_interrupts_t::TSW
uint8_t TSW
Definition: canfd6.h:1294
canfd6_mcan_xid_filter_t::EFT
canfd6_xid_eft_values_t EFT
Definition: canfd6.h:1426
canfd6_mcan_nominal_timing_raw_t::nominal_bitrate_prescaler
uint16_t nominal_bitrate_prescaler
Definition: canfd6.h:1211
canfd6_mram_config_t::tx_buf_element_size
canfd6_mram_elem_data_size_t tx_buf_element_size
Definition: canfd6.h:1234
canfd6_mcan_rx_header_t::XTD
uint8_t XTD
Definition: canfd6.h:1367
CANFD6_XID_EFT_DUALID
@ CANFD6_XID_EFT_DUALID
Definition: canfd6.h:1088
canfd6_mcan_interrupt_enable_t::RF0WE
uint8_t RF0WE
Definition: canfd6.h:1325
canfd6_mcan_cccr_config_t::reserved2
uint8_t reserved2
Definition: canfd6.h:1251
canfd6_cfg_setup
void canfd6_cfg_setup(canfd6_cfg_t *cfg)
CAN FD 6 configuration object setup function.
canfd6_device_interrupt_enable_t::WDTOEN
uint8_t WDTOEN
Definition: canfd6.h:1521
canfd6_mcan_interrupts_t::TC
uint8_t TC
Definition: canfd6.h:1287
canfd6_mcan_cccr_config_t::EFBI
uint8_t EFBI
Definition: canfd6.h:1260
canfd6_mcan_read_nominaltiming_raw
void canfd6_mcan_read_nominaltiming_raw(canfd6_t *ctx, canfd6_mcan_nominal_timing_raw_t *nom_timing)
CAN FD 6 read nominal timing raw function.
canfd6_dev_config_t::FAIL_SAFE_EN
uint8_t FAIL_SAFE_EN
Definition: canfd6.h:1559
canfd6_device_interrupts_t::SWERR
uint8_t SWERR
Definition: canfd6.h:1465
canfd6_device_interrupts_t::CANERR
uint8_t CANERR
Definition: canfd6.h:1468
canfd6_mcan_write_sid_filter
err_t canfd6_mcan_write_sid_filter(canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_sid_filter_t *filter)
CAN FD 6 write sid filter function.
canfd6_mcan_interrupts_t::TOO
uint8_t TOO
Definition: canfd6.h:1296
canfd6_device_interrupts_t::WKRQ
uint8_t WKRQ
Definition: canfd6.h:1469
canfd6_mcan_interrupts_t::ELO
uint8_t ELO
Definition: canfd6.h:1300
canfd6_mcan_tx_header_t::FDF
uint8_t FDF
Definition: canfd6.h:1391
canfd6_mcan_read_interrupts
void canfd6_mcan_read_interrupts(canfd6_t *ctx, canfd6_mcan_interrupts_t *ir)
CAN FD 6 read interrupts function.
CANFD6_DEVICE_MODE_SLEEP
@ CANFD6_DEVICE_MODE_SLEEP
Definition: canfd6.h:1012
canfd6_wdt_configure
err_t canfd6_wdt_configure(canfd6_t *ctx, canfd6_wdt_timer_enum_t wdt_timeout)
CAN FD 6 wdt configure function.
canfd6_mcan_interrupt_enable_t::TEFWE
uint8_t TEFWE
Definition: canfd6.h:1337
canfd6_mcan_interrupts_t::RF0W
uint8_t RF0W
Definition: canfd6.h:1279
CANFD6_PIN_STATE_HIGH
@ CANFD6_PIN_STATE_HIGH
Definition: canfd6.h:964
canfd6_mram_config_t::sid_num_elements
uint8_t sid_num_elements
Definition: canfd6.h:1224
CANFD6_DEV_CONFIG_WAKE_DISABLED
@ CANFD6_DEV_CONFIG_WAKE_DISABLED
Definition: canfd6.h:1159
canfd6_mcan_rx_header_t::ANMF
uint8_t ANMF
Definition: canfd6.h:1375
canfd6_device_interrupt_enable_t::UVSUPEN
uint8_t UVSUPEN
Definition: canfd6.h:1525
canfd6_dev_config_t::SWE_DIS
uint8_t SWE_DIS
Definition: canfd6.h:1551
canfd6_mcan_interrupt_enable_t::RF1NE
uint8_t RF1NE
Definition: canfd6.h:1328
canfd6_mcan_interrupt_enable_t::word
uint32_t word
Definition: canfd6.h:1321
canfd6_mcan_interrupts_t::ARA
uint8_t ARA
Definition: canfd6.h:1307
CANFD6_SID_SFEC_PRIORITYSTORERX0
@ CANFD6_SID_SFEC_PRIORITYSTORERX0
Definition: canfd6.h:1044
canfd6_dev_config_t::GPO2_CONFIG
canfd6_dev_config_gpo2_t GPO2_CONFIG
Definition: canfd6.h:1565
CANFD6_DEV_CONFIG_GPO2_MIRROR_INT
@ CANFD6_DEV_CONFIG_GPO2_MIRROR_INT
Definition: canfd6.h:1149
canfd6_wdt_reset
void canfd6_wdt_reset(canfd6_t *ctx)
CAN FD 6 wdt reset function.
canfd6_device_configure_ie
void canfd6_device_configure_ie(canfd6_t *ctx, canfd6_device_interrupt_enable_t *ie)
CAN FD 6 device configure ie function.
canfd6_mcan_interrupts_t::BO
uint8_t BO
Definition: canfd6.h:1303
canfd6_dev_config_t::WD_ACTION
canfd6_dev_config_wdt_action_t WD_ACTION
Definition: canfd6.h:1561
canfd6_t::wkr
digital_out_t wkr
Definition: canfd6.h:902
canfd6_device_interrupt_enable_t::CANBUSNORMEN
uint8_t CANBUSNORMEN
Definition: canfd6.h:1534
canfd6_mcan_configure_globalfilter
void canfd6_mcan_configure_globalfilter(canfd6_t *ctx, canfd6_mcan_global_filter_configuration_t *gfc)
CAN FD 6 configure global filter function.
CANFD6_DEV_CONFIG_WAKE_FALLING_EDGE
@ CANFD6_DEV_CONFIG_WAKE_FALLING_EDGE
Definition: canfd6.h:1161
CANFD6_DEVICE_TEST_MODE_PHY
@ CANFD6_DEVICE_TEST_MODE_PHY
Definition: canfd6.h:999
CANFD6_XID_EFEC_PRIORITYSTORERX0
@ CANFD6_XID_EFEC_PRIORITYSTORERX0
Definition: canfd6.h:1074
canfd6_device_interrupts_t::TSD
uint8_t TSD
Definition: canfd6.h:1482
canfd6_device_interrupts_t::RESERVED
uint8_t RESERVED
Definition: canfd6.h:1472
CANFD6_SID_SFT_CLASSIC
@ CANFD6_SID_SFT_CLASSIC
Definition: canfd6.h:1057
canfd6_mcan_interrupts_t::EW
uint8_t EW
Definition: canfd6.h:1302
canfd6_mcan_nominal_timing_raw_t::nominal_time_seg2
uint8_t nominal_time_seg2
Definition: canfd6.h:1213
canfd6_mcan_write_txbuffer
uint32_t canfd6_mcan_write_txbuffer(canfd6_t *ctx, uint8_t buf_index, canfd6_mcan_tx_header_t *header, uint8_t data_payload[])
CAN FD 6 write tx buffer function.
canfd6_mcan_interrupts_t::DRX
uint8_t DRX
Definition: canfd6.h:1297
CANFD6_XID_EFEC_PRIORITY
@ CANFD6_XID_EFEC_PRIORITY
Definition: canfd6.h:1073
canfd6_device_interrupt_enable_t::SMSEN
uint8_t SMSEN
Definition: canfd6.h:1526
canfd6_mcan_interrupt_enable_t::TEFFE
uint8_t TEFFE
Definition: canfd6.h:1338
canfd6_mcan_interrupts_t
CAN FD 6 Click MCAN interrupts.
Definition: canfd6.h:1272
canfd6_device_configure
void canfd6_device_configure(canfd6_t *ctx, canfd6_dev_config_t *dev_cfg)
CAN FD 6 device configure function.
canfd6_device_interrupt_enable_t::TSDEN
uint8_t TSDEN
Definition: canfd6.h:1522
CANFD6_ERROR
@ CANFD6_ERROR
Definition: canfd6.h:953
canfd6_mcan_interrupt_enable_t::TSWE
uint8_t TSWE
Definition: canfd6.h:1340
canfd6_dev_config_t::RESERVED1
uint8_t RESERVED1
Definition: canfd6.h:1554
canfd6_mcan_sid_filter_t::SFID2
uint16_t SFID2
Definition: canfd6.h:1409
canfd6_mcan_txrxesc_data_byte_value
uint8_t canfd6_mcan_txrxesc_data_byte_value(uint8_t input_esc_value)
CAN FD 6 txrxesc data byte value function.
canfd6_mram_clear
void canfd6_mram_clear(canfd6_t *ctx)
CAN FD 6 mram clear function.
canfd6_device_interrupt_enable_t::CANTOEN
uint8_t CANTOEN
Definition: canfd6.h:1513
canfd6_wdt_enable
void canfd6_wdt_enable(canfd6_t *ctx)
CAN FD 6 wdt enable function.
CANFD6_DEV_CONFIG_WAKE_BOTH_EDGES
@ CANFD6_DEV_CONFIG_WAKE_BOTH_EDGES
Definition: canfd6.h:1162
canfd6_device_interrupts_t::CANLGND
uint8_t CANLGND
Definition: canfd6.h:1490
canfd6_mcan_nominal_timing_simple_t
CAN FD 6 Click nominal timing simple structure.
Definition: canfd6.h:1198
canfd6_device_read_interrupts
void canfd6_device_read_interrupts(canfd6_t *ctx, canfd6_device_interrupts_t *ir)
CAN FD 6 device read interrupts function.
canfd6_mcan_cccr_config_t::PXHD
uint8_t PXHD
Definition: canfd6.h:1259
CANFD6_DEV_CONFIG_GPO2_NO_ACTION
@ CANFD6_DEV_CONFIG_GPO2_NO_ACTION
Definition: canfd6.h:1146
canfd6_t::spi
spi_master_t spi
Definition: canfd6.h:912
canfd6_device_interrupt_enable_t::CANDOMEN
uint8_t CANDOMEN
Definition: canfd6.h:1511
canfd6_device_interrupts_t::CBF
uint8_t CBF
Definition: canfd6.h:1467
canfd6_mcan_xid_filter_t::EFID1
uint32_t EFID1
Definition: canfd6.h:1427
canfd6_mcan_data_timing_simple_t::data_tqafter_samplepoint
uint8_t data_tqafter_samplepoint
Definition: canfd6.h:1174
canfd6_mcan_nominal_timing_simple_t::nominal_tqafter_samplepoint
uint8_t nominal_tqafter_samplepoint
Definition: canfd6.h:1201
canfd6_device_interrupt_enable_t
CAN FD 6 Click device interrupt enable bit field struct.
Definition: canfd6.h:1504
canfd6_mcan_rx_header_t::ESI
uint8_t ESI
Definition: canfd6.h:1368
canfd6_mcan_interrupts_t::BEU
uint8_t BEU
Definition: canfd6.h:1299
canfd6_mcan_write_xid_filter
err_t canfd6_mcan_write_xid_filter(canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_xid_filter_t *filter)
CAN FD 6 write xid filter function.
canfd6_t::int_pin
digital_in_t int_pin
Definition: canfd6.h:908
canfd6_device_interrupts_t::CANBUSNORM
uint8_t CANBUSNORM
Definition: canfd6.h:1494
canfd6_mcan_nominal_timing_simple_t::nominal_tqbefore_samplepoint
uint16_t nominal_tqbefore_samplepoint
Definition: canfd6.h:1200
canfd6_mcan_transmit_buffer_contents
err_t canfd6_mcan_transmit_buffer_contents(canfd6_t *ctx, uint8_t buf_index)
CAN FD 6 transmit buffer contents function.
canfd6_device_interrupts_t::SPIERR
uint8_t SPIERR
Definition: canfd6.h:1466
canfd6_mcan_interrupt_enable_t::WDIE
uint8_t WDIE
Definition: canfd6.h:1350
canfd6_dev_config_t::RESERVED3
uint8_t RESERVED3
Definition: canfd6.h:1564
canfd6_mcan_interrupts_t::PEA
uint8_t PEA
Definition: canfd6.h:1305
canfd6_mcan_interrupts_t::RF1L
uint8_t RF1L
Definition: canfd6.h:1285
canfd6_device_read_config
void canfd6_device_read_config(canfd6_t *ctx, canfd6_dev_config_t *dev_cfg)
CAN FD 6 device read config function.
canfd6_cfg_t::rst
pin_name_t rst
Definition: canfd6.h:934
canfd6_rst_pin_state
void canfd6_rst_pin_state(canfd6_t *ctx, canfd6_pin_state_t state)
CAN FD 6 rst pin state function.
canfd6_mcan_sid_filter_t::word
uint32_t word
Definition: canfd6.h:1406
canfd6_mcan_rx_header_t::FIDX
uint8_t FIDX
Definition: canfd6.h:1374
canfd6_dev_config_t::WD_EN
uint8_t WD_EN
Definition: canfd6.h:1553
canfd6_mcan_tx_header_t
CAN FD 6 Click CAN message header for transmitted messages.
Definition: canfd6.h:1384
canfd6_device_interrupts_t::WKERR
uint8_t WKERR
Definition: canfd6.h:1476
canfd6_mcan_configure_datatiming_simple
void canfd6_mcan_configure_datatiming_simple(canfd6_t *ctx, canfd6_mcan_data_timing_simple_t *data_timing)
CAN FD 6 configure data timing simple function.
canfd6_mcan_interrupts_t::RF0N
uint8_t RF0N
Definition: canfd6.h:1278
CANFD6_GFC_ACCEPT_INTO_RXFIFO0
@ CANFD6_GFC_ACCEPT_INTO_RXFIFO0
Definition: canfd6.h:1099
canfd6_mcan_global_filter_configuration_t::reserved
uint32_t reserved
Definition: canfd6.h:1447
canfd6_mcan_interrupt_enable_t::TEFNE
uint8_t TEFNE
Definition: canfd6.h:1336
canfd6_init
err_t canfd6_init(canfd6_t *ctx, canfd6_cfg_t *cfg)
CAN FD 6 initialization function.
canfd6_dev_config_gpo1_t
canfd6_dev_config_gpo1_t
CAN FD 6 GPO1 config enum.
Definition: canfd6.h:1110
canfd6_mcan_interrupt_enable_t::RF1FE
uint8_t RF1FE
Definition: canfd6.h:1330
canfd6_mcan_rx_header_t::RXTS
uint16_t RXTS
Definition: canfd6.h:1369
CANFD6_DEV_CONFIG_WDT_ACTION_PULSE_INH
@ CANFD6_DEV_CONFIG_WDT_ACTION_PULSE_INH
Definition: canfd6.h:1135
canfd6_cfg_t::int_pin
pin_name_t int_pin
Definition: canfd6.h:936
CANFD6_WDT_6S
@ CANFD6_WDT_6S
Definition: canfd6.h:988
canfd6_device_interrupts_t::UVIO
uint8_t UVIO
Definition: canfd6.h:1484
canfd6_device_interrupts_t::M_CAN_INT
uint8_t M_CAN_INT
Definition: canfd6.h:1464
canfd6_mcan_read_nextfifo
uint8_t canfd6_mcan_read_nextfifo(canfd6_t *ctx, canfd6_mcan_fifo_enum_t fifo_def, canfd6_mcan_rx_header_t *header, uint8_t data_payload[])
CAN FD 6 read next fifo function.
canfd6_mcan_interrupt_enable_t::HPME
uint8_t HPME
Definition: canfd6.h:1332
CANFD6_XID_EFEC_DISABLED
@ CANFD6_XID_EFEC_DISABLED
Definition: canfd6.h:1069
CANFD6_SID_SFEC_STORERXBUFORDEBUG
@ CANFD6_SID_SFEC_STORERXBUFORDEBUG
Definition: canfd6.h:1046
canfd6_mcan_interrupt_enable_t::TEFLE
uint8_t TEFLE
Definition: canfd6.h:1339
canfd6_mcan_interrupt_enable_t::EWE
uint8_t EWE
Definition: canfd6.h:1348
canfd6_mcan_interrupts_t::RF1W
uint8_t RF1W
Definition: canfd6.h:1283
canfd6_mcan_tx_header_t::MM
uint8_t MM
Definition: canfd6.h:1394
CANFD6_DEVICE_MODE_NORMAL
@ CANFD6_DEVICE_MODE_NORMAL
Definition: canfd6.h:1010
canfd6_device_interrupts_t::RESERVED3
uint8_t RESERVED3
Definition: canfd6.h:1480
CANFD6_DEV_CONFIG_WAKE_RISING_EDGE
@ CANFD6_DEV_CONFIG_WAKE_RISING_EDGE
Definition: canfd6.h:1160
CANFD6_DEV_CONFIG_GPO2_WATCHDOG
@ CANFD6_DEV_CONFIG_GPO2_WATCHDOG
Definition: canfd6.h:1148
canfd6_mcan_global_filter_configuration_t
CAN FD 6 Click Global Filter Configuration Register struct.
Definition: canfd6.h:1437
canfd6_mcan_interrupt_enable_t::DRXE
uint8_t DRXE
Definition: canfd6.h:1343
canfd6_mcan_global_filter_configuration_t::RRFE
uint8_t RRFE
Definition: canfd6.h:1443
canfd6_mcan_global_filter_configuration_t::RRFS
uint8_t RRFS
Definition: canfd6.h:1444
canfd6_mcan_read_datatimingfd_raw
void canfd6_mcan_read_datatimingfd_raw(canfd6_t *ctx, canfd6_mcan_data_timing_raw_t *data_timing)
CAN FD 6 read data timing fd raw function.
canfd6_device_interrupt_enable_t::CANHBATEN
uint8_t CANHBATEN
Definition: canfd6.h:1531
CANFD6_SID_SFEC_STORERX0
@ CANFD6_SID_SFEC_STORERX0
Definition: canfd6.h:1040
canfd6_mcan_read_datatimingfd_simple
void canfd6_mcan_read_datatimingfd_simple(canfd6_t *ctx, canfd6_mcan_data_timing_simple_t *data_timing)
CAN FD 6 read data timing fd simple function.
canfd6_wdt_timer_enum_t
canfd6_wdt_timer_enum_t
CAN FD 6 Click WDT timer enum.
Definition: canfd6.h:984
canfd6_mcan_tx_header_t::ESI
uint8_t ESI
Definition: canfd6.h:1388
canfd6_mcan_cccr_config_t::NISO
uint8_t NISO
Definition: canfd6.h:1262
canfd6_device_interrupts_t::LWU
uint8_t LWU
Definition: canfd6.h:1477
canfd6_device_interrupts_t::FRAME_OVF
uint8_t FRAME_OVF
Definition: canfd6.h:1475
canfd6_mcan_data_timing_raw_t::data_time_seg1_and_prop
uint8_t data_time_seg1_and_prop
Definition: canfd6.h:1185
canfd6_mcan_interrupts_t::EP
uint8_t EP
Definition: canfd6.h:1301
canfd6_mcan_cccr_config_t::MON
uint8_t MON
Definition: canfd6.h:1253
canfd6_mcan_rx_header_t::RTR
uint8_t RTR
Definition: canfd6.h:1366
canfd6_mcan_sid_filter_t::SFID1
uint16_t SFID1
Definition: canfd6.h:1411
canfd6_cfg_t
CAN FD 6 Click configuration object.
Definition: canfd6.h:923
CANFD6_MRAM_8_Byte_Data
@ CANFD6_MRAM_8_Byte_Data
Definition: canfd6.h:1022
canfd6_mcan_tx_header_t::DLC
uint8_t DLC
Definition: canfd6.h:1389
CANFD6_GFC_ACCEPT_INTO_RXFIFO1
@ CANFD6_GFC_ACCEPT_INTO_RXFIFO1
Definition: canfd6.h:1100
canfd6_mcan_cccr_config_t::TXP
uint8_t TXP
Definition: canfd6.h:1261
CANFD6_MRAM_32_Byte_Data
@ CANFD6_MRAM_32_Byte_Data
Definition: canfd6.h:1027
canfd6_gfc_no_match_behavior_t
canfd6_gfc_no_match_behavior_t
CAN FD 6 GFC enum.
Definition: canfd6.h:1098
canfd6_dev_config_wake_t
canfd6_dev_config_wake_t
CAN FD 6 wake config enum.
Definition: canfd6.h:1158
CANFD6_WDT_3S
@ CANFD6_WDT_3S
Definition: canfd6.h:987
CANFD6_XID_EFT_CLASSIC
@ CANFD6_XID_EFT_CLASSIC
Definition: canfd6.h:1087
canfd6_mcan_cccr_config_t::FDOE
uint8_t FDOE
Definition: canfd6.h:1256
CANFD6_WDT_600MS
@ CANFD6_WDT_600MS
Definition: canfd6.h:986
canfd6_mram_config_t
CAN FD 6 Click MRAM config.
Definition: canfd6.h:1223
canfd6_sid_sft_values_t
canfd6_sid_sft_values_t
CAN FD 6 SID SFT enum.
Definition: canfd6.h:1055
canfd6_mcan_interrupts_t::TEFW
uint8_t TEFW
Definition: canfd6.h:1291
canfd6_dev_config_t::nWKRQ_CONFIG
uint8_t nWKRQ_CONFIG
Definition: canfd6.h:1555
canfd6_mcan_read_nominaltiming_simple
void canfd6_mcan_read_nominaltiming_simple(canfd6_t *ctx, canfd6_mcan_nominal_timing_simple_t *nom_timing)
CAN FD 6 read nominal timing simple function.
canfd6_device_interrupts_t::PWRON
uint8_t PWRON
Definition: canfd6.h:1483
canfd6_device_interrupt_enable_t::word
uint32_t word
Definition: canfd6.h:1507
canfd6_mcan_fifo_enum_t
canfd6_mcan_fifo_enum_t
CAN FD 6 Click RX FIFO enum.
Definition: canfd6.h:973
canfd6_t::chip_select
pin_name_t chip_select
Definition: canfd6.h:914
canfd6_mcan_configure_datatiming_raw
void canfd6_mcan_configure_datatiming_raw(canfd6_t *ctx, canfd6_mcan_data_timing_raw_t *data_timing)
CAN FD 6 configure data timing raw function.
canfd6_mcan_data_timing_raw_t::data_bitrate_prescaler
uint8_t data_bitrate_prescaler
Definition: canfd6.h:1184
canfd6_mcan_read_rxbuffer
uint8_t canfd6_mcan_read_rxbuffer(canfd6_t *ctx, uint8_t buf_index, canfd6_mcan_rx_header_t *header, uint8_t data_payload[])
CAN FD 6 read rx buffer function.
canfd6_mcan_configure_nominaltiming_simple
void canfd6_mcan_configure_nominaltiming_simple(canfd6_t *ctx, canfd6_mcan_nominal_timing_simple_t *nom_timing)
CAN FD 6 configure nominal timing simple function.
canfd6_mcan_interrupts_t::RF1N
uint8_t RF1N
Definition: canfd6.h:1282
canfd6_mcan_cccr_config_t::CSR
uint8_t CSR
Definition: canfd6.h:1252
canfd6_mcan_interrupt_enable_t::RF0NE
uint8_t RF0NE
Definition: canfd6.h:1324
canfd6_mcan_interrupt_enable_t::ELOE
uint8_t ELOE
Definition: canfd6.h:1346
canfd6_device_interrupt_enable_t::CANBUSOPENEN
uint8_t CANBUSOPENEN
Definition: canfd6.h:1529
canfd6_mcan_xid_filter_t::EFEC
canfd6_xid_efec_values_t EFEC
Definition: canfd6.h:1428
canfd6_mcan_nominal_timing_raw_t::nominal_sync_jumpwidth
uint8_t nominal_sync_jumpwidth
Definition: canfd6.h:1214
canfd6_device_interrupt_enable_t::LWUEN
uint8_t LWUEN
Definition: canfd6.h:1517
canfd6_mcan_global_filter_configuration_t::ANFE
canfd6_gfc_no_match_behavior_t ANFE
Definition: canfd6.h:1445
canfd6_mcan_rx_header_t::ID
uint32_t ID
Definition: canfd6.h:1365
CANFD6_DEV_CONFIG_GPIO1_CONFIG_WDT_INPUT
@ CANFD6_DEV_CONFIG_GPIO1_CONFIG_WDT_INPUT
Definition: canfd6.h:1124
CANFD6_SID_SFEC_PRIORITYSTORERX1
@ CANFD6_SID_SFEC_PRIORITYSTORERX1
Definition: canfd6.h:1045
canfd6_mcan_rx_header_t::FDF
uint8_t FDF
Definition: canfd6.h:1372
canfd6_wdt_read
canfd6_wdt_timer_enum_t canfd6_wdt_read(canfd6_t *ctx)
CAN FD 6 wdt read function.
canfd6_sid_sfec_values_t
canfd6_sid_sfec_values_t
CAN FD 6 SID SFEC enum.
Definition: canfd6.h:1038
canfd6_device_interrupt_enable_t::UVIOEN
uint8_t UVIOEN
Definition: canfd6.h:1524
canfd6_device_interrupts_t::CANBUSOPEN
uint8_t CANBUSOPEN
Definition: canfd6.h:1489
CANFD6_MRAM_24_Byte_Data
@ CANFD6_MRAM_24_Byte_Data
Definition: canfd6.h:1026
canfd6_mcan_read_interrupt_enable
void canfd6_mcan_read_interrupt_enable(canfd6_t *ctx, canfd6_mcan_interrupt_enable_t *ie)
CAN FD 6 read interrupt enable function.
CANFD6_SID_SFEC_STORERX1
@ CANFD6_SID_SFEC_STORERX1
Definition: canfd6.h:1041
canfd6_cfg_t::mosi
pin_name_t mosi
Definition: canfd6.h:927
canfd6_device_read_mode
canfd6_device_mode_enum_t canfd6_device_read_mode(canfd6_t *ctx)
CAN FD 6 device read mode function.
canfd6_mcan_interrupt_enable_t::RF0FE
uint8_t RF0FE
Definition: canfd6.h:1326
canfd6_mcan_cccr_config_t
CAN FD 6 Click CCCR config.
Definition: canfd6.h:1243
canfd6_mcan_data_timing_simple_t::data_bitrate_prescaler
uint8_t data_bitrate_prescaler
Definition: canfd6.h:1172
canfd6_mcan_data_timing_raw_t::data_sync_jumpwidth
uint8_t data_sync_jumpwidth
Definition: canfd6.h:1187
canfd6_mcan_interrupt_enable_t::ARAE
uint8_t ARAE
Definition: canfd6.h:1353
CANFD6_DEV_CONFIG_GPO1_SPI_FAULT_INT
@ CANFD6_DEV_CONFIG_GPO1_SPI_FAULT_INT
Definition: canfd6.h:1111
canfd6_device_interrupts_t::VTWD
uint8_t VTWD
Definition: canfd6.h:1463
canfd6_mcan_read_sid_filter
err_t canfd6_mcan_read_sid_filter(canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_sid_filter_t *filter)
CAN FD 6 read sid filter function.
canfd6_mcan_read_xid_filter
err_t canfd6_mcan_read_xid_filter(canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_xid_filter_t *filter)
CAN FD 6 read xid filter function.
canfd6_device_interrupts_t::CANHBAT
uint8_t CANHBAT
Definition: canfd6.h:1491
canfd6_mcan_sid_filter_t::SFEC
canfd6_sid_sfec_values_t SFEC
Definition: canfd6.h:1412
canfd6_get_int_pin
uint8_t canfd6_get_int_pin(canfd6_t *ctx)
CAN FD 6 get int pin function.
canfd6_mcan_data_timing_raw_t
CAN FD 6 Click data timing raw structure.
Definition: canfd6.h:1183
canfd6_device_interrupts_t::GLOBALERR
uint8_t GLOBALERR
Definition: canfd6.h:1470
canfd6_mcan_global_filter_configuration_t::ANFS
canfd6_gfc_no_match_behavior_t ANFS
Definition: canfd6.h:1446
canfd6_mcan_interrupts_t::RF0L
uint8_t RF0L
Definition: canfd6.h:1281
canfd6_mcan_interrupt_enable_t::PEAE
uint8_t PEAE
Definition: canfd6.h:1351
canfd6_configure_cccr_register
void canfd6_configure_cccr_register(canfd6_t *ctx, canfd6_mcan_cccr_config_t *cccr_config)
CAN FD 6 configure cccr register function.
CANFD6_DEVICE_TEST_MODE_CONTROLLER
@ CANFD6_DEVICE_TEST_MODE_CONTROLLER
Definition: canfd6.h:1000
canfd6_mcan_rx_header_t::BRS
uint8_t BRS
Definition: canfd6.h:1371
canfd6_mram_config_t::xid_num_elements
uint8_t xid_num_elements
Definition: canfd6.h:1225
canfd6_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: canfd6.h:941
CANFD6_RXFIFO1
@ CANFD6_RXFIFO1
Definition: canfd6.h:975
canfd6_mcan_cccr_config_t::ASM
uint8_t ASM
Definition: canfd6.h:1250
canfd6_mcan_tx_header_t::RTR
uint8_t RTR
Definition: canfd6.h:1386
CANFD6_DEV_CONFIG_GPIO1_CONFIG_GPO
@ CANFD6_DEV_CONFIG_GPIO1_CONFIG_GPO
Definition: canfd6.h:1123
canfd6_mcan_interrupt_enable_t::BOE
uint8_t BOE
Definition: canfd6.h:1349
canfd6_device_clear_interrupts
void canfd6_device_clear_interrupts(canfd6_t *ctx, canfd6_device_interrupts_t *ir)
CAN FD 6 device clear interrupts function.
canfd6_dev_config_gpio1_t
canfd6_dev_config_gpio1_t
CAN FD 6 GPIO1 config enum.
Definition: canfd6.h:1122
canfd6_mcan_cccr_config_t::TEST
uint8_t TEST
Definition: canfd6.h:1255
canfd6_mcan_dlc_to_bytes
uint8_t canfd6_mcan_dlc_to_bytes(uint8_t input_dlc)
CAN FD 6 dlc to bytes function.
canfd6_mcan_nominal_timing_raw_t::nominal_time_seg1_and_prop
uint8_t nominal_time_seg1_and_prop
Definition: canfd6.h:1212
canfd6_mcan_interrupts_t::TEFN
uint8_t TEFN
Definition: canfd6.h:1290
canfd6_return_value_t
canfd6_return_value_t
CAN FD 6 Click return value data.
Definition: canfd6.h:951
canfd6_wkr_pin_state
void canfd6_wkr_pin_state(canfd6_t *ctx, canfd6_pin_state_t state)
CAN FD 6 wkr pin state function.
canfd6_t
CAN FD 6 Click context object.
Definition: canfd6.h:899
CANFD6_XID_EFEC_STORERXBUFORDEBUG
@ CANFD6_XID_EFEC_STORERXBUFORDEBUG
Definition: canfd6.h:1076
canfd6_cfg_t::spi_speed
uint32_t spi_speed
Definition: canfd6.h:940
CANFD6_SID_SFT_RANGE
@ CANFD6_SID_SFT_RANGE
Definition: canfd6.h:1059
CANFD6_MRAM_48_Byte_Data
@ CANFD6_MRAM_48_Byte_Data
Definition: canfd6.h:1028
canfd6_mcan_interrupt_enable_t::TCFE
uint8_t TCFE
Definition: canfd6.h:1334
canfd6_device_interrupt_enable_t::CANHCANLEN
uint8_t CANHCANLEN
Definition: canfd6.h:1532
canfd6_device_test_mode_enum_t
canfd6_device_test_mode_enum_t
CAN FD 6 Click device test enum.
Definition: canfd6.h:997
canfd6_mram_config_t::rx0_element_size
canfd6_mram_elem_data_size_t rx0_element_size
Definition: canfd6.h:1227
CANFD6_SID_SFEC_DISABLED
@ CANFD6_SID_SFEC_DISABLED
Definition: canfd6.h:1039
canfd6_device_read_interrupt_enable
void canfd6_device_read_interrupt_enable(canfd6_t *ctx, canfd6_device_interrupt_enable_t *ie)
CAN FD 6 device read interrupt enable function.
canfd6_device_interrupt_enable_t::RESERVED1
uint8_t RESERVED1
Definition: canfd6.h:1510
canfd6_xid_eft_values_t
canfd6_xid_eft_values_t
CAN FD 6 XID EFT enum.
Definition: canfd6.h:1085
canfd6_dev_config_t::GPIO1_GPO_CONFIG
canfd6_dev_config_gpo1_t GPIO1_GPO_CONFIG
Definition: canfd6.h:1557
canfd6_read_cccr_register
void canfd6_read_cccr_register(canfd6_t *ctx, canfd6_mcan_cccr_config_t *cccr_config)
CAN FD 6 read cccr register function.
canfd6_mcan_cccr_config_t::BRSE
uint8_t BRSE
Definition: canfd6.h:1257
canfd6_mcan_rx_header_t
CAN FD 6 Click CAN message header.
Definition: canfd6.h:1364
canfd6_device_interrupt_enable_t::WKERREN
uint8_t WKERREN
Definition: canfd6.h:1516
canfd6_dev_config_wdt_action_t
canfd6_dev_config_wdt_action_t
CAN FD 6 WDT action enum.
Definition: canfd6.h:1133
canfd6_mcan_interrupts_t::HPM
uint8_t HPM
Definition: canfd6.h:1286
canfd6_device_interrupt_enable_t::FRAME_OVFEN
uint8_t FRAME_OVFEN
Definition: canfd6.h:1515
canfd6_device_interrupt_enable_t::CANBUSBATEN
uint8_t CANBUSBATEN
Definition: canfd6.h:1527
canfd6_dev_config_t::RESERVED4
uint8_t RESERVED4
Definition: canfd6.h:1566
canfd6_mcan_interrupt_enable_t::EPE
uint8_t EPE
Definition: canfd6.h:1347
canfd6_mcan_interrupt_enable_t::TFEE
uint8_t TFEE
Definition: canfd6.h:1335
canfd6_mcan_interrupts_t::word
uint32_t word
Definition: canfd6.h:1275
canfd6_device_read_version
uint16_t canfd6_device_read_version(canfd6_t *ctx)
CAN FD 6 device read version function.
canfd6_mcan_cccr_config_t::DAR
uint8_t DAR
Definition: canfd6.h:1254
canfd6_device_interrupts_t::CANBUSBAT
uint8_t CANBUSBAT
Definition: canfd6.h:1487
canfd6_device_interrupts_t::RESERVED2
uint8_t RESERVED2
Definition: canfd6.h:1474
canfd6_mcan_interrupts_t::TEFL
uint8_t TEFL
Definition: canfd6.h:1293
canfd6_device_interrupt_enable_t::ECCERREN
uint8_t ECCERREN
Definition: canfd6.h:1519
CANFD6_RXFIFO0
@ CANFD6_RXFIFO0
Definition: canfd6.h:974
canfd6_mcan_interrupts_t::TEFF
uint8_t TEFF
Definition: canfd6.h:1292
CANFD6_OK
@ CANFD6_OK
Definition: canfd6.h:952
canfd6_t::rst
digital_out_t rst
Definition: canfd6.h:903
canfd6_mcan_cccr_config_t::reserved3
uint8_t reserved3
Definition: canfd6.h:1258
canfd6_mcan_data_timing_simple_t
CAN FD 6 Click data timing simple structure.
Definition: canfd6.h:1171
CANFD6_SID_SFT_DISABLED
@ CANFD6_SID_SFT_DISABLED
Definition: canfd6.h:1056
canfd6_mram_config_t::tx_buffer_num_elements
uint8_t tx_buffer_num_elements
Definition: canfd6.h:1233
canfd6_mcan_configure_nominaltiming_raw
void canfd6_mcan_configure_nominaltiming_raw(canfd6_t *ctx, canfd6_mcan_nominal_timing_raw_t *nom_timing)
CAN FD 6 configure nominal timing raw function.
canfd6_mcan_interrupt_enable_t::BECE
uint8_t BECE
Definition: canfd6.h:1344
canfd6_device_interrupt_enable_t::CANBUSGNDEN
uint8_t CANBUSGNDEN
Definition: canfd6.h:1528
canfd6_dev_config_t::CLK_REF
uint8_t CLK_REF
Definition: canfd6.h:1567
CANFD6_MRAM_12_Byte_Data
@ CANFD6_MRAM_12_Byte_Data
Definition: canfd6.h:1023
canfd6_mcan_cccr_config_t::reserved
uint8_t reserved
Definition: canfd6.h:1249
CANFD6_SID_SFT_DUALID
@ CANFD6_SID_SFT_DUALID
Definition: canfd6.h:1058
canfd6_mcan_rx_header_t::reserved
uint8_t reserved
Definition: canfd6.h:1373
canfd6_wkp_pin_state
void canfd6_wkp_pin_state(canfd6_t *ctx, canfd6_pin_state_t state)
CAN FD 6 wkp pin state function.
canfd6_device_read_testmode
canfd6_device_test_mode_enum_t canfd6_device_read_testmode(canfd6_t *ctx)
CAN FD 6 device read testmode function.
canfd6_mcan_interrupts_t::MRAF
uint8_t MRAF
Definition: canfd6.h:1295
CANFD6_MRAM_16_Byte_Data
@ CANFD6_MRAM_16_Byte_Data
Definition: canfd6.h:1024
canfd6_dev_config_t::RESERVED0
uint8_t RESERVED0
Definition: canfd6.h:1550
CANFD6_DEV_CONFIG_WDT_ACTION_PULSE_WDT_OUT
@ CANFD6_DEV_CONFIG_WDT_ACTION_PULSE_WDT_OUT
Definition: canfd6.h:1136
canfd6_mram_config_t::rx0_num_elements
uint8_t rx0_num_elements
Definition: canfd6.h:1226
canfd6_mcan_sid_filter_t::reserved
uint8_t reserved
Definition: canfd6.h:1410
canfd6_default_cfg
void canfd6_default_cfg(canfd6_t *ctx)
CAN FD 6 default configuration function.
canfd6_mcan_tx_header_t::BRS
uint8_t BRS
Definition: canfd6.h:1390
canfd6_device_interrupt_enable_t::PWRONEN
uint8_t PWRONEN
Definition: canfd6.h:1523
CANFD6_DEVICE_TEST_MODE_NORMAL
@ CANFD6_DEVICE_TEST_MODE_NORMAL
Definition: canfd6.h:998
canfd6_device_interrupts_t::ECCERR
uint8_t ECCERR
Definition: canfd6.h:1479
CANFD6_DEVICE_MODE_STANDBY
@ CANFD6_DEVICE_MODE_STANDBY
Definition: canfd6.h:1011
canfd6_device_interrupt_enable_t::CANLGNDEN
uint8_t CANLGNDEN
Definition: canfd6.h:1530
canfd6_mcan_interrupts_t::reserved
uint8_t reserved
Definition: canfd6.h:1308
canfd6_dev_config_t::word
uint32_t word
Definition: canfd6.h:1547
canfd6_device_interrupts_t::SMS
uint8_t SMS
Definition: canfd6.h:1486
canfd6_device_interrupts_t::UVSUP
uint8_t UVSUP
Definition: canfd6.h:1485
CANFD6_XID_EFT_RANGENOMASK
@ CANFD6_XID_EFT_RANGENOMASK
Definition: canfd6.h:1086
canfd6_device_interrupts_t::CANBUSTERMOPEN
uint8_t CANBUSTERMOPEN
Definition: canfd6.h:1493
CANFD6_DEV_CONFIG_GPO2_MCAN_INT0
@ CANFD6_DEV_CONFIG_GPO2_MCAN_INT0
Definition: canfd6.h:1147
canfd6_mcan_interrupts_t::PED
uint8_t PED
Definition: canfd6.h:1306
canfd6_cfg_t::miso
pin_name_t miso
Definition: canfd6.h:926
canfd6_mram_config_t::rx_buf_element_size
canfd6_mram_elem_data_size_t rx_buf_element_size
Definition: canfd6.h:1231
canfd6_enable_protected_registers
err_t canfd6_enable_protected_registers(canfd6_t *ctx)
CAN FD 6 enable protected registers function.
canfd6_wdt_disable
void canfd6_wdt_disable(canfd6_t *ctx)
CAN FD 6 wdt disable function.
canfd6_mcan_xid_filter_t::EFID2
uint32_t EFID2
Definition: canfd6.h:1424
canfd6_mcan_interrupt_enable_t::TCE
uint8_t TCE
Definition: canfd6.h:1333
canfd6_device_interrupt_enable_t::CANINTEN
uint8_t CANINTEN
Definition: canfd6.h:1518
canfd6_mcan_data_timing_raw_t::data_time_seg2
uint8_t data_time_seg2
Definition: canfd6.h:1186
CANFD6_XID_EFEC_STORERX1
@ CANFD6_XID_EFEC_STORERX1
Definition: canfd6.h:1071
canfd6_mcan_sid_filter_t
CAN FD 6 Click standard ID filter struct.
Definition: canfd6.h:1403
canfd6_mcan_data_timing_raw_t::tdc_filter
uint8_t tdc_filter
Definition: canfd6.h:1189
canfd6_device_interrupt_enable_t::RESERVED4
uint8_t RESERVED4
Definition: canfd6.h:1520
canfd6_device_interrupts_t::CANDOM
uint8_t CANDOM
Definition: canfd6.h:1471
canfd6_pin_state_t
canfd6_pin_state_t
CAN FD 6 Click pin states.
Definition: canfd6.h:962
canfd6_mcan_interrupt_enable_t::TOOE
uint8_t TOOE
Definition: canfd6.h:1342
canfd6_mram_elem_data_size_t
canfd6_mram_elem_data_size_t
CAN FD 6 Click MRAM element data size.
Definition: canfd6.h:1021
canfd6_device_set_mode
err_t canfd6_device_set_mode(canfd6_t *ctx, canfd6_device_mode_enum_t mode_define)
CAN FD 6 device set mode function.
canfd6_mcan_sid_filter_t::SFT
canfd6_sid_sfec_values_t SFT
Definition: canfd6.h:1413
canfd6_mcan_tx_header_t::XTD
uint8_t XTD
Definition: canfd6.h:1387
canfd6_dev_config_t::RESERVED2
uint8_t RESERVED2
Definition: canfd6.h:1558
CANFD6_XID_EFT_RANGE
@ CANFD6_XID_EFT_RANGE
Definition: canfd6.h:1089
canfd6_mcan_interrupt_enable_t::RF1WE
uint8_t RF1WE
Definition: canfd6.h:1329
canfd6_device_interrupts_t::CANBUSGND
uint8_t CANBUSGND
Definition: canfd6.h:1488
canfd6_mcan_clear_interrupts_all
void canfd6_mcan_clear_interrupts_all(canfd6_t *ctx)
CAN FD 6 clear interrupts all function.
canfd6_mcan_interrupt_enable_t::reserved
uint8_t reserved
Definition: canfd6.h:1354
canfd6_mram_config_t::rx1_element_size
canfd6_mram_elem_data_size_t rx1_element_size
Definition: canfd6.h:1229
canfd6_dev_config_t::WAKE_CONFIG
canfd6_dev_config_wake_t WAKE_CONFIG
Definition: canfd6.h:1569
canfd6_dev_config_t::nWKRQ_VOLTAGE
uint8_t nWKRQ_VOLTAGE
Definition: canfd6.h:1563
CANFD6_SID_SFEC_PRIORITY
@ CANFD6_SID_SFEC_PRIORITY
Definition: canfd6.h:1043
canfd6_device_interrupt_enable_t::RESERVED3
uint8_t RESERVED3
Definition: canfd6.h:1514
canfd6_mcan_interrupt_enable_t::MRAFE
uint8_t MRAFE
Definition: canfd6.h:1341
canfd6_mcan_data_timing_simple_t::data_tqbefore_samplepoint
uint8_t data_tqbefore_samplepoint
Definition: canfd6.h:1173
canfd6_disable_protected_registers
err_t canfd6_disable_protected_registers(canfd6_t *ctx)
CAN FD 6 disable protected registers function.
canfd6_mcan_xid_filter_t
CAN FD 6 Click extended ID filter struct.
Definition: canfd6.h:1423
canfd6_dev_config_gpo2_t
canfd6_dev_config_gpo2_t
CAN FD 6 GPO2 config enum.
Definition: canfd6.h:1145
canfd6_mcan_clear_interrupts
void canfd6_mcan_clear_interrupts(canfd6_t *ctx, canfd6_mcan_interrupts_t *ir)
CAN FD 6 clear interrupts function.
CANFD6_WDT_60MS
@ CANFD6_WDT_60MS
Definition: canfd6.h:985
CANFD6_DEV_CONFIG_GPO1_UVO_OR_THERMAL_INT
@ CANFD6_DEV_CONFIG_GPO1_UVO_OR_THERMAL_INT
Definition: canfd6.h:1113
canfd6_mcan_interrupts_t::WDI
uint8_t WDI
Definition: canfd6.h:1304
canfd6_dev_config_t::WD_BIT_RESET
uint8_t WD_BIT_RESET
Definition: canfd6.h:1562
canfd6_device_interrupts_t::CANHCANL
uint8_t CANHCANL
Definition: canfd6.h:1492
canfd6_mcan_interrupt_enable_t::RF0LE
uint8_t RF0LE
Definition: canfd6.h:1327
canfd6_cfg_t::cs
pin_name_t cs
Definition: canfd6.h:929
canfd6_dev_config_t
CAN FD 6 Click device config struct.
Definition: canfd6.h:1544