canfd6  2.0.0.0
canfd6.h
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3 ** Contact: https://www.mikroe.com/contact
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5 ** Permission is hereby granted, free of charge, to any person obtaining a copy
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22 
28 #ifndef CANFD6_H
29 #define CANFD6_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
39 #ifdef PREINIT_SUPPORTED
40 #include "preinit.h"
41 #endif
42 
43 #ifdef MikroCCoreVersion
44  #if MikroCCoreVersion >= 1
45  #include "delays.h"
46  #endif
47 #endif
48 
49 #include "drv_digital_out.h"
50 #include "drv_digital_in.h"
51 #include "drv_spi_master.h"
52 
64 #define CANFD6_MCAN_CACHE_CONFIGURATION
65 
66 #ifdef CANFD6_MCAN_CACHE_CONFIGURATION
67 #define CANFD6_MCAN_CACHE_SIDFC 0
68 #define CANFD6_MCAN_CACHE_XIDFC 1
69 #define CANFD6_MCAN_CACHE_RXF0C 2
70 #define CANFD6_MCAN_CACHE_RXF1C 3
71 #define CANFD6_MCAN_CACHE_RXBC 4
72 #define CANFD6_MCAN_CACHE_TXEFC 5
73 #define CANFD6_MCAN_CACHE_TXBC 6
74 #define CANFD6_MCAN_CACHE_RXESC 7
75 #define CANFD6_MCAN_CACHE_TXESC 8
76 #endif
77 
82 #define CANFD6_MRAM_SIZE 2048
83 
94 #define CANFD6_REG_SPI_CONFIG 0x0000
95 #define CANFD6_REG_DEV_CONFIG 0x0800
96 #define CANFD6_REG_MCAN 0x1000
97 #define CANFD6_REG_MRAM 0x8000
98  // canfd6_reg1
100 
111 #define CANFD6_REG_SPI_DEVICE_ID0 0x0000
112 #define CANFD6_REG_SPI_DEVICE_ID1 0x0004
113 #define CANFD6_REG_SPI_REVISION 0x0008
114 #define CANFD6_REG_SPI_STATUS 0x000C
115 #define CANFD6_REG_SPI_ERROR_STATUS_MASK 0x0010
116  // canfd6_reg2
118 
129 #define CANFD6_REG_DEV_MODES_AND_PINS 0x0800
130 #define CANFD6_REG_DEV_TIMESTAMP_PRESCALER 0x0804
131 #define CANFD6_REG_DEV_TEST_REGISTERS 0x0808
132 #define CANFD6_REG_DEV_IR 0x0820
133 #define CANFD6_REG_DEV_IE 0x0830
134  // canfd6_reg3
136 
147 #define CANFD6_REG_MCAN_CREL 0x1000
148 #define CANFD6_REG_MCAN_ENDN 0x1004
149 #define CANFD6_REG_MCAN_CUST 0x1008
150 #define CANFD6_REG_MCAN_DBTP 0x100C
151 #define CANFD6_REG_MCAN_TEST 0x1010
152 #define CANFD6_REG_MCAN_RWD 0x1014
153 #define CANFD6_REG_MCAN_CCCR 0x1018
154 #define CANFD6_REG_MCAN_NBTP 0x101C
155 #define CANFD6_REG_MCAN_TSCC 0x1020
156 #define CANFD6_REG_MCAN_TSCV 0x1024
157 #define CANFD6_REG_MCAN_TOCC 0x1028
158 #define CANFD6_REG_MCAN_TOCV 0x102C
159 #define CANFD6_REG_MCAN_ECR 0x1040
160 #define CANFD6_REG_MCAN_PSR 0x1044
161 #define CANFD6_REG_MCAN_TDCR 0x1048
162 #define CANFD6_REG_MCAN_IR 0x1050
163 #define CANFD6_REG_MCAN_IE 0x1054
164 #define CANFD6_REG_MCAN_ILS 0x1058
165 #define CANFD6_REG_MCAN_ILE 0x105C
166 #define CANFD6_REG_MCAN_GFC 0x1080
167 #define CANFD6_REG_MCAN_SIDFC 0x1084
168 #define CANFD6_REG_MCAN_XIDFC 0x1088
169 #define CANFD6_REG_MCAN_XIDAM 0x1090
170 #define CANFD6_REG_MCAN_HPMS 0x1094
171 #define CANFD6_REG_MCAN_NDAT1 0x1098
172 #define CANFD6_REG_MCAN_NDAT2 0x109C
173 #define CANFD6_REG_MCAN_RXF0C 0x10A0
174 #define CANFD6_REG_MCAN_RXF0S 0x10A4
175 #define CANFD6_REG_MCAN_RXF0A 0x10A8
176 #define CANFD6_REG_MCAN_RXBC 0x10AC
177 #define CANFD6_REG_MCAN_RXF1C 0x10B0
178 #define CANFD6_REG_MCAN_RXF1S 0x10B4
179 #define CANFD6_REG_MCAN_RXF1A 0x10B8
180 #define CANFD6_REG_MCAN_RXESC 0x10BC
181 #define CANFD6_REG_MCAN_TXBC 0x10C0
182 #define CANFD6_REG_MCAN_TXFQS 0x10C4
183 #define CANFD6_REG_MCAN_TXESC 0x10C8
184 #define CANFD6_REG_MCAN_TXBRP 0x10CC
185 #define CANFD6_REG_MCAN_TXBAR 0x10D0
186 #define CANFD6_REG_MCAN_TXBCR 0x10D4
187 #define CANFD6_REG_MCAN_TXBTO 0x10D8
188 #define CANFD6_REG_MCAN_TXBCF 0x10DC
189 #define CANFD6_REG_MCAN_TXBTIE 0x10E0
190 #define CANFD6_REG_MCAN_TXBCIE 0x10E4
191 #define CANFD6_REG_MCAN_TXEFC 0x10F0
192 #define CANFD6_REG_MCAN_TXEFS 0x10F4
193 #define CANFD6_REG_MCAN_TXEFA 0x10F8
194  // canfd6_reg4
196 
207 #define CANFD6_MCAN_DLC_0B 0x00000000
208 #define CANFD6_MCAN_DLC_1B 0x00000001
209 #define CANFD6_MCAN_DLC_2B 0x00000002
210 #define CANFD6_MCAN_DLC_3B 0x00000003
211 #define CANFD6_MCAN_DLC_4B 0x00000004
212 #define CANFD6_MCAN_DLC_5B 0x00000005
213 #define CANFD6_MCAN_DLC_6B 0x00000006
214 #define CANFD6_MCAN_DLC_7B 0x00000007
215 #define CANFD6_MCAN_DLC_8B 0x00000008
216 #define CANFD6_MCAN_DLC_12B 0x00000009
217 #define CANFD6_MCAN_DLC_16B 0x0000000A
218 #define CANFD6_MCAN_DLC_20B 0x0000000B
219 #define CANFD6_MCAN_DLC_24B 0x0000000C
220 #define CANFD6_MCAN_DLC_32B 0x0000000D
221 #define CANFD6_MCAN_DLC_48B 0x0000000E
222 #define CANFD6_MCAN_DLC_64B 0x0000000F
223  // canfd6_reg5
225 
230 #define CANFD6_REG_BITS_MCAN_DBTP_TDC_EN 0x00800000
231 
242 #define CANFD6_REG_BITS_MCAN_TEST_RX_DOM 0x00000000
243 #define CANFD6_REG_BITS_MCAN_TEST_RX_REC 0x00000080
244 #define CANFD6_REG_BITS_MCAN_TEST_TX_SP 0x00000020
245 #define CANFD6_REG_BITS_MCAN_TEST_TX_DOM 0x00000040
246 #define CANFD6_REG_BITS_MCAN_TEST_TX_REC 0x00000060
247 #define CANFD6_REG_BITS_MCAN_TEST_LOOP_BACK 0x00000010
248  // canfd6_reg6
250 
261 #define CANFD6_REG_BITS_MCAN_CCCR_RESERVED_MASK 0xFFFF0C00
262 #define CANFD6_REG_BITS_MCAN_CCCR_NISO_ISO 0x00000000
263 #define CANFD6_REG_BITS_MCAN_CCCR_NISO_BOSCH 0x00008000
264 #define CANFD6_REG_BITS_MCAN_CCCR_TXP 0x00004000
265 #define CANFD6_REG_BITS_MCAN_CCCR_EFBI 0x00002000
266 #define CANFD6_REG_BITS_MCAN_CCCR_PXHD_DIS 0x00001000
267 #define CANFD6_REG_BITS_MCAN_CCCR_BRSE 0x00000200
268 #define CANFD6_REG_BITS_MCAN_CCCR_FDOE 0x00000100
269 #define CANFD6_REG_BITS_MCAN_CCCR_TEST 0x00000080
270 #define CANFD6_REG_BITS_MCAN_CCCR_DAR_DIS 0x00000040
271 #define CANFD6_REG_BITS_MCAN_CCCR_MON 0x00000020
272 #define CANFD6_REG_BITS_MCAN_CCCR_CSR 0x00000010
273 #define CANFD6_REG_BITS_MCAN_CCCR_CSA 0x00000008
274 #define CANFD6_REG_BITS_MCAN_CCCR_ASM 0x00000004
275 #define CANFD6_REG_BITS_MCAN_CCCR_CCE 0x00000002
276 #define CANFD6_REG_BITS_MCAN_CCCR_INIT 0x00000001
277  // canfd6_reg7
279 
290 #define CANFD6_REG_BITS_MCAN_IE_ARAE 0x20000000
291 #define CANFD6_REG_BITS_MCAN_IE_PEDE 0x10000000
292 #define CANFD6_REG_BITS_MCAN_IE_PEAE 0x08000000
293 #define CANFD6_REG_BITS_MCAN_IE_WDIE 0x04000000
294 #define CANFD6_REG_BITS_MCAN_IE_BOE 0x02000000
295 #define CANFD6_REG_BITS_MCAN_IE_EWE 0x01000000
296 #define CANFD6_REG_BITS_MCAN_IE_EPE 0x00800000
297 #define CANFD6_REG_BITS_MCAN_IE_ELOE 0x00400000
298 #define CANFD6_REG_BITS_MCAN_IE_BEUE 0x00200000
299 #define CANFD6_REG_BITS_MCAN_IE_BECE 0x00100000
300 #define CANFD6_REG_BITS_MCAN_IE_DRXE 0x00080000
301 #define CANFD6_REG_BITS_MCAN_IE_TOOE 0x00040000
302 #define CANFD6_REG_BITS_MCAN_IE_MRAFE 0x00020000
303 #define CANFD6_REG_BITS_MCAN_IE_TSWE 0x00010000
304 #define CANFD6_REG_BITS_MCAN_IE_TEFLE 0x00008000
305 #define CANFD6_REG_BITS_MCAN_IE_TEFFE 0x00004000
306 #define CANFD6_REG_BITS_MCAN_IE_TEFWE 0x00002000
307 #define CANFD6_REG_BITS_MCAN_IE_TEFNE 0x00001000
308 #define CANFD6_REG_BITS_MCAN_IE_TFEE 0x00000800
309 #define CANFD6_REG_BITS_MCAN_IE_TCFE 0x00000400
310 #define CANFD6_REG_BITS_MCAN_IE_TCE 0x00000200
311 #define CANFD6_REG_BITS_MCAN_IE_HPME 0x00000100
312 #define CANFD6_REG_BITS_MCAN_IE_RF1LE 0x00000080
313 #define CANFD6_REG_BITS_MCAN_IE_RF1FE 0x00000040
314 #define CANFD6_REG_BITS_MCAN_IE_RF1WE 0x00000020
315 #define CANFD6_REG_BITS_MCAN_IE_RF1NE 0x00000010
316 #define CANFD6_REG_BITS_MCAN_IE_RF0LE 0x00000008
317 #define CANFD6_REG_BITS_MCAN_IE_RF0FE 0x00000004
318 #define CANFD6_REG_BITS_MCAN_IE_RF0WE 0x00000002
319 #define CANFD6_REG_BITS_MCAN_IE_RF0NE 0x00000001
320  // canfd6_reg8
322 
333 #define CANFD6_REG_BITS_MCAN_IR_ARA 0x20000000
334 #define CANFD6_REG_BITS_MCAN_IR_PED 0x10000000
335 #define CANFD6_REG_BITS_MCAN_IR_PEA 0x08000000
336 #define CANFD6_REG_BITS_MCAN_IR_WDI 0x04000000
337 #define CANFD6_REG_BITS_MCAN_IR_BO 0x02000000
338 #define CANFD6_REG_BITS_MCAN_IR_EW 0x01000000
339 #define CANFD6_REG_BITS_MCAN_IR_EP 0x00800000
340 #define CANFD6_REG_BITS_MCAN_IR_ELO 0x00400000
341 #define CANFD6_REG_BITS_MCAN_IR_BEU 0x00200000
342 #define CANFD6_REG_BITS_MCAN_IR_BEC 0x00100000
343 #define CANFD6_REG_BITS_MCAN_IR_DRX 0x00080000
344 #define CANFD6_REG_BITS_MCAN_IR_TOO 0x00040000
345 #define CANFD6_REG_BITS_MCAN_IR_MRAF 0x00020000
346 #define CANFD6_REG_BITS_MCAN_IR_TSW 0x00010000
347 #define CANFD6_REG_BITS_MCAN_IR_TEFL 0x00008000
348 #define CANFD6_REG_BITS_MCAN_IR_TEFF 0x00004000
349 #define CANFD6_REG_BITS_MCAN_IR_TEFW 0x00002000
350 #define CANFD6_REG_BITS_MCAN_IR_TEFN 0x00001000
351 #define CANFD6_REG_BITS_MCAN_IR_TFE 0x00000800
352 #define CANFD6_REG_BITS_MCAN_IR_TCF 0x00000400
353 #define CANFD6_REG_BITS_MCAN_IR_TC 0x00000200
354 #define CANFD6_REG_BITS_MCAN_IR_HPM 0x00000100
355 #define CANFD6_REG_BITS_MCAN_IR_RF1L 0x00000080
356 #define CANFD6_REG_BITS_MCAN_IR_RF1F 0x00000040
357 #define CANFD6_REG_BITS_MCAN_IR_RF1W 0x00000020
358 #define CANFD6_REG_BITS_MCAN_IR_RF1N 0x00000010
359 #define CANFD6_REG_BITS_MCAN_IR_RF0L 0x00000008
360 #define CANFD6_REG_BITS_MCAN_IR_RF0F 0x00000004
361 #define CANFD6_REG_BITS_MCAN_IR_RF0W 0x00000002
362 #define CANFD6_REG_BITS_MCAN_IR_RF0N 0x00000001
363  // canfd6_reg9
365 
376 #define CANFD6_REG_BITS_MCAN_IE_ARAL 0x20000000
377 #define CANFD6_REG_BITS_MCAN_IE_PEDL 0x10000000
378 #define CANFD6_REG_BITS_MCAN_IE_PEAL 0x08000000
379 #define CANFD6_REG_BITS_MCAN_IE_WDIL 0x04000000
380 #define CANFD6_REG_BITS_MCAN_IE_BOL 0x02000000
381 #define CANFD6_REG_BITS_MCAN_IE_EWL 0x01000000
382 #define CANFD6_REG_BITS_MCAN_IE_EPL 0x00800000
383 #define CANFD6_REG_BITS_MCAN_IE_ELOL 0x00400000
384 #define CANFD6_REG_BITS_MCAN_IE_BEUL 0x00200000
385 #define CANFD6_REG_BITS_MCAN_IE_BECL 0x00100000
386 #define CANFD6_REG_BITS_MCAN_IE_DRXL 0x00080000
387 #define CANFD6_REG_BITS_MCAN_IE_TOOL 0x00040000
388 #define CANFD6_REG_BITS_MCAN_IE_MRAFL 0x00020000
389 #define CANFD6_REG_BITS_MCAN_IE_TSWL 0x00010000
390 #define CANFD6_REG_BITS_MCAN_IE_TEFLL 0x00008000
391 #define CANFD6_REG_BITS_MCAN_IE_TEFFL 0x00004000
392 #define CANFD6_REG_BITS_MCAN_IE_TEFWL 0x00002000
393 #define CANFD6_REG_BITS_MCAN_IE_TEFNL 0x00001000
394 #define CANFD6_REG_BITS_MCAN_IE_TFEL 0x00000800
395 #define CANFD6_REG_BITS_MCAN_IE_TCFL 0x00000400
396 #define CANFD6_REG_BITS_MCAN_IE_TCL 0x00000200
397 #define CANFD6_REG_BITS_MCAN_IE_HPML 0x00000100
398 #define CANFD6_REG_BITS_MCAN_IE_RF1LL 0x00000080
399 #define CANFD6_REG_BITS_MCAN_IE_RF1FL 0x00000040
400 #define CANFD6_REG_BITS_MCAN_IE_RF1WL 0x00000020
401 #define CANFD6_REG_BITS_MCAN_IE_RF1NL 0x00000010
402 #define CANFD6_REG_BITS_MCAN_IE_RF0LL 0x00000008
403 #define CANFD6_REG_BITS_MCAN_IE_RF0FL 0x00000004
404 #define CANFD6_REG_BITS_MCAN_IE_RF0WL 0x00000002
405 #define CANFD6_REG_BITS_MCAN_IE_RF0NL 0x00000001
406  // canfd6_reg10
408 
419 #define CANFD6_REG_BITS_MCAN_ILE_EINT1 0x00000002
420 #define CANFD6_REG_BITS_MCAN_ILE_EINT0 0x00000001
421  // canfd6_reg11
423 
434 #define CANFD6_REG_BITS_MCAN_GFC_ANFS_FIFO0 0x00000000
435 #define CANFD6_REG_BITS_MCAN_GFC_ANFS_FIFO1 0x00000010
436 #define CANFD6_REG_BITS_MCAN_GFC_ANFE_FIFO0 0x00000000
437 #define CANFD6_REG_BITS_MCAN_GFC_ANFE_FIFO1 0x00000004
438 #define CANFD6_REG_BITS_MCAN_GFC_RRFS 0x00000002
439 #define CANFD6_REG_BITS_MCAN_GFC_RRFE 0x00000001
440 #define CANFD6_REG_BITS_MCAN_GFC_MASK 0x0000003F
441  // canfd6_reg12
443 
448 #define CANFD6_REG_BITS_MCAN_RXF0C_F0OM_OVERWRITE 0x80000000
449 
460 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_8B 0x00000000
461 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_12B 0x00000100
462 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_16B 0x00000200
463 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_20B 0x00000300
464 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_24B 0x00000400
465 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_32B 0x00000500
466 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_48B 0x00000600
467 #define CANFD6_REG_BITS_MCAN_RXESC_RBDS_64B 0x00000700
468 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_8B 0x00000000
469 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_12B 0x00000010
470 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_16B 0x00000020
471 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_20B 0x00000030
472 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_24B 0x00000040
473 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_32B 0x00000050
474 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_48B 0x00000060
475 #define CANFD6_REG_BITS_MCAN_RXESC_F1DS_64B 0x00000070
476 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_8B 0x00000000
477 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_12B 0x00000001
478 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_16B 0x00000002
479 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_20B 0x00000003
480 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_24B 0x00000004
481 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_32B 0x00000005
482 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_48B 0x00000006
483 #define CANFD6_REG_BITS_MCAN_RXESC_F0DS_64B 0x00000007
484  // canfd6_reg13
486 
491 #define CANFD6_REG_BITS_MCAN_TXBC_TFQM 0x40000000
492 
503 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_8 0x00000000
504 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_12 0x00000001
505 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_16 0x00000002
506 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_20 0x00000003
507 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_24 0x00000004
508 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_32 0x00000005
509 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_48 0x00000006
510 #define CANFD6_REG_BITS_MCAN_TXESC_TBDS_64 0x00000007
511  // canfd6_reg14
513 
524 #define CANFD6_REG_BITS_MCAN_TSCC_PRESCALER_MASK 0x000F0000
525 #define CANFD6_REG_BITS_MCAN_TSCC_COUNTER_ALWAYS_0 0x00000000
526 #define CANFD6_REG_BITS_MCAN_TSCC_COUNTER_USE_TCP 0x00000001
527 #define CANFD6_REG_BITS_MCAN_TSCC_COUNTER_EXTERNAL 0x00000002
528  // canfd6_reg15
530 
541 #define CANFD6_REG_BITS_MCAN_TXBAR_AR31 0x80000000
542 #define CANFD6_REG_BITS_MCAN_TXBAR_AR30 0x40000000
543 #define CANFD6_REG_BITS_MCAN_TXBAR_AR29 0x20000000
544 #define CANFD6_REG_BITS_MCAN_TXBAR_AR28 0x10000000
545 #define CANFD6_REG_BITS_MCAN_TXBAR_AR27 0x08000000
546 #define CANFD6_REG_BITS_MCAN_TXBAR_AR26 0x04000000
547 #define CANFD6_REG_BITS_MCAN_TXBAR_AR25 0x02000000
548 #define CANFD6_REG_BITS_MCAN_TXBAR_AR24 0x01000000
549 #define CANFD6_REG_BITS_MCAN_TXBAR_AR23 0x00800000
550 #define CANFD6_REG_BITS_MCAN_TXBAR_AR22 0x00400000
551 #define CANFD6_REG_BITS_MCAN_TXBAR_AR21 0x00200000
552 #define CANFD6_REG_BITS_MCAN_TXBAR_AR20 0x00100000
553 #define CANFD6_REG_BITS_MCAN_TXBAR_AR19 0x00080000
554 #define CANFD6_REG_BITS_MCAN_TXBAR_AR18 0x00040000
555 #define CANFD6_REG_BITS_MCAN_TXBAR_AR17 0x00020000
556 #define CANFD6_REG_BITS_MCAN_TXBAR_AR16 0x00010000
557 #define CANFD6_REG_BITS_MCAN_TXBAR_AR15 0x00008000
558 #define CANFD6_REG_BITS_MCAN_TXBAR_AR14 0x00004000
559 #define CANFD6_REG_BITS_MCAN_TXBAR_AR13 0x00002000
560 #define CANFD6_REG_BITS_MCAN_TXBAR_AR12 0x00001000
561 #define CANFD6_REG_BITS_MCAN_TXBAR_AR11 0x00000800
562 #define CANFD6_REG_BITS_MCAN_TXBAR_AR10 0x00000400
563 #define CANFD6_REG_BITS_MCAN_TXBAR_AR9 0x00000200
564 #define CANFD6_REG_BITS_MCAN_TXBAR_AR8 0x00000100
565 #define CANFD6_REG_BITS_MCAN_TXBAR_AR7 0x00000080
566 #define CANFD6_REG_BITS_MCAN_TXBAR_AR6 0x00000040
567 #define CANFD6_REG_BITS_MCAN_TXBAR_AR5 0x00000020
568 #define CANFD6_REG_BITS_MCAN_TXBAR_AR4 0x00000010
569 #define CANFD6_REG_BITS_MCAN_TXBAR_AR3 0x00000008
570 #define CANFD6_REG_BITS_MCAN_TXBAR_AR2 0x00000004
571 #define CANFD6_REG_BITS_MCAN_TXBAR_AR1 0x00000002
572 #define CANFD6_REG_BITS_MCAN_TXBAR_AR0 0x00000001
573  // canfd6_reg16
575 
586 #define CANFD6_REG_BITS_MCAN_TXBCR_CR31 0x80000000
587 #define CANFD6_REG_BITS_MCAN_TXBCR_CR30 0x40000000
588 #define CANFD6_REG_BITS_MCAN_TXBCR_CR29 0x20000000
589 #define CANFD6_REG_BITS_MCAN_TXBCR_CR28 0x10000000
590 #define CANFD6_REG_BITS_MCAN_TXBCR_CR27 0x08000000
591 #define CANFD6_REG_BITS_MCAN_TXBCR_CR26 0x04000000
592 #define CANFD6_REG_BITS_MCAN_TXBCR_CR25 0x02000000
593 #define CANFD6_REG_BITS_MCAN_TXBCR_CR24 0x01000000
594 #define CANFD6_REG_BITS_MCAN_TXBCR_CR23 0x00800000
595 #define CANFD6_REG_BITS_MCAN_TXBCR_CR22 0x00400000
596 #define CANFD6_REG_BITS_MCAN_TXBCR_CR21 0x00200000
597 #define CANFD6_REG_BITS_MCAN_TXBCR_CR20 0x00100000
598 #define CANFD6_REG_BITS_MCAN_TXBCR_CR19 0x00080000
599 #define CANFD6_REG_BITS_MCAN_TXBCR_CR18 0x00040000
600 #define CANFD6_REG_BITS_MCAN_TXBCR_CR17 0x00020000
601 #define CANFD6_REG_BITS_MCAN_TXBCR_CR16 0x00010000
602 #define CANFD6_REG_BITS_MCAN_TXBCR_CR15 0x00008000
603 #define CANFD6_REG_BITS_MCAN_TXBCR_CR14 0x00004000
604 #define CANFD6_REG_BITS_MCAN_TXBCR_CR13 0x00002000
605 #define CANFD6_REG_BITS_MCAN_TXBCR_CR12 0x00001000
606 #define CANFD6_REG_BITS_MCAN_TXBCR_CR11 0x00000800
607 #define CANFD6_REG_BITS_MCAN_TXBCR_CR10 0x00000400
608 #define CANFD6_REG_BITS_MCAN_TXBCR_CR9 0x00000200
609 #define CANFD6_REG_BITS_MCAN_TXBCR_CR8 0x00000100
610 #define CANFD6_REG_BITS_MCAN_TXBCR_CR7 0x00000080
611 #define CANFD6_REG_BITS_MCAN_TXBCR_CR6 0x00000040
612 #define CANFD6_REG_BITS_MCAN_TXBCR_CR5 0x00000020
613 #define CANFD6_REG_BITS_MCAN_TXBCR_CR4 0x00000010
614 #define CANFD6_REG_BITS_MCAN_TXBCR_CR3 0x00000008
615 #define CANFD6_REG_BITS_MCAN_TXBCR_CR2 0x00000004
616 #define CANFD6_REG_BITS_MCAN_TXBCR_CR1 0x00000002
617 #define CANFD6_REG_BITS_MCAN_TXBCR_CR0 0x00000001
618  // canfd6_reg17
620 
631 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE31 0x80000000
632 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE30 0x40000000
633 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE29 0x20000000
634 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE28 0x10000000
635 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE27 0x08000000
636 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE26 0x04000000
637 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE25 0x02000000
638 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE24 0x01000000
639 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE23 0x00800000
640 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE22 0x00400000
641 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE21 0x00200000
642 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE20 0x00100000
643 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE19 0x00080000
644 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE18 0x00040000
645 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE17 0x00020000
646 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE16 0x00010000
647 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE15 0x00008000
648 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE14 0x00004000
649 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE13 0x00002000
650 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE12 0x00001000
651 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE11 0x00000800
652 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE10 0x00000400
653 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE9 0x00000200
654 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE8 0x00000100
655 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE7 0x00000080
656 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE6 0x00000040
657 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE5 0x00000020
658 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE4 0x00000010
659 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE3 0x00000008
660 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE2 0x00000004
661 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE1 0x00000002
662 #define CANFD6_REG_BITS_MCAN_TXBTIE_TIE0 0x00000001
663  // canfd6_reg18
665 
676 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE31 0x80000000
677 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE30 0x40000000
678 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE29 0x20000000
679 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE28 0x10000000
680 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE27 0x08000000
681 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE26 0x04000000
682 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE25 0x02000000
683 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE24 0x01000000
684 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE23 0x00800000
685 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE22 0x00400000
686 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE21 0x00200000
687 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE20 0x00100000
688 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE19 0x00080000
689 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE18 0x00040000
690 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE17 0x00020000
691 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE16 0x00010000
692 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE15 0x00008000
693 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE14 0x00004000
694 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE13 0x00002000
695 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE12 0x00001000
696 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE11 0x00000800
697 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE10 0x00000400
698 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE9 0x00000200
699 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE8 0x00000100
700 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE7 0x00000080
701 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE6 0x00000040
702 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE5 0x00000020
703 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE4 0x00000010
704 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE3 0x00000008
705 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE2 0x00000004
706 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE1 0x00000002
707 #define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE0 0x00000001
708  // canfd6_reg19
710 
721 #define CANFD6_REG_BITS_DEVICE_MODE_FORCED_SET_BITS 0x00000020
722 
723 #define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_MASK 0xC0000000
724 #define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_DIS 0x00000000
725 #define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_RISING 0x40000000
726 #define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_FALLING 0x80000000
727 #define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_BOTHEDGES 0xC0000000
728 
729 #define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_MASK 0x30000000
730 #define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_60MS 0x00000000
731 #define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_600MS 0x10000000
732 #define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_3S 0x20000000
733 #define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_6S 0x30000000
734 
735 #define CANFD6_REG_BITS_DEVICE_MODE_WD_CLK_MASK 0x08000000
736 #define CANFD6_REG_BITS_DEVICE_MODE_WD_CLK_20MHZ 0x00000000
737 #define CANFD6_REG_BITS_DEVICE_MODE_WD_CLK_40MHZ 0x08000000
738 
739 #define CANFD6_REG_BITS_DEVICE_MODE_GPO2_MASK 0x00C00000
740 #define CANFD6_REG_BITS_DEVICE_MODE_GPO2_CAN_FAULT 0x00000000
741 #define CANFD6_REG_BITS_DEVICE_MODE_GPO2_MCAN_INT0 0x00400000
742 #define CANFD6_REG_BITS_DEVICE_MODE_GPO2_WDT 0x00800000
743 #define CANFD6_REG_BITS_DEVICE_MODE_GPO2_NINT 0x00C00000
744 
745 #define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_ENMASK 0x00200000
746 #define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_EN 0x00200000
747 #define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_DIS 0x00000000
748 
749 #define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_VOLT_MASK 0x00080000
750 #define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_VOLT_INTERNAL 0x00000000
751 #define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_VOLT_VIO 0x00080000
752 
753 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_RESET_BIT 0x00040000
754 
755 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_MASK 0x00020000
756 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_INT 0x00000000
757 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_INH_PULSE 0x00010000
758 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_WDT_PULSE 0x00020000
759 
760 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_MASK 0x0000C000
761 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_GPO 0x00000000
762 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_CLKOUT 0x00004000
763 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_GPI 0x00008000
764 
765 #define CANFD6_REG_BITS_DEVICE_MODE_FAIL_SAFE_MASK 0x00002000
766 #define CANFD6_REG_BITS_DEVICE_MODE_FAIL_SAFE_EN 0x00002000
767 #define CANFD6_REG_BITS_DEVICE_MODE_FAIL_SAFE_DIS 0x00000000
768 
769 #define CANFD6_REG_BITS_DEVICE_MODE_CLKOUT_MASK 0x00001000
770 #define CANFD6_REG_BITS_DEVICE_MODE_CLKOUT_DIV1 0x00000000
771 #define CANFD6_REG_BITS_DEVICE_MODE_CLKOUT_DIV2 0x00001000
772 
773 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_MASK 0x00000C00
774 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_SPI_INT 0x00000000
775 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_MCAN_INT1 0x00000400
776 #define CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_UVLO_THERM 0x00000800
777 
778 #define CANFD6_REG_BITS_DEVICE_MODE_INH_MASK 0x00000200
779 #define CANFD6_REG_BITS_DEVICE_MODE_INH_DIS 0x00000200
780 #define CANFD6_REG_BITS_DEVICE_MODE_INH_EN 0x00000000
781 
782 #define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_CONFIG_MASK 0x00000100
783 #define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_CONFIG_INH 0x00000000
784 #define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_CONFIG_WKRQ 0x00000100
785 
786 #define CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_MASK 0x000000C0
787 #define CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_SLEEP 0x00000000
788 #define CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_STANDBY 0x00000040
789 #define CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_NORMAL 0x00000080
790 
791 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_MASK 0x00000008
792 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_EN 0x00000008
793 #define CANFD6_REG_BITS_DEVICE_MODE_WDT_DIS 0x00000000
794 
795 #define CANFD6_REG_BITS_DEVICE_MODE_DEVICE_RESET 0x00000004
796 
797 #define CANFD6_REG_BITS_DEVICE_MODE_SWE_MASK 0x00000002
798 #define CANFD6_REG_BITS_DEVICE_MODE_SWE_DIS 0x00000002
799 #define CANFD6_REG_BITS_DEVICE_MODE_SWE_EN 0x00000000
800 
801 #define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_MASK 0x00000001
802 #define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_PHY 0x00000000
803 #define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_CONTROLLER 0x00000001
804  // canfd6_reg20
806 
817 #define CANFD6_REG_BITS_DEVICE_IR_CANLGND 0x08000000
818 #define CANFD6_REG_BITS_DEVICE_IR_CANBUSOPEN 0x04000000
819 #define CANFD6_REG_BITS_DEVICE_IR_CANBUSGND 0x02000000
820 #define CANFD6_REG_BITS_DEVICE_IR_CANBUSBAT 0x01000000
821 #define CANFD6_REG_BITS_DEVICE_IR_UVSUP 0x00400000
822 #define CANFD6_REG_BITS_DEVICE_IR_UVIO 0x00200000
823 #define CANFD6_REG_BITS_DEVICE_IR_PWRON 0x00100000
824 #define CANFD6_REG_BITS_DEVICE_IR_TSD 0x00080000
825 #define CANFD6_REG_BITS_DEVICE_IR_WDTO 0x00040000
826 #define CANFD6_REG_BITS_DEVICE_IR_ECCERR 0x00010000
827 #define CANFD6_REG_BITS_DEVICE_IR_CANINT 0x00008000
828 #define CANFD6_REG_BITS_DEVICE_IR_LWU 0x00004000
829 #define CANFD6_REG_BITS_DEVICE_IR_WKERR 0x00002000
830 #define CANFD6_REG_BITS_DEVICE_IR_FRAME_OVF 0x00001000
831 #define CANFD6_REG_BITS_DEVICE_IR_CANSLNT 0x00000400
832 #define CANFD6_REG_BITS_DEVICE_IR_CANDOM 0x00000100
833 #define CANFD6_REG_BITS_DEVICE_IR_GLOBALERR 0x00000080
834 #define CANFD6_REG_BITS_DEVICE_IR_nWKRQ 0x00000040
835 #define CANFD6_REG_BITS_DEVICE_IR_CANERR 0x00000020
836 #define CANFD6_REG_BITS_DEVICE_IR_CANBUSFAULT 0x00000010
837 #define CANFD6_REG_BITS_DEVICE_IR_SPIERR 0x00000008
838 #define CANFD6_REG_BITS_DEVICE_IR_SWERR 0x00000004
839 #define CANFD6_REG_BITS_DEVICE_IR_M_CAN_INT 0x00000002
840 #define CANFD6_REG_BITS_DEVICE_IR_VTWD 0x00000001
841  // canfd6_reg21
843 
854 #define CANFD6_REG_BITS_DEVICE_IE_UVCCOUT 0x00800000
855 #define CANFD6_REG_BITS_DEVICE_IE_UVSUP 0x00400000
856 #define CANFD6_REG_BITS_DEVICE_IE_UVIO 0x00200000
857 #define CANFD6_REG_BITS_DEVICE_IE_PWRON 0x00100000
858 #define CANFD6_REG_BITS_DEVICE_IE_TSD 0x00080000
859 #define CANFD6_REG_BITS_DEVICE_IE_WDTO 0x00040000
860 #define CANFD6_REG_BITS_DEVICE_IE_ECCERR 0x00010000
861 #define CANFD6_REG_BITS_DEVICE_IE_CANINT 0x00008000
862 #define CANFD6_REG_BITS_DEVICE_IE_LWU 0x00004000
863 #define CANFD6_REG_BITS_DEVICE_IE_WKERR 0x00002000
864 #define CANFD6_REG_BITS_DEVICE_IE_FRAME_OVF 0x00001000
865 #define CANFD6_REG_BITS_DEVICE_IE_CANSLNT 0x00000400
866 #define CANFD6_REG_BITS_DEVICE_IE_CANDOM 0x00000100
867 #define CANFD6_REG_BITS_DEVICE_IE_MASK 0x7F69D700
868  // canfd6_reg22
870 
885 #define CANFD6_MAP_MIKROBUS( cfg, mikrobus ) \
886  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
887  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
888  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
889  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
890  cfg.wkr = MIKROBUS( mikrobus, MIKROBUS_AN ); \
891  cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
892  cfg.wkp = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
893  cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
894  // canfd6_map // canfd6
897 
902 typedef struct
903 {
904  // Output pins
905 
906  digital_out_t wkr;
907  digital_out_t rst;
908  digital_out_t wkp;
910  // Input pins
911 
912  digital_in_t int_pin;
914  // Modules
915 
916  spi_master_t spi;
918  pin_name_t chip_select;
920 } canfd6_t;
921 
926 typedef struct
927 {
928  // Communication gpio pins
929 
930  pin_name_t miso;
931  pin_name_t mosi;
932  pin_name_t sck;
933  pin_name_t cs;
935  // Additional gpio pins
936 
937  pin_name_t wkr;
938  pin_name_t rst;
939  pin_name_t wkp;
940  pin_name_t int_pin;
942  // static variable
943 
944  uint32_t spi_speed;
945  spi_master_mode_t spi_mode;
946  spi_master_chip_select_polarity_t cs_polarity;
948 } canfd6_cfg_t;
949 
954 typedef enum
955 {
957  CANFD6_ERROR = -1
958 
960 
965 typedef enum
966 {
969 
971 
976 typedef enum
977 {
980 
982 
987 typedef enum
988 {
993 
995 
1000 typedef enum
1001 {
1005 
1007 
1012 typedef enum
1013 {
1017 
1019 
1024 typedef enum
1025 {
1034 
1036 
1041 typedef enum
1042 {
1053 
1058 typedef enum
1059 {
1063  CANFD6_SID_SFT_RANGE = 0x0
1066 
1071 typedef enum
1072 {
1083 
1088 typedef enum
1089 {
1093  CANFD6_XID_EFT_RANGE = 0x0
1096 
1101 typedef enum
1102 {
1105  CANFD6_GFC_REJECT = 2
1108 
1113 typedef enum
1114 {
1120 
1125 typedef enum
1126 {
1131 
1136 typedef enum
1137 {
1143 
1148 typedef enum
1149 {
1156 
1161 typedef enum
1162 {
1169 
1174 typedef struct
1175 {
1181 
1186 typedef struct
1187 {
1190  uint8_t data_time_seg2 : 4;
1191  uint8_t data_sync_jumpwidth : 4;
1192  uint8_t tdc_offset : 7;
1193  uint8_t tdc_filter : 7;
1196 
1201 typedef struct
1202 {
1208 
1213 typedef struct
1214 {
1217  uint8_t nominal_time_seg2 : 7;
1221 
1226 typedef struct
1227 {
1228  uint8_t sid_num_elements : 8;
1229  uint8_t xid_num_elements : 7;
1230  uint8_t rx0_num_elements : 7;
1232  uint8_t rx1_num_elements : 7;
1234  uint8_t rx_buf_num_elements : 7;
1241 
1246 typedef struct
1247 {
1248  union
1249  {
1250  uint32_t word;
1251  struct
1252  {
1253  uint8_t reserved : 2;
1254  uint8_t ASM : 1;
1255  uint8_t reserved2 : 1;
1256  uint8_t CSR : 1;
1257  uint8_t MON : 1;
1258  uint8_t DAR : 1;
1259  uint8_t TEST : 1;
1260  uint8_t FDOE : 1;
1261  uint8_t BRSE : 1;
1262  uint8_t reserved3 : 2;
1263  uint8_t PXHD : 1;
1264  uint8_t EFBI : 1;
1265  uint8_t TXP : 1;
1266  uint8_t NISO : 1;
1267  };
1268  };
1270 
1275 typedef struct
1276 {
1277  union
1278  {
1279  uint32_t word;
1280  struct
1281  {
1282  uint8_t RF0N : 1;
1283  uint8_t RF0W : 1;
1284  uint8_t RF0F : 1;
1285  uint8_t RF0L : 1;
1286  uint8_t RF1N : 1;
1287  uint8_t RF1W : 1;
1288  uint8_t RF1F : 1;
1289  uint8_t RF1L : 1;
1290  uint8_t HPM : 1;
1291  uint8_t TC : 1;
1292  uint8_t TCF : 1;
1293  uint8_t TFE : 1;
1294  uint8_t TEFN : 1;
1295  uint8_t TEFW : 1;
1296  uint8_t TEFF : 1;
1297  uint8_t TEFL : 1;
1298  uint8_t TSW : 1;
1299  uint8_t MRAF : 1;
1300  uint8_t TOO : 1;
1301  uint8_t DRX : 1;
1302  uint8_t BEC : 1;
1303  uint8_t BEU : 1;
1304  uint8_t ELO : 1;
1305  uint8_t EP : 1;
1306  uint8_t EW : 1;
1307  uint8_t BO : 1;
1308  uint8_t WDI : 1;
1309  uint8_t PEA : 1;
1310  uint8_t PED : 1;
1311  uint8_t ARA : 1;
1312  uint8_t reserved : 2;
1313  };
1314  };
1316 
1321 typedef struct
1322 {
1323  union
1324  {
1325  uint32_t word;
1326  struct
1327  {
1328  uint8_t RF0NE : 1;
1329  uint8_t RF0WE : 1;
1330  uint8_t RF0FE : 1;
1331  uint8_t RF0LE : 1;
1332  uint8_t RF1NE : 1;
1333  uint8_t RF1WE : 1;
1334  uint8_t RF1FE : 1;
1335  uint8_t RF1LE : 1;
1336  uint8_t HPME : 1;
1337  uint8_t TCE : 1;
1338  uint8_t TCFE : 1;
1339  uint8_t TFEE : 1;
1340  uint8_t TEFNE : 1;
1341  uint8_t TEFWE : 1;
1342  uint8_t TEFFE : 1;
1343  uint8_t TEFLE : 1;
1344  uint8_t TSWE : 1;
1345  uint8_t MRAFE : 1;
1346  uint8_t TOOE : 1;
1347  uint8_t DRXE : 1;
1348  uint8_t BECE : 1;
1349  uint8_t BEUE : 1;
1350  uint8_t ELOE : 1;
1351  uint8_t EPE : 1;
1352  uint8_t EWE : 1;
1353  uint8_t BOE : 1;
1354  uint8_t WDIE : 1;
1355  uint8_t PEAE : 1;
1356  uint8_t PEDE : 1;
1357  uint8_t ARAE : 1;
1358  uint8_t reserved : 2;
1359  };
1360  };
1362 
1367 typedef struct
1368 {
1369  uint32_t ID : 29;
1370  uint8_t RTR : 1;
1371  uint8_t XTD : 1;
1372  uint8_t ESI : 1;
1373  uint16_t RXTS : 16;
1374  uint8_t DLC : 4;
1375  uint8_t BRS : 1;
1376  uint8_t FDF : 1;
1377  uint8_t reserved : 2;
1378  uint8_t FIDX : 7;
1379  uint8_t ANMF : 1;
1382 
1387 typedef struct
1388 {
1389  uint32_t ID : 29;
1390  uint8_t RTR : 1;
1391  uint8_t XTD : 1;
1392  uint8_t ESI : 1;
1393  uint8_t DLC : 4;
1394  uint8_t BRS : 1;
1395  uint8_t FDF : 1;
1396  uint8_t reserved : 1;
1397  uint8_t EFC : 1;
1398  uint8_t MM : 8;
1401 
1406 typedef struct
1407 {
1408  union
1409  {
1410  uint32_t word;
1411  struct
1412  {
1413  uint16_t SFID2 : 11;
1414  uint8_t reserved : 5;
1415  uint16_t SFID1 : 11;
1418  };
1419  };
1421 
1426 typedef struct
1427 {
1428  uint32_t EFID2 : 29;
1429  uint8_t reserved : 1;
1431  uint32_t EFID1 : 29;
1435 
1440 typedef struct
1441 {
1442  union
1443  {
1444  uint32_t word;
1445  struct
1446  {
1447  uint8_t RRFE : 1;
1448  uint8_t RRFS : 1;
1451  uint32_t reserved : 26;
1452  };
1453  };
1455 
1460 typedef struct
1461 {
1462  union
1463  {
1464  uint32_t word;
1465  struct
1466  {
1467  uint8_t VTWD : 1;
1468  uint8_t M_CAN_INT : 1;
1469  uint8_t SWERR : 1;
1470  uint8_t SPIERR : 1;
1471  uint8_t CBF : 1;
1472  uint8_t CANERR : 1;
1473  uint8_t WKRQ : 1;
1474  uint8_t GLOBALERR : 1;
1475  uint8_t CANDOM : 1;
1476  uint8_t RESERVED : 1;
1477  uint8_t CANTO : 1;
1478  uint8_t RESERVED2 : 1;
1479  uint8_t FRAME_OVF : 1;
1480  uint8_t WKERR : 1;
1481  uint8_t LWU : 1;
1482  uint8_t CANINT : 1;
1483  uint8_t ECCERR : 1;
1484  uint8_t RESERVED3 : 1;
1485  uint8_t WDTO : 1;
1486  uint8_t TSD : 1;
1487  uint8_t PWRON : 1;
1488  uint8_t UVIO : 1;
1489  uint8_t UVSUP : 1;
1490  uint8_t SMS : 1;
1491  uint8_t CANBUSBAT : 1;
1492  uint8_t CANBUSGND : 1;
1493  uint8_t CANBUSOPEN : 1;
1494  uint8_t CANLGND : 1;
1495  uint8_t CANHBAT : 1;
1496  uint8_t CANHCANL : 1;
1497  uint8_t CANBUSTERMOPEN : 1;
1498  uint8_t CANBUSNORM : 1;
1499  };
1500  };
1502 
1507 typedef struct
1508 {
1509  union
1510  {
1511  uint32_t word;
1512  struct
1513  {
1514  uint8_t RESERVED1 : 8;
1515  uint8_t CANDOMEN : 1;
1516  uint8_t RESERVED2 : 1;
1517  uint8_t CANTOEN : 1;
1518  uint8_t RESERVED3 : 1;
1519  uint8_t FRAME_OVFEN : 1;
1520  uint8_t WKERREN : 1;
1521  uint8_t LWUEN : 1;
1522  uint8_t CANINTEN : 1;
1523  uint8_t ECCERREN : 1;
1524  uint8_t RESERVED4 : 1;
1525  uint8_t WDTOEN : 1;
1526  uint8_t TSDEN : 1;
1527  uint8_t PWRONEN : 1;
1528  uint8_t UVIOEN : 1;
1529  uint8_t UVSUPEN : 1;
1530  uint8_t SMSEN : 1;
1531  uint8_t CANBUSBATEN : 1;
1532  uint8_t CANBUSGNDEN : 1;
1533  uint8_t CANBUSOPENEN : 1;
1534  uint8_t CANLGNDEN : 1;
1535  uint8_t CANHBATEN : 1;
1536  uint8_t CANHCANLEN : 1;
1537  uint8_t CANBUSTERMOPENEN : 1;
1538  uint8_t CANBUSNORMEN : 1;
1539  };
1540  };
1542 
1547 typedef struct
1548 {
1549  union
1550  {
1551  uint32_t word;
1552  struct
1553  {
1554  uint8_t RESERVED0 : 1;
1555  uint8_t SWE_DIS: 1;
1556  uint8_t DEVICE_RESET : 1;
1557  uint8_t WD_EN : 1;
1558  uint8_t RESERVED1 : 4;
1559  uint8_t nWKRQ_CONFIG : 1;
1560  uint8_t INH_DIS : 1;
1562  uint8_t RESERVED2 : 1;
1563  uint8_t FAIL_SAFE_EN : 1;
1566  uint8_t WD_BIT_RESET : 1;
1567  uint8_t nWKRQ_VOLTAGE : 1;
1568  uint8_t RESERVED3 : 2;
1570  uint8_t RESERVED4 : 3;
1571  uint8_t CLK_REF : 1;
1572  uint8_t RESERVED5 : 2;
1574  };
1575  };
1577 
1594 
1609 err_t canfd6_init ( canfd6_t *ctx, canfd6_cfg_t *cfg );
1610 
1622 
1633 
1644 
1655 
1665 uint8_t canfd6_get_int_pin ( canfd6_t *ctx );
1666 
1680 
1694 
1706 
1718 
1730 
1742 
1755 
1768 
1780 
1792 
1805 
1818 
1831 
1852 
1864 
1881 uint8_t canfd6_mcan_read_nextfifo ( canfd6_t *ctx, canfd6_mcan_fifo_enum_t fifo_def, canfd6_mcan_rx_header_t *header, uint8_t data_payload[ ] );
1882 
1898 uint8_t canfd6_mcan_read_rxbuffer ( canfd6_t *ctx, uint8_t buf_index, canfd6_mcan_rx_header_t *header, uint8_t data_payload[ ] );
1899 
1914 uint32_t canfd6_mcan_write_txbuffer ( canfd6_t *ctx, uint8_t buf_index, canfd6_mcan_tx_header_t *header, uint8_t data_payload[ ] );
1915 
1929 err_t canfd6_mcan_transmit_buffer_contents ( canfd6_t *ctx, uint8_t buf_index );
1930 
1945 err_t canfd6_mcan_write_sid_filter ( canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_sid_filter_t *filter );
1946 
1961 err_t canfd6_mcan_read_sid_filter ( canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_sid_filter_t *filter );
1962 
1977 err_t canfd6_mcan_write_xid_filter ( canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_xid_filter_t *filter );
1978 
1993 err_t canfd6_mcan_read_xid_filter ( canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_xid_filter_t *filter );
1994 
2005 
2017 
2027 
2039 
2051 
2061 uint8_t canfd6_mcan_dlc_to_bytes ( uint8_t input_dlc );
2062 
2072 uint8_t canfd6_mcan_txrxesc_data_byte_value ( uint8_t input_esc_value );
2073 
2084 
2096 
2108 
2120 
2132 
2142 
2152 
2164 
2176 
2191 
2203 
2218 
2228 
2239 
2254 
2265 
2275 
2285 
2295 
2296 #ifdef __cplusplus
2297 }
2298 #endif
2299 #endif // CANFD6_H
2300  // canfd6
2302 
2303 // ------------------------------------------------------------------------ END
canfd6_mcan_interrupt_enable_t
CAN FD 6 Click MCAN interrupt enable.
Definition: canfd6.h:1322
canfd6_t::wkp
digital_out_t wkp
Definition: canfd6.h:908
canfd6_mcan_cccr_config_t::word
uint32_t word
Definition: canfd6.h:1250
CANFD6_XID_EFEC_REJECTMATCH
@ CANFD6_XID_EFEC_REJECTMATCH
Definition: canfd6.h:1076
CANFD6_DEV_CONFIG_GPO1_MCAN_INT1
@ CANFD6_DEV_CONFIG_GPO1_MCAN_INT1
Definition: canfd6.h:1116
canfd6_mcan_nominal_timing_simple_t::nominal_bitrate_prescaler
uint16_t nominal_bitrate_prescaler
Definition: canfd6.h:1203
canfd6_device_interrupts_t::WDTO
uint8_t WDTO
Definition: canfd6.h:1485
canfd6_mcan_tx_header_t::EFC
uint8_t EFC
Definition: canfd6.h:1397
canfd6_device_mode_enum_t
canfd6_device_mode_enum_t
CAN FD 6 Click device mode enum.
Definition: canfd6.h:1013
canfd6_dev_config_t::GPIO1_CONFIG
canfd6_dev_config_gpio1_t GPIO1_CONFIG
Definition: canfd6.h:1564
CANFD6_GFC_REJECT
@ CANFD6_GFC_REJECT
Definition: canfd6.h:1105
canfd6_device_interrupts_t::CANTO
uint8_t CANTO
Definition: canfd6.h:1477
CANFD6_SID_SFEC_REJECTMATCH
@ CANFD6_SID_SFEC_REJECTMATCH
Definition: canfd6.h:1046
canfd6_mram_config_t::rx1_num_elements
uint8_t rx1_num_elements
Definition: canfd6.h:1232
canfd6_mcan_interrupts_t::TFE
uint8_t TFE
Definition: canfd6.h:1293
canfd6_mcan_interrupts_t::TCF
uint8_t TCF
Definition: canfd6.h:1292
canfd6_mcan_tx_header_t::reserved
uint8_t reserved
Definition: canfd6.h:1396
canfd6_dev_config_t::DEVICE_RESET
uint8_t DEVICE_RESET
Definition: canfd6.h:1556
CANFD6_MRAM_20_Byte_Data
@ CANFD6_MRAM_20_Byte_Data
Definition: canfd6.h:1029
canfd6_device_enable_testmode
err_t canfd6_device_enable_testmode(canfd6_t *ctx, canfd6_device_test_mode_enum_t mode_define)
CAN FD 6 device enable testmode function.
canfd6_mcan_interrupts_t::RF0F
uint8_t RF0F
Definition: canfd6.h:1284
canfd6_mcan_interrupt_enable_t::RF1LE
uint8_t RF1LE
Definition: canfd6.h:1335
canfd6_device_interrupt_enable_t::CANBUSTERMOPENEN
uint8_t CANBUSTERMOPENEN
Definition: canfd6.h:1537
canfd6_device_disable_testmode
void canfd6_device_disable_testmode(canfd6_t *ctx)
CAN FD 6 device disable testmode function.
canfd6_mcan_tx_header_t::ID
uint32_t ID
Definition: canfd6.h:1389
canfd6_cfg_t::wkp
pin_name_t wkp
Definition: canfd6.h:939
canfd6_device_interrupts_t::word
uint32_t word
Definition: canfd6.h:1464
canfd6_mcan_interrupts_t::BEC
uint8_t BEC
Definition: canfd6.h:1302
canfd6_mram_config_t::rx_buf_num_elements
uint8_t rx_buf_num_elements
Definition: canfd6.h:1234
canfd6_mcan_rx_header_t::DLC
uint8_t DLC
Definition: canfd6.h:1374
canfd6_mram_config_t::tx_event_fifo_num_elements
uint8_t tx_event_fifo_num_elements
Definition: canfd6.h:1236
canfd6_device_clear_interrupts_all
void canfd6_device_clear_interrupts_all(canfd6_t *ctx)
CAN FD 6 device clear interrupts all function.
canfd6_device_interrupts_t
CAN FD 6 Click device interrupt bit field struct.
Definition: canfd6.h:1461
canfd6_mcan_nominal_timing_raw_t
CAN FD 6 Click nominal timing raw structure.
Definition: canfd6.h:1214
canfd6_dev_config_t::INH_DIS
uint8_t INH_DIS
Definition: canfd6.h:1560
canfd6_xid_efec_values_t
canfd6_xid_efec_values_t
CAN FD 6 XID EFEC enum.
Definition: canfd6.h:1072
canfd6_mcan_configure_interrupt_enable
void canfd6_mcan_configure_interrupt_enable(canfd6_t *ctx, canfd6_mcan_interrupt_enable_t *ie)
CAN FD 6 configure interrupt enable function.
canfd6_device_interrupts_t::CANINT
uint8_t CANINT
Definition: canfd6.h:1482
canfd6_mcan_interrupt_enable_t::PEDE
uint8_t PEDE
Definition: canfd6.h:1356
CANFD6_XID_EFEC_PRIORITYSTORERX1
@ CANFD6_XID_EFEC_PRIORITYSTORERX1
Definition: canfd6.h:1079
canfd6_mram_configure
err_t canfd6_mram_configure(canfd6_t *ctx, canfd6_mram_config_t *mram_config)
CAN FD 6 mram configure function.
canfd6_cfg_t::sck
pin_name_t sck
Definition: canfd6.h:932
canfd6_cfg_t::wkr
pin_name_t wkr
Definition: canfd6.h:937
canfd6_dev_config_t::RESERVED5
uint8_t RESERVED5
Definition: canfd6.h:1572
canfd6_device_clear_spierr
void canfd6_device_clear_spierr(canfd6_t *ctx)
CAN FD 6 device clear spierr function.
canfd6_mcan_global_filter_configuration_t::word
uint32_t word
Definition: canfd6.h:1444
canfd6_mcan_data_timing_raw_t::tdc_offset
uint8_t tdc_offset
Definition: canfd6.h:1192
canfd6_device_interrupt_enable_t::RESERVED2
uint8_t RESERVED2
Definition: canfd6.h:1516
CANFD6_PIN_STATE_LOW
@ CANFD6_PIN_STATE_LOW
Definition: canfd6.h:967
CANFD6_XID_EFEC_STORERX0
@ CANFD6_XID_EFEC_STORERX0
Definition: canfd6.h:1074
canfd6_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: canfd6.h:946
CANFD6_DEV_CONFIG_WDT_ACTION_nINT
@ CANFD6_DEV_CONFIG_WDT_ACTION_nINT
Definition: canfd6.h:1138
canfd6_mcan_interrupts_t::RF1F
uint8_t RF1F
Definition: canfd6.h:1288
CANFD6_MRAM_64_Byte_Data
@ CANFD6_MRAM_64_Byte_Data
Definition: canfd6.h:1033
canfd6_mcan_interrupt_enable_t::BEUE
uint8_t BEUE
Definition: canfd6.h:1349
canfd6_mcan_xid_filter_t::reserved
uint8_t reserved
Definition: canfd6.h:1429
canfd6_mcan_interrupts_t::TSW
uint8_t TSW
Definition: canfd6.h:1298
canfd6_mcan_xid_filter_t::EFT
canfd6_xid_eft_values_t EFT
Definition: canfd6.h:1430
canfd6_mcan_nominal_timing_raw_t::nominal_bitrate_prescaler
uint16_t nominal_bitrate_prescaler
Definition: canfd6.h:1215
canfd6_mram_config_t::tx_buf_element_size
canfd6_mram_elem_data_size_t tx_buf_element_size
Definition: canfd6.h:1238
canfd6_mcan_rx_header_t::XTD
uint8_t XTD
Definition: canfd6.h:1371
CANFD6_XID_EFT_DUALID
@ CANFD6_XID_EFT_DUALID
Definition: canfd6.h:1092
canfd6_mcan_interrupt_enable_t::RF0WE
uint8_t RF0WE
Definition: canfd6.h:1329
canfd6_mcan_cccr_config_t::reserved2
uint8_t reserved2
Definition: canfd6.h:1255
canfd6_cfg_setup
void canfd6_cfg_setup(canfd6_cfg_t *cfg)
CAN FD 6 configuration object setup function.
canfd6_device_interrupt_enable_t::WDTOEN
uint8_t WDTOEN
Definition: canfd6.h:1525
canfd6_mcan_interrupts_t::TC
uint8_t TC
Definition: canfd6.h:1291
canfd6_mcan_cccr_config_t::EFBI
uint8_t EFBI
Definition: canfd6.h:1264
canfd6_mcan_read_nominaltiming_raw
void canfd6_mcan_read_nominaltiming_raw(canfd6_t *ctx, canfd6_mcan_nominal_timing_raw_t *nom_timing)
CAN FD 6 read nominal timing raw function.
canfd6_dev_config_t::FAIL_SAFE_EN
uint8_t FAIL_SAFE_EN
Definition: canfd6.h:1563
canfd6_device_interrupts_t::SWERR
uint8_t SWERR
Definition: canfd6.h:1469
canfd6_device_interrupts_t::CANERR
uint8_t CANERR
Definition: canfd6.h:1472
canfd6_mcan_write_sid_filter
err_t canfd6_mcan_write_sid_filter(canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_sid_filter_t *filter)
CAN FD 6 write sid filter function.
canfd6_mcan_interrupts_t::TOO
uint8_t TOO
Definition: canfd6.h:1300
canfd6_device_interrupts_t::WKRQ
uint8_t WKRQ
Definition: canfd6.h:1473
canfd6_mcan_interrupts_t::ELO
uint8_t ELO
Definition: canfd6.h:1304
canfd6_mcan_tx_header_t::FDF
uint8_t FDF
Definition: canfd6.h:1395
canfd6_mcan_read_interrupts
void canfd6_mcan_read_interrupts(canfd6_t *ctx, canfd6_mcan_interrupts_t *ir)
CAN FD 6 read interrupts function.
CANFD6_DEVICE_MODE_SLEEP
@ CANFD6_DEVICE_MODE_SLEEP
Definition: canfd6.h:1016
canfd6_wdt_configure
err_t canfd6_wdt_configure(canfd6_t *ctx, canfd6_wdt_timer_enum_t wdt_timeout)
CAN FD 6 wdt configure function.
canfd6_mcan_interrupt_enable_t::TEFWE
uint8_t TEFWE
Definition: canfd6.h:1341
canfd6_mcan_interrupts_t::RF0W
uint8_t RF0W
Definition: canfd6.h:1283
CANFD6_PIN_STATE_HIGH
@ CANFD6_PIN_STATE_HIGH
Definition: canfd6.h:968
canfd6_mram_config_t::sid_num_elements
uint8_t sid_num_elements
Definition: canfd6.h:1228
CANFD6_DEV_CONFIG_WAKE_DISABLED
@ CANFD6_DEV_CONFIG_WAKE_DISABLED
Definition: canfd6.h:1163
canfd6_mcan_rx_header_t::ANMF
uint8_t ANMF
Definition: canfd6.h:1379
canfd6_device_interrupt_enable_t::UVSUPEN
uint8_t UVSUPEN
Definition: canfd6.h:1529
canfd6_dev_config_t::SWE_DIS
uint8_t SWE_DIS
Definition: canfd6.h:1555
canfd6_mcan_interrupt_enable_t::RF1NE
uint8_t RF1NE
Definition: canfd6.h:1332
canfd6_mcan_interrupt_enable_t::word
uint32_t word
Definition: canfd6.h:1325
canfd6_mcan_interrupts_t::ARA
uint8_t ARA
Definition: canfd6.h:1311
CANFD6_SID_SFEC_PRIORITYSTORERX0
@ CANFD6_SID_SFEC_PRIORITYSTORERX0
Definition: canfd6.h:1048
canfd6_dev_config_t::GPO2_CONFIG
canfd6_dev_config_gpo2_t GPO2_CONFIG
Definition: canfd6.h:1569
CANFD6_DEV_CONFIG_GPO2_MIRROR_INT
@ CANFD6_DEV_CONFIG_GPO2_MIRROR_INT
Definition: canfd6.h:1153
canfd6_wdt_reset
void canfd6_wdt_reset(canfd6_t *ctx)
CAN FD 6 wdt reset function.
canfd6_device_configure_ie
void canfd6_device_configure_ie(canfd6_t *ctx, canfd6_device_interrupt_enable_t *ie)
CAN FD 6 device configure ie function.
canfd6_mcan_interrupts_t::BO
uint8_t BO
Definition: canfd6.h:1307
canfd6_dev_config_t::WD_ACTION
canfd6_dev_config_wdt_action_t WD_ACTION
Definition: canfd6.h:1565
canfd6_t::wkr
digital_out_t wkr
Definition: canfd6.h:906
canfd6_device_interrupt_enable_t::CANBUSNORMEN
uint8_t CANBUSNORMEN
Definition: canfd6.h:1538
canfd6_mcan_configure_globalfilter
void canfd6_mcan_configure_globalfilter(canfd6_t *ctx, canfd6_mcan_global_filter_configuration_t *gfc)
CAN FD 6 configure global filter function.
CANFD6_DEV_CONFIG_WAKE_FALLING_EDGE
@ CANFD6_DEV_CONFIG_WAKE_FALLING_EDGE
Definition: canfd6.h:1165
CANFD6_DEVICE_TEST_MODE_PHY
@ CANFD6_DEVICE_TEST_MODE_PHY
Definition: canfd6.h:1003
CANFD6_XID_EFEC_PRIORITYSTORERX0
@ CANFD6_XID_EFEC_PRIORITYSTORERX0
Definition: canfd6.h:1078
canfd6_device_interrupts_t::TSD
uint8_t TSD
Definition: canfd6.h:1486
canfd6_device_interrupts_t::RESERVED
uint8_t RESERVED
Definition: canfd6.h:1476
CANFD6_SID_SFT_CLASSIC
@ CANFD6_SID_SFT_CLASSIC
Definition: canfd6.h:1061
canfd6_mcan_interrupts_t::EW
uint8_t EW
Definition: canfd6.h:1306
canfd6_mcan_nominal_timing_raw_t::nominal_time_seg2
uint8_t nominal_time_seg2
Definition: canfd6.h:1217
canfd6_mcan_write_txbuffer
uint32_t canfd6_mcan_write_txbuffer(canfd6_t *ctx, uint8_t buf_index, canfd6_mcan_tx_header_t *header, uint8_t data_payload[])
CAN FD 6 write tx buffer function.
canfd6_mcan_interrupts_t::DRX
uint8_t DRX
Definition: canfd6.h:1301
CANFD6_XID_EFEC_PRIORITY
@ CANFD6_XID_EFEC_PRIORITY
Definition: canfd6.h:1077
canfd6_device_interrupt_enable_t::SMSEN
uint8_t SMSEN
Definition: canfd6.h:1530
canfd6_mcan_interrupt_enable_t::TEFFE
uint8_t TEFFE
Definition: canfd6.h:1342
canfd6_mcan_interrupts_t
CAN FD 6 Click MCAN interrupts.
Definition: canfd6.h:1276
canfd6_device_configure
void canfd6_device_configure(canfd6_t *ctx, canfd6_dev_config_t *dev_cfg)
CAN FD 6 device configure function.
canfd6_device_interrupt_enable_t::TSDEN
uint8_t TSDEN
Definition: canfd6.h:1526
CANFD6_ERROR
@ CANFD6_ERROR
Definition: canfd6.h:957
canfd6_mcan_interrupt_enable_t::TSWE
uint8_t TSWE
Definition: canfd6.h:1344
canfd6_dev_config_t::RESERVED1
uint8_t RESERVED1
Definition: canfd6.h:1558
canfd6_mcan_sid_filter_t::SFID2
uint16_t SFID2
Definition: canfd6.h:1413
canfd6_mcan_txrxesc_data_byte_value
uint8_t canfd6_mcan_txrxesc_data_byte_value(uint8_t input_esc_value)
CAN FD 6 txrxesc data byte value function.
canfd6_mram_clear
void canfd6_mram_clear(canfd6_t *ctx)
CAN FD 6 mram clear function.
canfd6_device_interrupt_enable_t::CANTOEN
uint8_t CANTOEN
Definition: canfd6.h:1517
canfd6_wdt_enable
void canfd6_wdt_enable(canfd6_t *ctx)
CAN FD 6 wdt enable function.
CANFD6_DEV_CONFIG_WAKE_BOTH_EDGES
@ CANFD6_DEV_CONFIG_WAKE_BOTH_EDGES
Definition: canfd6.h:1166
canfd6_device_interrupts_t::CANLGND
uint8_t CANLGND
Definition: canfd6.h:1494
canfd6_mcan_nominal_timing_simple_t
CAN FD 6 Click nominal timing simple structure.
Definition: canfd6.h:1202
canfd6_device_read_interrupts
void canfd6_device_read_interrupts(canfd6_t *ctx, canfd6_device_interrupts_t *ir)
CAN FD 6 device read interrupts function.
canfd6_mcan_cccr_config_t::PXHD
uint8_t PXHD
Definition: canfd6.h:1263
CANFD6_DEV_CONFIG_GPO2_NO_ACTION
@ CANFD6_DEV_CONFIG_GPO2_NO_ACTION
Definition: canfd6.h:1150
canfd6_t::spi
spi_master_t spi
Definition: canfd6.h:916
canfd6_device_interrupt_enable_t::CANDOMEN
uint8_t CANDOMEN
Definition: canfd6.h:1515
canfd6_device_interrupts_t::CBF
uint8_t CBF
Definition: canfd6.h:1471
canfd6_mcan_xid_filter_t::EFID1
uint32_t EFID1
Definition: canfd6.h:1431
canfd6_mcan_data_timing_simple_t::data_tqafter_samplepoint
uint8_t data_tqafter_samplepoint
Definition: canfd6.h:1178
canfd6_mcan_nominal_timing_simple_t::nominal_tqafter_samplepoint
uint8_t nominal_tqafter_samplepoint
Definition: canfd6.h:1205
canfd6_device_interrupt_enable_t
CAN FD 6 Click device interrupt enable bit field struct.
Definition: canfd6.h:1508
canfd6_mcan_rx_header_t::ESI
uint8_t ESI
Definition: canfd6.h:1372
canfd6_mcan_interrupts_t::BEU
uint8_t BEU
Definition: canfd6.h:1303
canfd6_mcan_write_xid_filter
err_t canfd6_mcan_write_xid_filter(canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_xid_filter_t *filter)
CAN FD 6 write xid filter function.
canfd6_t::int_pin
digital_in_t int_pin
Definition: canfd6.h:912
canfd6_device_interrupts_t::CANBUSNORM
uint8_t CANBUSNORM
Definition: canfd6.h:1498
canfd6_mcan_nominal_timing_simple_t::nominal_tqbefore_samplepoint
uint16_t nominal_tqbefore_samplepoint
Definition: canfd6.h:1204
canfd6_mcan_transmit_buffer_contents
err_t canfd6_mcan_transmit_buffer_contents(canfd6_t *ctx, uint8_t buf_index)
CAN FD 6 transmit buffer contents function.
canfd6_device_interrupts_t::SPIERR
uint8_t SPIERR
Definition: canfd6.h:1470
canfd6_mcan_interrupt_enable_t::WDIE
uint8_t WDIE
Definition: canfd6.h:1354
canfd6_dev_config_t::RESERVED3
uint8_t RESERVED3
Definition: canfd6.h:1568
canfd6_mcan_interrupts_t::PEA
uint8_t PEA
Definition: canfd6.h:1309
canfd6_mcan_interrupts_t::RF1L
uint8_t RF1L
Definition: canfd6.h:1289
canfd6_device_read_config
void canfd6_device_read_config(canfd6_t *ctx, canfd6_dev_config_t *dev_cfg)
CAN FD 6 device read config function.
canfd6_cfg_t::rst
pin_name_t rst
Definition: canfd6.h:938
canfd6_rst_pin_state
void canfd6_rst_pin_state(canfd6_t *ctx, canfd6_pin_state_t state)
CAN FD 6 rst pin state function.
canfd6_mcan_sid_filter_t::word
uint32_t word
Definition: canfd6.h:1410
canfd6_mcan_rx_header_t::FIDX
uint8_t FIDX
Definition: canfd6.h:1378
canfd6_dev_config_t::WD_EN
uint8_t WD_EN
Definition: canfd6.h:1557
canfd6_mcan_tx_header_t
CAN FD 6 Click CAN message header for transmitted messages.
Definition: canfd6.h:1388
canfd6_device_interrupts_t::WKERR
uint8_t WKERR
Definition: canfd6.h:1480
canfd6_mcan_configure_datatiming_simple
void canfd6_mcan_configure_datatiming_simple(canfd6_t *ctx, canfd6_mcan_data_timing_simple_t *data_timing)
CAN FD 6 configure data timing simple function.
canfd6_mcan_interrupts_t::RF0N
uint8_t RF0N
Definition: canfd6.h:1282
CANFD6_GFC_ACCEPT_INTO_RXFIFO0
@ CANFD6_GFC_ACCEPT_INTO_RXFIFO0
Definition: canfd6.h:1103
canfd6_mcan_global_filter_configuration_t::reserved
uint32_t reserved
Definition: canfd6.h:1451
canfd6_mcan_interrupt_enable_t::TEFNE
uint8_t TEFNE
Definition: canfd6.h:1340
canfd6_init
err_t canfd6_init(canfd6_t *ctx, canfd6_cfg_t *cfg)
CAN FD 6 initialization function.
canfd6_dev_config_gpo1_t
canfd6_dev_config_gpo1_t
CAN FD 6 GPO1 config enum.
Definition: canfd6.h:1114
canfd6_mcan_interrupt_enable_t::RF1FE
uint8_t RF1FE
Definition: canfd6.h:1334
canfd6_mcan_rx_header_t::RXTS
uint16_t RXTS
Definition: canfd6.h:1373
CANFD6_DEV_CONFIG_WDT_ACTION_PULSE_INH
@ CANFD6_DEV_CONFIG_WDT_ACTION_PULSE_INH
Definition: canfd6.h:1139
canfd6_cfg_t::int_pin
pin_name_t int_pin
Definition: canfd6.h:940
CANFD6_WDT_6S
@ CANFD6_WDT_6S
Definition: canfd6.h:992
canfd6_device_interrupts_t::UVIO
uint8_t UVIO
Definition: canfd6.h:1488
canfd6_device_interrupts_t::M_CAN_INT
uint8_t M_CAN_INT
Definition: canfd6.h:1468
canfd6_mcan_read_nextfifo
uint8_t canfd6_mcan_read_nextfifo(canfd6_t *ctx, canfd6_mcan_fifo_enum_t fifo_def, canfd6_mcan_rx_header_t *header, uint8_t data_payload[])
CAN FD 6 read next fifo function.
canfd6_mcan_interrupt_enable_t::HPME
uint8_t HPME
Definition: canfd6.h:1336
CANFD6_XID_EFEC_DISABLED
@ CANFD6_XID_EFEC_DISABLED
Definition: canfd6.h:1073
CANFD6_SID_SFEC_STORERXBUFORDEBUG
@ CANFD6_SID_SFEC_STORERXBUFORDEBUG
Definition: canfd6.h:1050
canfd6_mcan_interrupt_enable_t::TEFLE
uint8_t TEFLE
Definition: canfd6.h:1343
canfd6_mcan_interrupt_enable_t::EWE
uint8_t EWE
Definition: canfd6.h:1352
canfd6_mcan_interrupts_t::RF1W
uint8_t RF1W
Definition: canfd6.h:1287
canfd6_mcan_tx_header_t::MM
uint8_t MM
Definition: canfd6.h:1398
CANFD6_DEVICE_MODE_NORMAL
@ CANFD6_DEVICE_MODE_NORMAL
Definition: canfd6.h:1014
canfd6_device_interrupts_t::RESERVED3
uint8_t RESERVED3
Definition: canfd6.h:1484
CANFD6_DEV_CONFIG_WAKE_RISING_EDGE
@ CANFD6_DEV_CONFIG_WAKE_RISING_EDGE
Definition: canfd6.h:1164
CANFD6_DEV_CONFIG_GPO2_WATCHDOG
@ CANFD6_DEV_CONFIG_GPO2_WATCHDOG
Definition: canfd6.h:1152
canfd6_mcan_global_filter_configuration_t
CAN FD 6 Click Global Filter Configuration Register struct.
Definition: canfd6.h:1441
canfd6_mcan_interrupt_enable_t::DRXE
uint8_t DRXE
Definition: canfd6.h:1347
canfd6_mcan_global_filter_configuration_t::RRFE
uint8_t RRFE
Definition: canfd6.h:1447
canfd6_mcan_global_filter_configuration_t::RRFS
uint8_t RRFS
Definition: canfd6.h:1448
canfd6_mcan_read_datatimingfd_raw
void canfd6_mcan_read_datatimingfd_raw(canfd6_t *ctx, canfd6_mcan_data_timing_raw_t *data_timing)
CAN FD 6 read data timing fd raw function.
canfd6_device_interrupt_enable_t::CANHBATEN
uint8_t CANHBATEN
Definition: canfd6.h:1535
CANFD6_SID_SFEC_STORERX0
@ CANFD6_SID_SFEC_STORERX0
Definition: canfd6.h:1044
canfd6_mcan_read_datatimingfd_simple
void canfd6_mcan_read_datatimingfd_simple(canfd6_t *ctx, canfd6_mcan_data_timing_simple_t *data_timing)
CAN FD 6 read data timing fd simple function.
canfd6_wdt_timer_enum_t
canfd6_wdt_timer_enum_t
CAN FD 6 Click WDT timer enum.
Definition: canfd6.h:988
canfd6_mcan_tx_header_t::ESI
uint8_t ESI
Definition: canfd6.h:1392
canfd6_mcan_cccr_config_t::NISO
uint8_t NISO
Definition: canfd6.h:1266
canfd6_device_interrupts_t::LWU
uint8_t LWU
Definition: canfd6.h:1481
canfd6_device_interrupts_t::FRAME_OVF
uint8_t FRAME_OVF
Definition: canfd6.h:1479
canfd6_mcan_data_timing_raw_t::data_time_seg1_and_prop
uint8_t data_time_seg1_and_prop
Definition: canfd6.h:1189
canfd6_mcan_interrupts_t::EP
uint8_t EP
Definition: canfd6.h:1305
canfd6_mcan_cccr_config_t::MON
uint8_t MON
Definition: canfd6.h:1257
canfd6_mcan_rx_header_t::RTR
uint8_t RTR
Definition: canfd6.h:1370
canfd6_mcan_sid_filter_t::SFID1
uint16_t SFID1
Definition: canfd6.h:1415
canfd6_cfg_t
CAN FD 6 Click configuration object.
Definition: canfd6.h:927
CANFD6_MRAM_8_Byte_Data
@ CANFD6_MRAM_8_Byte_Data
Definition: canfd6.h:1026
canfd6_mcan_tx_header_t::DLC
uint8_t DLC
Definition: canfd6.h:1393
CANFD6_GFC_ACCEPT_INTO_RXFIFO1
@ CANFD6_GFC_ACCEPT_INTO_RXFIFO1
Definition: canfd6.h:1104
canfd6_mcan_cccr_config_t::TXP
uint8_t TXP
Definition: canfd6.h:1265
CANFD6_MRAM_32_Byte_Data
@ CANFD6_MRAM_32_Byte_Data
Definition: canfd6.h:1031
canfd6_gfc_no_match_behavior_t
canfd6_gfc_no_match_behavior_t
CAN FD 6 GFC enum.
Definition: canfd6.h:1102
canfd6_dev_config_wake_t
canfd6_dev_config_wake_t
CAN FD 6 wake config enum.
Definition: canfd6.h:1162
CANFD6_WDT_3S
@ CANFD6_WDT_3S
Definition: canfd6.h:991
CANFD6_XID_EFT_CLASSIC
@ CANFD6_XID_EFT_CLASSIC
Definition: canfd6.h:1091
canfd6_mcan_cccr_config_t::FDOE
uint8_t FDOE
Definition: canfd6.h:1260
CANFD6_WDT_600MS
@ CANFD6_WDT_600MS
Definition: canfd6.h:990
canfd6_mram_config_t
CAN FD 6 Click MRAM config.
Definition: canfd6.h:1227
canfd6_sid_sft_values_t
canfd6_sid_sft_values_t
CAN FD 6 SID SFT enum.
Definition: canfd6.h:1059
canfd6_mcan_interrupts_t::TEFW
uint8_t TEFW
Definition: canfd6.h:1295
canfd6_dev_config_t::nWKRQ_CONFIG
uint8_t nWKRQ_CONFIG
Definition: canfd6.h:1559
canfd6_mcan_read_nominaltiming_simple
void canfd6_mcan_read_nominaltiming_simple(canfd6_t *ctx, canfd6_mcan_nominal_timing_simple_t *nom_timing)
CAN FD 6 read nominal timing simple function.
canfd6_device_interrupts_t::PWRON
uint8_t PWRON
Definition: canfd6.h:1487
canfd6_device_interrupt_enable_t::word
uint32_t word
Definition: canfd6.h:1511
canfd6_mcan_fifo_enum_t
canfd6_mcan_fifo_enum_t
CAN FD 6 Click RX FIFO enum.
Definition: canfd6.h:977
canfd6_t::chip_select
pin_name_t chip_select
Definition: canfd6.h:918
canfd6_mcan_configure_datatiming_raw
void canfd6_mcan_configure_datatiming_raw(canfd6_t *ctx, canfd6_mcan_data_timing_raw_t *data_timing)
CAN FD 6 configure data timing raw function.
canfd6_mcan_data_timing_raw_t::data_bitrate_prescaler
uint8_t data_bitrate_prescaler
Definition: canfd6.h:1188
canfd6_mcan_read_rxbuffer
uint8_t canfd6_mcan_read_rxbuffer(canfd6_t *ctx, uint8_t buf_index, canfd6_mcan_rx_header_t *header, uint8_t data_payload[])
CAN FD 6 read rx buffer function.
canfd6_mcan_configure_nominaltiming_simple
void canfd6_mcan_configure_nominaltiming_simple(canfd6_t *ctx, canfd6_mcan_nominal_timing_simple_t *nom_timing)
CAN FD 6 configure nominal timing simple function.
canfd6_mcan_interrupts_t::RF1N
uint8_t RF1N
Definition: canfd6.h:1286
canfd6_mcan_cccr_config_t::CSR
uint8_t CSR
Definition: canfd6.h:1256
canfd6_mcan_interrupt_enable_t::RF0NE
uint8_t RF0NE
Definition: canfd6.h:1328
canfd6_mcan_interrupt_enable_t::ELOE
uint8_t ELOE
Definition: canfd6.h:1350
canfd6_device_interrupt_enable_t::CANBUSOPENEN
uint8_t CANBUSOPENEN
Definition: canfd6.h:1533
canfd6_mcan_xid_filter_t::EFEC
canfd6_xid_efec_values_t EFEC
Definition: canfd6.h:1432
canfd6_mcan_nominal_timing_raw_t::nominal_sync_jumpwidth
uint8_t nominal_sync_jumpwidth
Definition: canfd6.h:1218
canfd6_device_interrupt_enable_t::LWUEN
uint8_t LWUEN
Definition: canfd6.h:1521
canfd6_mcan_global_filter_configuration_t::ANFE
canfd6_gfc_no_match_behavior_t ANFE
Definition: canfd6.h:1449
canfd6_mcan_rx_header_t::ID
uint32_t ID
Definition: canfd6.h:1369
CANFD6_DEV_CONFIG_GPIO1_CONFIG_WDT_INPUT
@ CANFD6_DEV_CONFIG_GPIO1_CONFIG_WDT_INPUT
Definition: canfd6.h:1128
CANFD6_SID_SFEC_PRIORITYSTORERX1
@ CANFD6_SID_SFEC_PRIORITYSTORERX1
Definition: canfd6.h:1049
canfd6_mcan_rx_header_t::FDF
uint8_t FDF
Definition: canfd6.h:1376
canfd6_wdt_read
canfd6_wdt_timer_enum_t canfd6_wdt_read(canfd6_t *ctx)
CAN FD 6 wdt read function.
canfd6_sid_sfec_values_t
canfd6_sid_sfec_values_t
CAN FD 6 SID SFEC enum.
Definition: canfd6.h:1042
canfd6_device_interrupt_enable_t::UVIOEN
uint8_t UVIOEN
Definition: canfd6.h:1528
canfd6_device_interrupts_t::CANBUSOPEN
uint8_t CANBUSOPEN
Definition: canfd6.h:1493
CANFD6_MRAM_24_Byte_Data
@ CANFD6_MRAM_24_Byte_Data
Definition: canfd6.h:1030
canfd6_mcan_read_interrupt_enable
void canfd6_mcan_read_interrupt_enable(canfd6_t *ctx, canfd6_mcan_interrupt_enable_t *ie)
CAN FD 6 read interrupt enable function.
CANFD6_SID_SFEC_STORERX1
@ CANFD6_SID_SFEC_STORERX1
Definition: canfd6.h:1045
canfd6_cfg_t::mosi
pin_name_t mosi
Definition: canfd6.h:931
canfd6_device_read_mode
canfd6_device_mode_enum_t canfd6_device_read_mode(canfd6_t *ctx)
CAN FD 6 device read mode function.
canfd6_mcan_interrupt_enable_t::RF0FE
uint8_t RF0FE
Definition: canfd6.h:1330
canfd6_mcan_cccr_config_t
CAN FD 6 Click CCCR config.
Definition: canfd6.h:1247
canfd6_mcan_data_timing_simple_t::data_bitrate_prescaler
uint8_t data_bitrate_prescaler
Definition: canfd6.h:1176
canfd6_mcan_data_timing_raw_t::data_sync_jumpwidth
uint8_t data_sync_jumpwidth
Definition: canfd6.h:1191
canfd6_mcan_interrupt_enable_t::ARAE
uint8_t ARAE
Definition: canfd6.h:1357
CANFD6_DEV_CONFIG_GPO1_SPI_FAULT_INT
@ CANFD6_DEV_CONFIG_GPO1_SPI_FAULT_INT
Definition: canfd6.h:1115
canfd6_device_interrupts_t::VTWD
uint8_t VTWD
Definition: canfd6.h:1467
canfd6_mcan_read_sid_filter
err_t canfd6_mcan_read_sid_filter(canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_sid_filter_t *filter)
CAN FD 6 read sid filter function.
canfd6_mcan_read_xid_filter
err_t canfd6_mcan_read_xid_filter(canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_xid_filter_t *filter)
CAN FD 6 read xid filter function.
canfd6_device_interrupts_t::CANHBAT
uint8_t CANHBAT
Definition: canfd6.h:1495
canfd6_mcan_sid_filter_t::SFEC
canfd6_sid_sfec_values_t SFEC
Definition: canfd6.h:1416
canfd6_get_int_pin
uint8_t canfd6_get_int_pin(canfd6_t *ctx)
CAN FD 6 get int pin function.
canfd6_mcan_data_timing_raw_t
CAN FD 6 Click data timing raw structure.
Definition: canfd6.h:1187
canfd6_device_interrupts_t::GLOBALERR
uint8_t GLOBALERR
Definition: canfd6.h:1474
canfd6_mcan_global_filter_configuration_t::ANFS
canfd6_gfc_no_match_behavior_t ANFS
Definition: canfd6.h:1450
canfd6_mcan_interrupts_t::RF0L
uint8_t RF0L
Definition: canfd6.h:1285
canfd6_mcan_interrupt_enable_t::PEAE
uint8_t PEAE
Definition: canfd6.h:1355
canfd6_configure_cccr_register
void canfd6_configure_cccr_register(canfd6_t *ctx, canfd6_mcan_cccr_config_t *cccr_config)
CAN FD 6 configure cccr register function.
CANFD6_DEVICE_TEST_MODE_CONTROLLER
@ CANFD6_DEVICE_TEST_MODE_CONTROLLER
Definition: canfd6.h:1004
canfd6_mcan_rx_header_t::BRS
uint8_t BRS
Definition: canfd6.h:1375
canfd6_mram_config_t::xid_num_elements
uint8_t xid_num_elements
Definition: canfd6.h:1229
canfd6_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: canfd6.h:945
CANFD6_RXFIFO1
@ CANFD6_RXFIFO1
Definition: canfd6.h:979
canfd6_mcan_cccr_config_t::ASM
uint8_t ASM
Definition: canfd6.h:1254
canfd6_mcan_tx_header_t::RTR
uint8_t RTR
Definition: canfd6.h:1390
CANFD6_DEV_CONFIG_GPIO1_CONFIG_GPO
@ CANFD6_DEV_CONFIG_GPIO1_CONFIG_GPO
Definition: canfd6.h:1127
canfd6_mcan_interrupt_enable_t::BOE
uint8_t BOE
Definition: canfd6.h:1353
canfd6_device_clear_interrupts
void canfd6_device_clear_interrupts(canfd6_t *ctx, canfd6_device_interrupts_t *ir)
CAN FD 6 device clear interrupts function.
canfd6_dev_config_gpio1_t
canfd6_dev_config_gpio1_t
CAN FD 6 GPIO1 config enum.
Definition: canfd6.h:1126
canfd6_mcan_cccr_config_t::TEST
uint8_t TEST
Definition: canfd6.h:1259
canfd6_mcan_dlc_to_bytes
uint8_t canfd6_mcan_dlc_to_bytes(uint8_t input_dlc)
CAN FD 6 dlc to bytes function.
canfd6_mcan_nominal_timing_raw_t::nominal_time_seg1_and_prop
uint8_t nominal_time_seg1_and_prop
Definition: canfd6.h:1216
canfd6_mcan_interrupts_t::TEFN
uint8_t TEFN
Definition: canfd6.h:1294
canfd6_return_value_t
canfd6_return_value_t
CAN FD 6 Click return value data.
Definition: canfd6.h:955
canfd6_wkr_pin_state
void canfd6_wkr_pin_state(canfd6_t *ctx, canfd6_pin_state_t state)
CAN FD 6 wkr pin state function.
canfd6_t
CAN FD 6 Click context object.
Definition: canfd6.h:903
CANFD6_XID_EFEC_STORERXBUFORDEBUG
@ CANFD6_XID_EFEC_STORERXBUFORDEBUG
Definition: canfd6.h:1080
canfd6_cfg_t::spi_speed
uint32_t spi_speed
Definition: canfd6.h:944
CANFD6_SID_SFT_RANGE
@ CANFD6_SID_SFT_RANGE
Definition: canfd6.h:1063
CANFD6_MRAM_48_Byte_Data
@ CANFD6_MRAM_48_Byte_Data
Definition: canfd6.h:1032
canfd6_mcan_interrupt_enable_t::TCFE
uint8_t TCFE
Definition: canfd6.h:1338
canfd6_device_interrupt_enable_t::CANHCANLEN
uint8_t CANHCANLEN
Definition: canfd6.h:1536
canfd6_device_test_mode_enum_t
canfd6_device_test_mode_enum_t
CAN FD 6 Click device test enum.
Definition: canfd6.h:1001
canfd6_mram_config_t::rx0_element_size
canfd6_mram_elem_data_size_t rx0_element_size
Definition: canfd6.h:1231
CANFD6_SID_SFEC_DISABLED
@ CANFD6_SID_SFEC_DISABLED
Definition: canfd6.h:1043
canfd6_device_read_interrupt_enable
void canfd6_device_read_interrupt_enable(canfd6_t *ctx, canfd6_device_interrupt_enable_t *ie)
CAN FD 6 device read interrupt enable function.
canfd6_device_interrupt_enable_t::RESERVED1
uint8_t RESERVED1
Definition: canfd6.h:1514
canfd6_xid_eft_values_t
canfd6_xid_eft_values_t
CAN FD 6 XID EFT enum.
Definition: canfd6.h:1089
canfd6_dev_config_t::GPIO1_GPO_CONFIG
canfd6_dev_config_gpo1_t GPIO1_GPO_CONFIG
Definition: canfd6.h:1561
canfd6_read_cccr_register
void canfd6_read_cccr_register(canfd6_t *ctx, canfd6_mcan_cccr_config_t *cccr_config)
CAN FD 6 read cccr register function.
canfd6_mcan_cccr_config_t::BRSE
uint8_t BRSE
Definition: canfd6.h:1261
canfd6_mcan_rx_header_t
CAN FD 6 Click CAN message header.
Definition: canfd6.h:1368
canfd6_device_interrupt_enable_t::WKERREN
uint8_t WKERREN
Definition: canfd6.h:1520
canfd6_dev_config_wdt_action_t
canfd6_dev_config_wdt_action_t
CAN FD 6 WDT action enum.
Definition: canfd6.h:1137
canfd6_mcan_interrupts_t::HPM
uint8_t HPM
Definition: canfd6.h:1290
canfd6_device_interrupt_enable_t::FRAME_OVFEN
uint8_t FRAME_OVFEN
Definition: canfd6.h:1519
canfd6_device_interrupt_enable_t::CANBUSBATEN
uint8_t CANBUSBATEN
Definition: canfd6.h:1531
canfd6_dev_config_t::RESERVED4
uint8_t RESERVED4
Definition: canfd6.h:1570
canfd6_mcan_interrupt_enable_t::EPE
uint8_t EPE
Definition: canfd6.h:1351
canfd6_mcan_interrupt_enable_t::TFEE
uint8_t TFEE
Definition: canfd6.h:1339
canfd6_mcan_interrupts_t::word
uint32_t word
Definition: canfd6.h:1279
canfd6_device_read_version
uint16_t canfd6_device_read_version(canfd6_t *ctx)
CAN FD 6 device read version function.
canfd6_mcan_cccr_config_t::DAR
uint8_t DAR
Definition: canfd6.h:1258
canfd6_device_interrupts_t::CANBUSBAT
uint8_t CANBUSBAT
Definition: canfd6.h:1491
canfd6_device_interrupts_t::RESERVED2
uint8_t RESERVED2
Definition: canfd6.h:1478
canfd6_mcan_interrupts_t::TEFL
uint8_t TEFL
Definition: canfd6.h:1297
canfd6_device_interrupt_enable_t::ECCERREN
uint8_t ECCERREN
Definition: canfd6.h:1523
CANFD6_RXFIFO0
@ CANFD6_RXFIFO0
Definition: canfd6.h:978
canfd6_mcan_interrupts_t::TEFF
uint8_t TEFF
Definition: canfd6.h:1296
CANFD6_OK
@ CANFD6_OK
Definition: canfd6.h:956
canfd6_t::rst
digital_out_t rst
Definition: canfd6.h:907
canfd6_mcan_cccr_config_t::reserved3
uint8_t reserved3
Definition: canfd6.h:1262
canfd6_mcan_data_timing_simple_t
CAN FD 6 Click data timing simple structure.
Definition: canfd6.h:1175
CANFD6_SID_SFT_DISABLED
@ CANFD6_SID_SFT_DISABLED
Definition: canfd6.h:1060
canfd6_mram_config_t::tx_buffer_num_elements
uint8_t tx_buffer_num_elements
Definition: canfd6.h:1237
canfd6_mcan_configure_nominaltiming_raw
void canfd6_mcan_configure_nominaltiming_raw(canfd6_t *ctx, canfd6_mcan_nominal_timing_raw_t *nom_timing)
CAN FD 6 configure nominal timing raw function.
canfd6_mcan_interrupt_enable_t::BECE
uint8_t BECE
Definition: canfd6.h:1348
canfd6_device_interrupt_enable_t::CANBUSGNDEN
uint8_t CANBUSGNDEN
Definition: canfd6.h:1532
canfd6_dev_config_t::CLK_REF
uint8_t CLK_REF
Definition: canfd6.h:1571
CANFD6_MRAM_12_Byte_Data
@ CANFD6_MRAM_12_Byte_Data
Definition: canfd6.h:1027
canfd6_mcan_cccr_config_t::reserved
uint8_t reserved
Definition: canfd6.h:1253
CANFD6_SID_SFT_DUALID
@ CANFD6_SID_SFT_DUALID
Definition: canfd6.h:1062
canfd6_mcan_rx_header_t::reserved
uint8_t reserved
Definition: canfd6.h:1377
canfd6_wkp_pin_state
void canfd6_wkp_pin_state(canfd6_t *ctx, canfd6_pin_state_t state)
CAN FD 6 wkp pin state function.
canfd6_device_read_testmode
canfd6_device_test_mode_enum_t canfd6_device_read_testmode(canfd6_t *ctx)
CAN FD 6 device read testmode function.
canfd6_mcan_interrupts_t::MRAF
uint8_t MRAF
Definition: canfd6.h:1299
CANFD6_MRAM_16_Byte_Data
@ CANFD6_MRAM_16_Byte_Data
Definition: canfd6.h:1028
canfd6_dev_config_t::RESERVED0
uint8_t RESERVED0
Definition: canfd6.h:1554
CANFD6_DEV_CONFIG_WDT_ACTION_PULSE_WDT_OUT
@ CANFD6_DEV_CONFIG_WDT_ACTION_PULSE_WDT_OUT
Definition: canfd6.h:1140
canfd6_mram_config_t::rx0_num_elements
uint8_t rx0_num_elements
Definition: canfd6.h:1230
canfd6_mcan_sid_filter_t::reserved
uint8_t reserved
Definition: canfd6.h:1414
canfd6_default_cfg
void canfd6_default_cfg(canfd6_t *ctx)
CAN FD 6 default configuration function.
canfd6_mcan_tx_header_t::BRS
uint8_t BRS
Definition: canfd6.h:1394
canfd6_device_interrupt_enable_t::PWRONEN
uint8_t PWRONEN
Definition: canfd6.h:1527
CANFD6_DEVICE_TEST_MODE_NORMAL
@ CANFD6_DEVICE_TEST_MODE_NORMAL
Definition: canfd6.h:1002
canfd6_device_interrupts_t::ECCERR
uint8_t ECCERR
Definition: canfd6.h:1483
CANFD6_DEVICE_MODE_STANDBY
@ CANFD6_DEVICE_MODE_STANDBY
Definition: canfd6.h:1015
canfd6_device_interrupt_enable_t::CANLGNDEN
uint8_t CANLGNDEN
Definition: canfd6.h:1534
canfd6_mcan_interrupts_t::reserved
uint8_t reserved
Definition: canfd6.h:1312
canfd6_dev_config_t::word
uint32_t word
Definition: canfd6.h:1551
canfd6_device_interrupts_t::SMS
uint8_t SMS
Definition: canfd6.h:1490
canfd6_device_interrupts_t::UVSUP
uint8_t UVSUP
Definition: canfd6.h:1489
CANFD6_XID_EFT_RANGENOMASK
@ CANFD6_XID_EFT_RANGENOMASK
Definition: canfd6.h:1090
canfd6_device_interrupts_t::CANBUSTERMOPEN
uint8_t CANBUSTERMOPEN
Definition: canfd6.h:1497
CANFD6_DEV_CONFIG_GPO2_MCAN_INT0
@ CANFD6_DEV_CONFIG_GPO2_MCAN_INT0
Definition: canfd6.h:1151
canfd6_mcan_interrupts_t::PED
uint8_t PED
Definition: canfd6.h:1310
canfd6_cfg_t::miso
pin_name_t miso
Definition: canfd6.h:930
canfd6_mram_config_t::rx_buf_element_size
canfd6_mram_elem_data_size_t rx_buf_element_size
Definition: canfd6.h:1235
canfd6_enable_protected_registers
err_t canfd6_enable_protected_registers(canfd6_t *ctx)
CAN FD 6 enable protected registers function.
canfd6_wdt_disable
void canfd6_wdt_disable(canfd6_t *ctx)
CAN FD 6 wdt disable function.
canfd6_mcan_xid_filter_t::EFID2
uint32_t EFID2
Definition: canfd6.h:1428
canfd6_mcan_interrupt_enable_t::TCE
uint8_t TCE
Definition: canfd6.h:1337
canfd6_device_interrupt_enable_t::CANINTEN
uint8_t CANINTEN
Definition: canfd6.h:1522
canfd6_mcan_data_timing_raw_t::data_time_seg2
uint8_t data_time_seg2
Definition: canfd6.h:1190
CANFD6_XID_EFEC_STORERX1
@ CANFD6_XID_EFEC_STORERX1
Definition: canfd6.h:1075
canfd6_mcan_sid_filter_t
CAN FD 6 Click standard ID filter struct.
Definition: canfd6.h:1407
canfd6_mcan_data_timing_raw_t::tdc_filter
uint8_t tdc_filter
Definition: canfd6.h:1193
canfd6_device_interrupt_enable_t::RESERVED4
uint8_t RESERVED4
Definition: canfd6.h:1524
canfd6_device_interrupts_t::CANDOM
uint8_t CANDOM
Definition: canfd6.h:1475
canfd6_pin_state_t
canfd6_pin_state_t
CAN FD 6 Click pin states.
Definition: canfd6.h:966
canfd6_mcan_interrupt_enable_t::TOOE
uint8_t TOOE
Definition: canfd6.h:1346
canfd6_mram_elem_data_size_t
canfd6_mram_elem_data_size_t
CAN FD 6 Click MRAM element data size.
Definition: canfd6.h:1025
canfd6_device_set_mode
err_t canfd6_device_set_mode(canfd6_t *ctx, canfd6_device_mode_enum_t mode_define)
CAN FD 6 device set mode function.
canfd6_mcan_sid_filter_t::SFT
canfd6_sid_sfec_values_t SFT
Definition: canfd6.h:1417
canfd6_mcan_tx_header_t::XTD
uint8_t XTD
Definition: canfd6.h:1391
canfd6_dev_config_t::RESERVED2
uint8_t RESERVED2
Definition: canfd6.h:1562
CANFD6_XID_EFT_RANGE
@ CANFD6_XID_EFT_RANGE
Definition: canfd6.h:1093
canfd6_mcan_interrupt_enable_t::RF1WE
uint8_t RF1WE
Definition: canfd6.h:1333
canfd6_device_interrupts_t::CANBUSGND
uint8_t CANBUSGND
Definition: canfd6.h:1492
canfd6_mcan_clear_interrupts_all
void canfd6_mcan_clear_interrupts_all(canfd6_t *ctx)
CAN FD 6 clear interrupts all function.
canfd6_mcan_interrupt_enable_t::reserved
uint8_t reserved
Definition: canfd6.h:1358
canfd6_mram_config_t::rx1_element_size
canfd6_mram_elem_data_size_t rx1_element_size
Definition: canfd6.h:1233
canfd6_dev_config_t::WAKE_CONFIG
canfd6_dev_config_wake_t WAKE_CONFIG
Definition: canfd6.h:1573
canfd6_dev_config_t::nWKRQ_VOLTAGE
uint8_t nWKRQ_VOLTAGE
Definition: canfd6.h:1567
CANFD6_SID_SFEC_PRIORITY
@ CANFD6_SID_SFEC_PRIORITY
Definition: canfd6.h:1047
canfd6_device_interrupt_enable_t::RESERVED3
uint8_t RESERVED3
Definition: canfd6.h:1518
canfd6_mcan_interrupt_enable_t::MRAFE
uint8_t MRAFE
Definition: canfd6.h:1345
canfd6_mcan_data_timing_simple_t::data_tqbefore_samplepoint
uint8_t data_tqbefore_samplepoint
Definition: canfd6.h:1177
canfd6_disable_protected_registers
err_t canfd6_disable_protected_registers(canfd6_t *ctx)
CAN FD 6 disable protected registers function.
canfd6_mcan_xid_filter_t
CAN FD 6 Click extended ID filter struct.
Definition: canfd6.h:1427
canfd6_dev_config_gpo2_t
canfd6_dev_config_gpo2_t
CAN FD 6 GPO2 config enum.
Definition: canfd6.h:1149
canfd6_mcan_clear_interrupts
void canfd6_mcan_clear_interrupts(canfd6_t *ctx, canfd6_mcan_interrupts_t *ir)
CAN FD 6 clear interrupts function.
CANFD6_WDT_60MS
@ CANFD6_WDT_60MS
Definition: canfd6.h:989
CANFD6_DEV_CONFIG_GPO1_UVO_OR_THERMAL_INT
@ CANFD6_DEV_CONFIG_GPO1_UVO_OR_THERMAL_INT
Definition: canfd6.h:1117
canfd6_mcan_interrupts_t::WDI
uint8_t WDI
Definition: canfd6.h:1308
canfd6_dev_config_t::WD_BIT_RESET
uint8_t WD_BIT_RESET
Definition: canfd6.h:1566
canfd6_device_interrupts_t::CANHCANL
uint8_t CANHCANL
Definition: canfd6.h:1496
canfd6_mcan_interrupt_enable_t::RF0LE
uint8_t RF0LE
Definition: canfd6.h:1331
canfd6_cfg_t::cs
pin_name_t cs
Definition: canfd6.h:933
canfd6_dev_config_t
CAN FD 6 Click device config struct.
Definition: canfd6.h:1548