canfd2  2.0.0.0
canfd2.h
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1 /*
2  * MikroSDK - MikroE Software Development Kit
3  * Copyright© 2020 MikroElektronika d.o.o.
4  *
5  * Permission is hereby granted, free of charge, to any person
6  * obtaining a copy of this software and associated documentation
7  * files (the "Software"), to deal in the Software without restriction,
8  * including without limitation the rights to use, copy, modify, merge,
9  * publish, distribute, sublicense, and/or sell copies of the Software,
10  * and to permit persons to whom the Software is furnished to do so,
11  * subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be
14  * included in all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19  * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22  * OR OTHER DEALINGS IN THE SOFTWARE.
23  */
32 // ----------------------------------------------------------------------------
33 
34 #ifndef CANFD2_H
35 #define CANFD2_H
36 
37 #include "drv_digital_out.h"
38 #include "drv_digital_in.h"
39 #include "drv_uart.h"
40 #include "drv_spi_master.h"
41 #include "spi_specifics.h"
42 
43 // -------------------------------------------------------------- PUBLIC MACROS
53 #define CANFD2_MAP_MIKROBUS( cfg, mikrobus ) \
54  cfg.tx_pin = MIKROBUS( mikrobus, MIKROBUS_TX ); \
55  cfg.rx_pin = MIKROBUS( mikrobus, MIKROBUS_RX ); \
56  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
57  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
58  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
59  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS )
60 
66 #define CANFD2_OK 0
67 #define CANFD2_ERROR -1
68 
74 #define CANFD2_DRV_TX_BUFFER_SIZE 100
75 #define CANFD2_DRV_RX_BUFFER_SIZE 300
76 
82 #define CANFD2_REG_MODE_CTRL 0x01
83 #define CANFD2_REG_HW_CTRL 0x02
84 #define CANFD2_REG_TXD_TO_CTRL 0x03
85 #define CANFD2_REG_SUPPLY_CTRL 0x04
86 
92 #define CANFD2_REG_SWK_CTRL_1 0x05
93 #define CANFD2_REG_SWK_CTRL_2 0x06
94 #define CANFD2_REG_SWK_ID3_CTRL 0x07
95 #define CANFD2_REG_SWK_ID2_CTRL 0x08
96 #define CANFD2_REG_SWK_ID1_CTRL 0x09
97 #define CANFD2_REG_SWK_ID0_CTRL 0x0A
98 #define CANFD2_REG_SWK_MASK_ID3_CTRL 0x0B
99 #define CANFD2_REG_SWK_MASK_ID2_CTRL 0x0C
100 #define CANFD2_REG_SWK_MASK_ID1_CTRL 0x0D
101 #define CANFD2_REG_SWK_MASK_ID0_CTRL 0x0E
102 #define CANFD2_REG_SWK_DLC_CTRL 0x0F
103 #define CANFD2_REG_SWK_DATA7_CTRL 0x10
104 #define CANFD2_REG_SWK_DATA6_CTRL 0x11
105 #define CANFD2_REG_SWK_DATA5_CTRL 0x12
106 #define CANFD2_REG_SWK_DATA4_CTRL 0x13
107 #define CANFD2_REG_SWK_DATA3_CTRL 0x14
108 #define CANFD2_REG_SWK_DATA2_CTRL 0x15
109 #define CANFD2_REG_SWK_DATA1_CTRL 0x16
110 #define CANFD2_REG_SWK_DATA0_CTRL 0x17
111 
117 #define CANFD2_REG_TRANS_STAT 0x18
118 #define CANFD2_REG_TRANS_UV_STAT 0x19
119 #define CANFD2_REG_ERR_STAT 0x1A
120 #define CANFD2_REG_WAKE_STAT 0x1B
121 
127 #define CANFD2_REG_SWK_STAT 0x1C
128 #define CANFD2_REG_SWK_ECNT_STAT 0x1D
129 
135 #define CANFD2_CTRL_MODE_SLEEP 0x01
136 #define CANFD2_CTRL_MODE_STANDBY 0x02
137 #define CANFD2_CTRL_MODE_REC_ONLY 0x04
138 #define CANFD2_CTRL_MODE_NORMAL_OP 0x08
139 
145 #define CANFD2_HW_CTRL_VBAT_CON 0x01
146 #define CANFD2_HW_CTRL_WAKE_TOG 0x02
147 #define CANFD2_HW_CTRL_LWU_POS 0x20
148 #define CANFD2_HW_CTRL_LWU_NEG 0x40
149 #define CANFD2_HW_CTRL_STTS_EN 0x80
150 
156 #define CANFD2_TXD_TO_1_4 0x01
157 #define CANFD2_TXD_TO_2_5 0x02
158 #define CANFD2_TXD_TO_5_10 0x03
159 #define CANFD2_TXD_TO_DISABLE 0x04
160 
166 #define CANFD2_SUP_CTRL_VCC_UV_T_100 0x01
167 #define CANFD2_SUP_CTRL_VCC_UV_T_200 0x02
168 #define CANFD2_SUP_CTRL_VCC_UV_T_300 0x03
169 #define CANFD2_SUP_CTRL_VCC_UV_T_400 0x04
170 #define CANFD2_SUP_CTRL_VCC_UV_T_500 0x05
171 #define CANFD2_SUP_CTRL_VCC_UV_T_600 0x06
172 #define CANFD2_SUP_CTRL_VCC_UV_T_700 0x07
173 #define CANFD2_SUP_CTRL_VCC_UV_T_800 0x08
174 #define CANFD2_SUP_CTRL_VCC_UV_T_900 0x09
175 #define CANFD2_SUP_CTRL_VCC_UV_T_1000 0x0A
176 #define CANFD2_SUP_CTRL_VCC_UV_T_1100 0x0B
177 #define CANFD2_SUP_CTRL_VCC_UV_T_1200 0x0C
178 #define CANFD2_SUP_CTRL_VCC_UV_T_1300 0x0D
179 #define CANFD2_SUP_CTRL_VCC_UV_T_1400 0x0E
180 #define CANFD2_SUP_CTRL_VCC_UV_T_1500 0x0F
181 
182 #define CANFD2_SUP_CTRL_VIO_UV_T_100 0x10
183 #define CANFD2_SUP_CTRL_VIO_UV_T_200 0x20
184 #define CANFD2_SUP_CTRL_VIO_UV_T_300 0x30
185 #define CANFD2_SUP_CTRL_VIO_UV_T_400 0x40
186 #define CANFD2_SUP_CTRL_VIO_UV_T_500 0x50
187 #define CANFD2_SUP_CTRL_VIO_UV_T_600 0x60
188 #define CANFD2_SUP_CTRL_VIO_UV_T_700 0x70
189 #define CANFD2_SUP_CTRL_VIO_UV_T_800 0x80
190 #define CANFD2_SUP_CTRL_VIO_UV_T_900 0x90
191 #define CANFD2_SUP_CTRL_VIO_UV_T_1000 0xA0
192 #define CANFD2_SUP_CTRL_VIO_UV_T_1100 0xB0
193 #define CANFD2_SUP_CTRL_VIO_UV_T_1200 0xC0
194 #define CANFD2_SUP_CTRL_VIO_UV_T_1300 0xD0
195 #define CANFD2_SUP_CTRL_VIO_UV_T_1400 0xE0
196 #define CANFD2_SUP_CTRL_VIO_UV_T_1500 0xF0
197 
203 #define CANFD2_SWK_CTRL_1_CFG_VAL 0x01
204 
210 #define CANFD2_SWK_CTRL_2_BR_125K 0x01
211 #define CANFD2_SWK_CTRL_2_BR_250K 0x02
212 #define CANFD2_SWK_CTRL_2_BR_500K 0x03
213 #define CANFD2_SWK_CTRL_2_BR_1M 0x04
214 #define CANFD2_SWK_CTRL_2_BR_RATIO_4 0x00
215 #define CANFD2_SWK_CTRL_2_BR_RATIO_10 0x10
216 #define CANFD2_SWK_CTRL_2_SWK_EN 0x80
217 
223 #define CANFD2_SWK_ID3_CTRL_IDE 0x20
224 
230 #define CANFD2_SWK_DLC_CTRL_DATA_BYTES_0 0x00
231 #define CANFD2_SWK_DLC_CTRL_DATA_BYTES_1 0x01
232 #define CANFD2_SWK_DLC_CTRL_DATA_BYTES_2 0x02
233 #define CANFD2_SWK_DLC_CTRL_DATA_BYTES_3 0x03
234 #define CANFD2_SWK_DLC_CTRL_DATA_BYTES_4 0x04
235 #define CANFD2_SWK_DLC_CTRL_DATA_BYTES_5 0x05
236 #define CANFD2_SWK_DLC_CTRL_DATA_BYTES_6 0x06
237 #define CANFD2_SWK_DLC_CTRL_DATA_BYTES_7 0x07
238 #define CANFD2_SWK_DLC_CTRL_DATA_BYTES_8 0x08
239 
245 #define CANFD2_TRANS_STAT_TSD 0x02
246 #define CANFD2_TRANS_STAT_TXD_TO 0x04
247 #define CANFD2_TRANS_STAT_POR 0x80
248 
254 #define CANFD2_TRANS_UV_STAT_VIO_STUV 0x01
255 #define CANFD2_TRANS_UV_STAT_VIO_LTUV 0x02
256 #define CANFD2_TRANS_UV_STAT_VCC_STUV 0x10
257 #define CANFD2_TRANS_UV_STAT_VCC_LTUV 0x20
258 #define CANFD2_TRANS_UV_STAT_VBAT_UV 0x80
259 
265 #define CANFD2_ERR_STAT_CMD_ERR 0x01
266 #define CANFD2_ERR_STAT_COM_ERR 0x02
267 
273 #define CANFD2_WAKE_STAT_WUF 0x01
274 #define CANFD2_WAKE_STAT_WUP 0x02
275 #define CANFD2_WAKE_STAT_LWU 0x04
276 #define CANFD2_WAKE_STAT_LWU_DIR 0x08
277 
283 #define CANFD2_SWK_STAT_SWK_ACT 0x01
284 #define CANFD2_SWK_STAT_CANSIL 0x02
285 #define CANFD2_SWK_STAT_CANTO 0x04
286 #define CANFD2_SWK_STAT_SYNC 0x08
287 #define CANFD2_SWK_STAT_SYSERR 0x10
288 
294 #define CANFD2_OP_MODE_SLEEP 0x01
295 #define CANFD2_OP_MODE_STANDBY 0x02
296 #define CANFD2_OP_MODE_RECEIVE_ONLY 0x03
297 #define CANFD2_OP_MODE_NORMAL 0x04
298 #define CANFD2_OP_MODE_UNKNOWN 0x05
299 
300 #define DUMMY 0
301 #define CANFD2_READ_CMD_MASK 0x7F
302 #define CANFD2_WRITE_CMD 0x80
303 
313 #define CANFD2_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
314 #define CANFD2_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
315 
316 /* \} */ // End group macro
317 // --------------------------------------------------------------- PUBLIC TYPES
325 typedef struct
326 {
327  // Output pins
328 
329  digital_out_t cs;
330 
331  // Modules
332 
333  uart_t uart;
334  spi_master_t spi;
335  pin_name_t chip_select;
336 
337  uint8_t uart_rx_buffer[ CANFD2_DRV_RX_BUFFER_SIZE ];
338  uint8_t uart_tx_buffer[ CANFD2_DRV_TX_BUFFER_SIZE ];
339 
340 } canfd2_t;
341 
345 typedef struct
346 {
347  // Communication gpio pins
348 
349  pin_name_t rx_pin;
350  pin_name_t tx_pin;
351  pin_name_t miso;
352  pin_name_t mosi;
353  pin_name_t sck;
354  pin_name_t cs;
355 
356  // static variable
357 
358  uint32_t baud_rate; // Clock speed.
360  uart_data_bits_t data_bit; // Data bits.
361  uart_parity_t parity_bit; // Parity bit.
362  uart_stop_bits_t stop_bit; // Stop bits.
363 
364  uint32_t spi_speed;
365  spi_master_mode_t spi_mode;
366  spi_master_chip_select_polarity_t cs_polarity;
367 
368 } canfd2_cfg_t;
369 
373 typedef uint8_t canfd2_error_t;
374  // End types group
376 // ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
377 
383 #ifdef __cplusplus
384 extern "C"{
385 #endif
386 
396 
405 err_t canfd2_init ( canfd2_t *ctx, canfd2_cfg_t *cfg );
406 
414 void canfd2_generic_write ( canfd2_t *ctx, uint8_t *data_buf, uint16_t len );
415 
425 int32_t canfd2_generic_read ( canfd2_t *ctx, uint8_t *data_buf, uint16_t max_len );
426 
438 void canfd2_generic_transfer ( canfd2_t *ctx, uint8_t *wr_buf, uint16_t wr_len, uint8_t *rd_buf, uint16_t rd_len );
439 
451 uint8_t canfd2_read_data ( canfd2_t *ctx, uint8_t reg_addr );
452 
467 void canfd2_write_data ( canfd2_t *ctx, uint8_t reg_addr, uint8_t write_data );
468 
483 void canfd2_set_mode ( canfd2_t *ctx, uint8_t op_mode );
484 
500 uint8_t canfd2_get_mode ( canfd2_t *ctx );
501 
502 #ifdef __cplusplus
503 }
504 #endif
505 #endif // _CANFD2_H_
506  // End public_function group
509 
510 // ------------------------------------------------------------------------- END
canfd2_t
Click ctx object definition.
Definition: canfd2.h:326
canfd2_cfg_setup
void canfd2_cfg_setup(canfd2_cfg_t *cfg)
Config Object Initialization function.
canfd2_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: canfd2.h:365
canfd2_cfg_t::cs
pin_name_t cs
Definition: canfd2.h:354
canfd2_t::chip_select
pin_name_t chip_select
Definition: canfd2.h:335
spi_specifics.h
This file contains SPI specific macros, functions, etc.
canfd2_cfg_t::tx_pin
pin_name_t tx_pin
Definition: canfd2.h:350
canfd2_cfg_t::baud_rate
uint32_t baud_rate
Definition: canfd2.h:358
canfd2_generic_write
void canfd2_generic_write(canfd2_t *ctx, uint8_t *data_buf, uint16_t len)
Generic write function.
canfd2_cfg_t::sck
pin_name_t sck
Definition: canfd2.h:353
canfd2_cfg_t::mosi
pin_name_t mosi
Definition: canfd2.h:352
canfd2_write_data
void canfd2_write_data(canfd2_t *ctx, uint8_t reg_addr, uint8_t write_data)
Generic write the byte of data function.
canfd2_error_t
uint8_t canfd2_error_t
Error type.
Definition: canfd2.h:373
canfd2_cfg_t::spi_speed
uint32_t spi_speed
Definition: canfd2.h:364
CANFD2_DRV_RX_BUFFER_SIZE
#define CANFD2_DRV_RX_BUFFER_SIZE
Definition: canfd2.h:75
canfd2_cfg_t
Click configuration structure definition.
Definition: canfd2.h:346
canfd2_cfg_t::parity_bit
uart_parity_t parity_bit
Definition: canfd2.h:361
canfd2_t::cs
digital_out_t cs
Definition: canfd2.h:329
canfd2_cfg_t::stop_bit
uart_stop_bits_t stop_bit
Definition: canfd2.h:362
canfd2_cfg_t::rx_pin
pin_name_t rx_pin
Definition: canfd2.h:349
canfd2_cfg_t::data_bit
uart_data_bits_t data_bit
Definition: canfd2.h:360
canfd2_generic_read
int32_t canfd2_generic_read(canfd2_t *ctx, uint8_t *data_buf, uint16_t max_len)
Generic read function.
canfd2_cfg_t::uart_blocking
bool uart_blocking
Definition: canfd2.h:359
canfd2_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: canfd2.h:366
canfd2_t::spi
spi_master_t spi
Definition: canfd2.h:334
CANFD2_DRV_TX_BUFFER_SIZE
#define CANFD2_DRV_TX_BUFFER_SIZE
Definition: canfd2.h:74
canfd2_init
err_t canfd2_init(canfd2_t *ctx, canfd2_cfg_t *cfg)
Initialization function.
canfd2_cfg_t::miso
pin_name_t miso
Definition: canfd2.h:351
canfd2_set_mode
void canfd2_set_mode(canfd2_t *ctx, uint8_t op_mode)
Set operating mode function.
canfd2_read_data
uint8_t canfd2_read_data(canfd2_t *ctx, uint8_t reg_addr)
Generic read the byte of data function.
canfd2_t::uart
uart_t uart
Definition: canfd2.h:333
canfd2_get_mode
uint8_t canfd2_get_mode(canfd2_t *ctx)
Get operating mode function.
canfd2_generic_transfer
void canfd2_generic_transfer(canfd2_t *ctx, uint8_t *wr_buf, uint16_t wr_len, uint8_t *rd_buf, uint16_t rd_len)
Generic transfer function.