ecg_gsr  2.0.0.0
ECG_GSR.h
Go to the documentation of this file.
1 /****************************************************************************
2 **
3 ** Copyright (C) 2021 MikroElektronika d.o.o.
4 ** Contact: https://www.mikroe.com/contact
5 **
6 ** This file is part of the mikroSDK package
7 **
8 ** Commercial License Usage
9 **
10 ** Licensees holding valid commercial NECTO compilers AI licenses may use this
11 ** file in accordance with the commercial license agreement provided with the
12 ** Software or, alternatively, in accordance with the terms contained in
13 ** a written agreement between you and The mikroElektronika Company.
14 ** For licensing terms and conditions see
15 ** https://www.mikroe.com/legal/software-license-agreement.
16 ** For further information use the contact form at
17 ** https://www.mikroe.com/contact.
18 **
19 **
20 ** GNU Lesser General Public License Usage
21 **
22 ** Alternatively, this file may be used for
23 ** non-commercial projects under the terms of the GNU Lesser
24 ** General Public License version 3 as published by the Free Software
25 ** Foundation: https://www.gnu.org/licenses/lgpl-3.0.html.
26 **
27 ** The above copyright notice and this permission notice shall be
28 ** included in all copies or substantial portions of the Software.
29 **
30 ** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
31 ** OF MERCHANTABILITY, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED
32 ** TO THE WARRANTIES FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
33 ** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
34 ** DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT
35 ** OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
36 ** OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
37 **
38 ****************************************************************************/
44 // ----------------------------------------------------------------------------
45 
46 #ifndef _ECG_GSR_H_
47 #define _ECG_GSR_H_
48 
49 #ifdef __cplusplus
50 extern "C"{
51 #endif
52 
53 #include "drv_digital_out.h"
54 #include "drv_digital_in.h"
55 #include "drv_i2c_master.h"
56 
57 // -------------------------------------------------------------- PUBLIC MACROS
58 
79 #define ECG_GSR_SLAVE_ADDRESS 0x30
80  // ecg_gsr_cfg
81 
92 #define ECG_GSR_MAP_MIKROBUS( cfg, mikrobus ) \
93  cfg.scl_pin = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
94  cfg.sda_pin = MIKROBUS( mikrobus, MIKROBUS_SDA ); \
95  cfg.enable_pin = MIKROBUS( mikrobus, MIKROBUS_CS );
96 
97  // ecg_gsr_map
99  // ecg_gsr
101 
102 
107 #define ECG_GSR_RETVAL uint8_t
108 
114 #define ECG_GSR_GPIO_SYNC_REG 0x0F
115 #define ECG_GSR_LED_CFG_REG 0x10
116 #define ECG_GSR_LED_WAIT_LOW_REG 0x11
117 #define ECG_GSR_LED1_CURRL_REG 0x12
118 #define ECG_GSR_LED1_CURRH_REG 0x13
119 #define ECG_GSR_LED2_CURRL_REG 0x14
120 #define ECG_GSR_LED2_CURRH_REG 0x15
121 #define ECG_GSR_LED3_CURRL_REG 0x16
122 #define ECG_GSR_LED3_CURRH_REG 0x17
123 #define ECG_GSR_LED4_CURRL_REG 0x18
124 #define ECG_GSR_LED4_CURRH_REG 0x19
125 #define ECG_GSR_LED12_MODE_REG 0x2C
126 #define ECG_GSR_LED34_MODE_REG 0x2D
127 #define ECG_GSR_MAN_SEQ_CFG_REG 0x2E
128 #define ECG_GSR_PD_CFG_REG 0x1A
129 #define ECG_GSR_PDOFFX_LEDOFF_REG 0x1B
130 #define ECG_GSR_PDOFFX_LEDON_REG 0x1C
131 #define ECG_GSR_PD_AMPRCCFG_REG 0x1D
132 #define ECG_GSR_PD_AMPCFG_REG 0x1E
133 #define ECG_GSR_OFE1_PD_THCFG_REG 0x1F
134 #define ECG_GSR_SEQ_CNT_REG 0x30
135 #define ECG_GSR_SEQ_DIV_REG 0x31
136 #define ECG_GSR_SEQ_START_REG 0x32
137 #define ECG_GSR_SEQ_PER_REG 0x33
138 #define ECG_GSR_SEQ_LED_ST_REG 0x34
139 #define ECG_GSR_SEQ_LED_STO_REG 0x35
140 #define ECG_GSR_SEQ_SECLED_STA_REG 0x36
141 #define ECG_GSR_SEQ_SECLED_STO_REG 0x37
142 #define ECG_GSR_SEQ_ITG_STA_REG 0x38
143 #define ECG_GSR_SEQ_ITG_STO_REG 0x39
144 #define ECG_GSR_SEQ_SDP1_STA_REG 0x3A
145 #define ECG_GSR_SEQ_SDP1_STO_REG 0x3B
146 #define ECG_GSR_SEQ_SDP2_STA_REG 0x3C
147 #define ECG_GSR_SEQ_SDP2_STO_REG 0x3D
148 #define ECG_GSR_SEQ_SDM1_STA_REG 0x3E
149 #define ECG_GSR_SEQ_SDM1_STO_REG 0x3F
150 #define ECG_GSR_SEQ_SDM2_STA_REG 0x40
151 #define ECG_GSR_SEQ_SDM2_STO_REG 0x41
152 #define ECG_GSR_SEQ_ADC_REG 0x42
153 #define ECG_GSR_SEQ_ADC2TIA_REG 0x43
154 #define ECG_GSR_SEQ_ADC3TIA_REG 0x44
155 #define ECG_GSR_SD_SUBS_REG 0x45
156 #define ECG_GSR_SEQ_CFG_REG 0x46
157 #define ECG_GSR_SEQ_ERR_REG 0x47
158 #define ECG_GSR_SEQ_OVS_SEL_REG 0x48
159 #define ECG_GSR_SEQ_OVS_VAL_REG 0x49
160 #define ECG_GSR_SEQ_DIS_SEL_REG 0x4A
161 #define ECG_GSR_SEQ_DIS_VAL1_REG 0x4B
162 #define ECG_GSR_SEQ_DIS_VAL2_REG 0x4C
163 #define ECG_GSR_CYC_COUNTER_REG 0x60
164 #define ECG_GSR_SEQ_COUNTER_REG 0x61
165 #define ECG_GSR_SUBS_COUNTER_REG 0x62
166 #define ECG_GSR_OFE_CFGA_REG 0x50
167 #define ECG_GSR_OFE1_SD_THCFG_REG 0x51
168 #define ECG_GSR_OFE_CFGC_REG 0x52
169 #define ECG_GSR_OFE_CFGD_REG 0x53
170 #define ECG_GSR_OFE1_CFGA_REG 0x54
171 #define ECG_GSR_OFE1_CFGB_REG 0x55
172 #define ECG_GSR_OFE2_PD_THCFG_REG 0x56
173 #define ECG_GSR_OFE2_SD_THCFG_REG 0x57
174 #define ECG_GSR_OFE2_CFGA_REG 0x58
175 #define ECG_GSR_OFE2_CFGB_REG 0x59
176 #define ECG_GSR_LTFDATA0_L_REG 0x20
177 #define ECG_GSR_LTFDATA0_H_REG 0x21
178 #define ECG_GSR_LTFDATA1_L_REG 0x22
179 #define ECG_GSR_LTFDATA1_H_REG 0x23
180 #define ECG_GSR_ITIME_REG 0x24
181 #define ECG_GSR_LTF_CONFIG_REG 0x25
182 #define ECG_GSR_LTF_SEL_REG 0x26
183 #define ECG_GSR_LTF_GAIN_REG 0x27
184 #define ECG_GSR_LTF_CONTROL_REG 0x28
185 #define ECG_GSR_AZ_CONTROL_REG 0x29
186 #define ECG_GSR_OFFSET0_REG 0x2A
187 #define ECG_GSR_OFFSET1_REG 0x2B
188 #define ECG_GSR_LTF_THRESHOLD_LOW0_REG 0x6C
189 #define ECG_GSR_LTF_THRESHOLD_LOW1_REG 0x6D
190 #define ECG_GSR_LTF_THRESHOLD_HIGH0_REG 0x6E
191 #define ECG_GSR_LTF_THRESHOLD_HIGH1_REG 0x6F
192 #define ECG_GSR_EAF_CFG_REG 0x70
193 #define ECG_GSR_EAF_GST_REG 0x80
194 #define ECG_GSR_EAF_BIAS_REG 0x81
195 #define ECG_GSR_EAF_DAC_REG 0x82
196 #define ECG_GSR_EAF_DAC1_L_REG 0x83
197 #define ECG_GSR_EAF_DAC1_H_REG 0x84
198 #define ECG_GSR_EAF_DAC2_L_REG 0x85
199 #define ECG_GSR_EAF_DAC2_H_REG 0x86
200 #define ECG_GSR_EAF_DAC_CFG_REG 0x87
201 #define ECG_GSR_OFE_NOTCH_REG 0x5A
202 #define ECG_GSR_ECG_MODE_REG 0x5B
203 #define ECG_GSR_ECG_CFGA_REG 0x5C
204 #define ECG_GSR_ECG_CFGB_REG 0x5D
205 #define ECG_GSR_ECG_THRESHOLD_LOW_REG 0x6A
206 #define ECG_GSR_ECG_THRESHOLD_HIGH_REG 0x6B
207 #define ECG_GSR_ECG_CFGC_REG 0x5E
208 #define ECG_GSR_ECG_CFGD_REG 0x5F
209 #define ECG_GSR_ADC_THRESHOLD_REG 0x68
210 #define ECG_GSR_ADC_THRESHOLD_CFG_REG 0x69
211 #define ECG_GSR_ADC_CFGA_REG 0x88
212 #define ECG_GSR_ADC_CFGB_REG 0x89
213 #define ECG_GSR_ADC_CFGC_REG 0x8A
214 #define ECG_GSR_ADC_CHANNEL_MASK_L_REG 0x8B
215 #define ECG_GSR_ADC_CHANNEL_MASK_H_REG 0x8C
216 #define ECG_GSR_ADC_DATA_L_REG 0x8E
217 #define ECG_GSR_ADC_DATA_H_REG 0x8F
218 #define ECG_GSR_FIFO_CFG_REG 0x78
219 #define ECG_GSR_FIFO_CNTRL_REG 0x79
220 #define ECG_GSR_FIFOL_REG 0xFE
221 #define ECG_GSR_FIFOH_REG 0xFF
222 #define ECG_GSR_CONTROL_REG 0x00
223 #define ECG_GSR_GPIO_A_REG 0x08
224 #define ECG_GSR_GPIO_E_REG 0x09
225 #define ECG_GSR_GPIO_O_REG 0x0A
226 #define ECG_GSR_GPIO_I_REG 0x0B
227 #define ECG_GSR_GPIO_P_REG 0x0C
228 #define ECG_GSR_GPIO_SR_REG 0x0D
229 #define ECG_GSR_SUBID_REG 0x91
230 #define ECG_GSR_ID_REG 0x92
231 #define ECG_GSR_STATUS_REG 0xA0
232 #define ECG_GSR_STATUS2_REG 0xA1
233 #define ECG_GSR_CLIPSTATUS_REG 0xA2
234 #define ECG_GSR_LEDSTATUS_REG 0xA3
235 #define ECG_GSR_FIFOSTATUS_REG 0xA4
236 #define ECG_GSR_LTFSTATUS_REG 0xA5
237 #define ECG_GSR_FIFOLEVEL_REG 0xA6
238 #define ECG_GSR_INTENAB_REG 0xA8
239 #define ECG_GSR_INTENAB2_REG 0xA9
240 #define ECG_GSR_INTR_REG 0xAA
241 #define ECG_GSR_INTR2_REG 0xAB
242 
243 #define ECG_GSR_DEV_ID_MASK 0xFC
244 #define ECG_GSR_DEV_ID 0x54
245 
246 
247 // 35mA current flows through LEDs.
248 #define ECG_GSR_LED_CURR_LOW_2 0x80
249 #define ECG_GSR_LED_CURR_HIGH_2 0x59
250 
251 
252 // 100mA current flows through LEDs.
253 #define ECG_GSR_LED_CURR_LOW_3 0xC0
254 #define ECG_GSR_LED_CURR_HIGH_3 0xFF
255 
256 // PPG related definitions.
257 #define ECG_GSR_ENABLE_OSC_AND_LDO 0x03
258 #define ECG_GSR_READ_VALUE_CONTROL_REG 0x83
259 #define ECG_GSR_ENABLE_REF_AND_DIODES 0x8B
260 #define ECG_GSR_ENABLE_LED12_OUTPUT 0x99
261 #define ECG_GSR_ENABLE_LED4_OUTPUT 0x90
262 #define ECG_GSR_CONF_PHOTODIODE 0x3E
263 #define ECG_GSR_SUNLIGHT_COMPENSATION 0x5E
264 #define ECG_GSR_FEEDBACK_RESISTOR 0xE2
265 #define ECG_GSR_ENABLE_PHOTOAMPLIFIER 0xBC
266 #define ECG_GSR_START_PPG 0xE1
267 #define ECG_GSR_ENABLE_ADC 0x01
268 #define ECG_GSR_START_ADC_CONVERSION 0x01
269 #define ECG_GSR_ENABLE_OFE_AND_BIAS 0xE6
270 #define ECG_GSR_OFE1_CFGA 0x70
271 #define ECG_GSR_OFE2_CFGA 0x70
272 #define ECG_GSR_ADC_DATA_H_MASK 0x3F
273 #define ECG_GSR_PPG_SCALE_VAL 0x64
274 #define ECG_GSR_PD_LED_CURRENT 0x80
275 #define ECG_GSR_PPG_L_THRESHOLD 0x48
276 #define ECG_GSR_PPG_H_THRESHOLD 0x5F
277 #define ECG_GSR_PPG_MAX_VAL 0x64
278 
279 // ECG related definitions.
280 #define ECG_GSR_ENABLE_SIG_REFERENCE 0x80
281 #define ECG_GSR_ENABLE_BIAS_AND_GAIN 0x09
282 #define ECG_GSR_INPUT_AND_REF_VOLTAGE 0xB0
283 #define ECG_GSR_RESISTIVE_BIASING 0xA0
284 #define ECG_GSR_GAIN_SETTINGS_STAGES1_2 0x0B
285 #define ECG_GSR_ENABLE_ECG_AMPLIFIER 0x88
286 #define ECG_GSR_GAIN_SETTINGS_STAGE3 0x04
287 #define ECG_GSR_ENABLE_REF_AMPLIFIER 0x01
288 #define ECG_GSR_START_SEQUENCER 0xE1
289 #define ECG_GSR_SELECT_EFE 0x40
290 #define ECG_GSR_SELECT_AMPLIFIER_INPUT 0x01
291 #define ECG_GSR_ECG_SCALE_VAL 0x02
292 
293 // GSR related definitions.
294 #define ECG_GSR_ENABLE_GPIO1_ANALOG 0x02
295 #define ECG_GSR_SET_SLEW_RATE_GPIO1 0x02
296 #define ECG_GSR_SET_GPIO1_AS_INPUT 0x46
297 #define ECG_GSR_SET_RES_BIAS_GPIO1 0x40
298 
299  // generic_registers
301  // ecg_gsr
303 
304 // --------------------------------------------------------------- PUBLIC TYPES
305 
315 typedef enum
316 {
320 
323 
328 typedef struct
329 {
331  i2c_master_t i2c;
332 
334  uint8_t slave_address;
335 
337  pin_name_t enable_pin;
338 
339 } ecg_gsr_t;
340 
346 typedef struct
347 {
349  pin_name_t scl_pin;
350  pin_name_t sda_pin;
351  pin_name_t enable_pin;
352 
354  uint32_t i2c_speed;
355  uint8_t i2c_address;
356 
358  ecg_gsr_functionality_t click_functionality;
359 
360 } ecg_gsr_cfg_t;
361 
366 typedef enum
367 {
370 } ecg_gsr_err_t;
371  // End types group
373 // ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
374 
386 void ecg_gsr_cfg_setup( ecg_gsr_cfg_t *cfg );
387 
396 
403 void ecg_gsr_default_cfg( ecg_gsr_t *ctx, ecg_gsr_cfg_t *cfg );
404 
413 ecg_gsr_err_t ecg_gsr_write_reg( ecg_gsr_t *ctx, uint8_t register_address, uint8_t transfer_data );
414 
424 ecg_gsr_err_t ecg_gsr_read_reg( ecg_gsr_t *ctx, uint8_t register_address, uint16_t *data_out, uint8_t num_of_regs );
425 
434 void ecg_gsr_read_dev_id( ecg_gsr_t *ctx, uint8_t register_address, uint8_t *dev_id_out, uint8_t num_of_regs );
435 
441 void ecg_gsr_reset( ecg_gsr_t *ctx );
442  // End public_function group
444 
445 #ifdef __cplusplus
446 }
447 #endif
448 
449 #endif // _ECG_GSR_H_
450 // ------------------------------------------------------------------------- END
ecg_gsr_write_reg
ecg_gsr_err_t ecg_gsr_write_reg(ecg_gsr_t *ctx, uint8_t register_address, uint8_t transfer_data)
Generic Write function.
ecg_gsr_functionality_t
ecg_gsr_functionality_t
ECG GSR type of measurement selector.
Definition: ECG_GSR.h:314
ENABLE_HEARTRATE_FUNCTIONALITY
Definition: ECG_GSR.h:317
ecg_gsr_err_t
ecg_gsr_err_t
Error Code.
Definition: ECG_GSR.h:365
ecg_gsr_init
ecg_gsr_err_t ecg_gsr_init(ecg_gsr_t *ctx, ecg_gsr_cfg_t *cfg)
Initialization function.
ecg_gsr_cfg_t
Configuration structure.
Definition: ECG_GSR.h:345
ecg_gsr_init_error
Definition: ECG_GSR.h:368
ecg_gsr_default_cfg
void ecg_gsr_default_cfg(ecg_gsr_t *ctx, ecg_gsr_cfg_t *cfg)
Click Default Configuration function.
ecg_gsr_ok
Definition: ECG_GSR.h:367
ENABLE_OXIMETER_FUNCTIONALITY
Definition: ECG_GSR.h:316
ecg_gsr_reset
void ecg_gsr_reset(ecg_gsr_t *ctx)
ECG GSR Reset function.
DEFAULT_ECG_GSR_CLICK_FUNCTIONALITY
Definition: ECG_GSR.h:320
ecg_gsr_cfg_setup
void ecg_gsr_cfg_setup(ecg_gsr_cfg_t *cfg)
ECG GSR configuration object setup function.
ecg_gsr_read_reg
ecg_gsr_err_t ecg_gsr_read_reg(ecg_gsr_t *ctx, uint8_t register_address, uint16_t *data_out, uint8_t num_of_regs)
Generic Read function.
ecg_gsr_read_dev_id
void ecg_gsr_read_dev_id(ecg_gsr_t *ctx, uint8_t register_address, uint8_t *dev_id_out, uint8_t num_of_regs)
ECG GSR Read ID function.
ecg_gsr_t
Context structure.
Definition: ECG_GSR.h:327
ENABLE_GALVANIC_SKIN_RESPONSE_FUNCTIONALITY
Definition: ECG_GSR.h:318