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38 #include "drv_digital_out.h"
39 #include "drv_digital_in.h"
40 #include "drv_spi_master.h"
53 #define EERAM2_MAP_MIKROBUS( cfg, mikrobus ) \
54 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
55 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
56 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
57 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
58 cfg.hld = MIKROBUS( mikrobus, MIKROBUS_PWM )
65 #define EERAM2_RETVAL uint8_t
67 #define EERAM2_OK 0x00
68 #define EERAM2_INIT_ERROR 0xFF
75 #define EERAM2_CMD_WREN 0x06
76 #define EERAM2_CMD_WRDI 0x04
83 #define EERAM2_CMD_WRITE 0x02
84 #define EERAM2_CMD_READ 0x03
85 #define EERAM2_CMD_SECURE_WRITE 0x12
86 #define EERAM2_CMD_SECURE_READ 0x13
93 #define EERAM2_CMD_WRSR 0x01
94 #define EERAM2_CMD_RDSR 0x05
101 #define EERAM2_CMD_STORE 0x08
102 #define EERAM2_CMD_RECALL 0x09
109 #define EERAM2_CMD_WRNUR 0xC2
110 #define EERAM2_CMD_RDNUR 0xC3
117 #define EERAM2_CMD_HIBERNATE 0xB9
124 #define EERAM2_HOLD_DISABLE 0x00
125 #define EERAM2_HOLD_ENABLE 0x01
132 #define EERAM2_WRITE_DISABLE 0x00
133 #define EERAM2_WRITE_ENABLE 0x01
140 #define EERAM2_STATUS_ASE_ENABLE 0x00
141 #define EERAM2_STATUS_ASE_DISABLE 0x40
142 #define EERAM2_STATUS_BP_LVL_0 0x00
143 #define EERAM2_STATUS_BP_LVL_1 0x04
144 #define EERAM2_STATUS_BP_LVL_2 0x08
145 #define EERAM2_STATUS_BP_LVL_3 0x0C
152 #define EERAM2_ERROR 0x00
153 #define EERAM2_SUCCESS 0x01
160 #define EERAM2_SRAM_ADDR_FIRST 0x00000000
161 #define EERAM2_SRAM_ADDR_LAST 0x00FFFFFF
spi_master_mode_t spi_mode
Definition: eeram2.h:206
uint32_t spi_speed
Definition: eeram2.h:205
void eeram2_set_status(eeram2_t *ctx, uint8_t tx_data)
Set status register function.
spi_master_chip_select_polarity_t cs_polarity
Definition: eeram2.h:207
pin_name_t cs
Definition: eeram2.h:197
uint8_t eeram2_write_byte(eeram2_t *ctx, uint32_t reg, uint8_t tx_data)
Write the data byte into SRAM function.
EERAM2_RETVAL eeram2_init(eeram2_t *ctx, eeram2_cfg_t *cfg)
Initialization function.
pin_name_t miso
Definition: eeram2.h:194
void eeram2_cfg_setup(eeram2_cfg_t *cfg)
Config Object Initialization function.
digital_out_t hld
Definition: eeram2.h:178
void eeram2_set_on_hold_status(eeram2_t *ctx, uint8_t en_hold)
Set On-hold status function.
spi_master_t spi
Definition: eeram2.h:182
Click ctx object definition.
Definition: eeram2.h:175
void eeram2_generic_transfer(eeram2_t *ctx, uint8_t *wr_buf, uint16_t wr_len, uint8_t *rd_buf, uint16_t rd_len)
Generic transfer function.
Click configuration structure definition.
Definition: eeram2.h:191
uint8_t eeram2_read_byte(eeram2_t *ctx, uint32_t reg)
Read the data byte from SRAM function.
#define EERAM2_RETVAL
Definition: eeram2.h:65
uint8_t eeram2_write_nonvolatile(eeram2_t *ctx, uint8_t *p_tx_data)
Nonvolatile user space read function.
uint8_t eeram2_read_continuous(eeram2_t *ctx, uint32_t reg, uint8_t *p_rx_data, uint8_t n_bytes)
Continuous read the data into SRAM function.
void eeram2_set_command(eeram2_t *ctx, uint8_t command)
Set command function.
uint8_t eeram2_secure_write(eeram2_t *ctx, uint16_t reg, uint8_t *p_tx_data)
Secure SRAM write function.
pin_name_t hld
Definition: eeram2.h:201
uint8_t eeram2_write_continuous(eeram2_t *ctx, uint32_t reg, uint8_t *p_tx_data, uint8_t n_bytes)
Continuous write the data into SRAM function.
digital_out_t cs
Definition: eeram2.h:177
void eeram2_set_write_status(eeram2_t *ctx, uint8_t en_write)
Set write status function.
pin_name_t chip_select
Definition: eeram2.h:183
pin_name_t mosi
Definition: eeram2.h:195
pin_name_t sck
Definition: eeram2.h:196
uint8_t eeram2_get_status(eeram2_t *ctx)
Read status register function.
uint8_t eeram2_read_nonvolatile(eeram2_t *ctx, uint8_t *p_rx_data)
Nonvolatile user space write function.
uint8_t eeram2_secure_read(eeram2_t *ctx, uint16_t reg, uint8_t *p_rx_data)
Secure SRAM read function.