eeram2  2.0.0.0
eeram2.h
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1 /*
2  * MikroSDK - MikroE Software Development Kit
3  * Copyright© 2020 MikroElektronika d.o.o.
4  *
5  * Permission is hereby granted, free of charge, to any person
6  * obtaining a copy of this software and associated documentation
7  * files (the "Software"), to deal in the Software without restriction,
8  * including without limitation the rights to use, copy, modify, merge,
9  * publish, distribute, sublicense, and/or sell copies of the Software,
10  * and to permit persons to whom the Software is furnished to do so,
11  * subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be
14  * included in all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19  * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22  * OR OTHER DEALINGS IN THE SOFTWARE.
23  */
24 
33 // ----------------------------------------------------------------------------
34 
35 #ifndef EERAM2_H
36 #define EERAM2_H
37 
38 #include "mikrosdk_version.h"
39 
40 #ifdef __GNUC__
41 #if mikroSDK_GET_VERSION < 20800ul
42 #include "rcu_delays.h"
43 #else
44 #include "delays.h"
45 #endif
46 #endif
47 
48 #include "drv_digital_out.h"
49 #include "drv_digital_in.h"
50 #include "drv_spi_master.h"
51 
52 // -------------------------------------------------------------- PUBLIC MACROS
63 #define EERAM2_MAP_MIKROBUS( cfg, mikrobus ) \
64  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
65  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
66  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
67  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
68  cfg.hld = MIKROBUS( mikrobus, MIKROBUS_PWM )
69 
75 #define EERAM2_RETVAL uint8_t
76 
77 #define EERAM2_OK 0x00
78 #define EERAM2_INIT_ERROR 0xFF
79 
85 #define EERAM2_CMD_WREN 0x06
86 #define EERAM2_CMD_WRDI 0x04
87 
93 #define EERAM2_CMD_WRITE 0x02
94 #define EERAM2_CMD_READ 0x03
95 #define EERAM2_CMD_SECURE_WRITE 0x12
96 #define EERAM2_CMD_SECURE_READ 0x13
97 
103 #define EERAM2_CMD_WRSR 0x01
104 #define EERAM2_CMD_RDSR 0x05
105 
111 #define EERAM2_CMD_STORE 0x08
112 #define EERAM2_CMD_RECALL 0x09
113 
119 #define EERAM2_CMD_WRNUR 0xC2
120 #define EERAM2_CMD_RDNUR 0xC3
121 
127 #define EERAM2_CMD_HIBERNATE 0xB9
128 
134 #define EERAM2_HOLD_DISABLE 0x00
135 #define EERAM2_HOLD_ENABLE 0x01
136 
142 #define EERAM2_WRITE_DISABLE 0x00
143 #define EERAM2_WRITE_ENABLE 0x01
144 
145 \
150 #define EERAM2_STATUS_ASE_ENABLE 0x00
151 #define EERAM2_STATUS_ASE_DISABLE 0x40
152 #define EERAM2_STATUS_BP_LVL_0 0x00
153 #define EERAM2_STATUS_BP_LVL_1 0x04
154 #define EERAM2_STATUS_BP_LVL_2 0x08
155 #define EERAM2_STATUS_BP_LVL_3 0x0C
156 
162 #define EERAM2_ERROR 0x00
163 #define EERAM2_SUCCESS 0x01
164 
170 #define EERAM2_SRAM_ADDR_FIRST 0x00000000
171 #define EERAM2_SRAM_ADDR_LAST 0x00FFFFFF
172  // End group macro
175 // --------------------------------------------------------------- PUBLIC TYPES
184 typedef struct
185 {
186  // Output pins
187  digital_out_t cs;
188  digital_out_t hld;
189 
190  // Modules
191 
192  spi_master_t spi;
193  pin_name_t chip_select;
194 
195 } eeram2_t;
196 
200 typedef struct
201 {
202  // Communication gpio pins
203 
204  pin_name_t miso;
205  pin_name_t mosi;
206  pin_name_t sck;
207  pin_name_t cs;
208 
209  // Additional gpio pins
210 
211  pin_name_t hld;
212 
213  // static variable
214 
215  uint32_t spi_speed;
216  spi_master_mode_t spi_mode;
217  spi_master_chip_select_polarity_t cs_polarity;
218 
219 } eeram2_cfg_t;
220  // End types group
222 
223 // ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
224 
229 #ifdef __cplusplus
230 extern "C"{
231 #endif
232 
242 
252 
264 void eeram2_generic_transfer ( eeram2_t *ctx, uint8_t *wr_buf, uint16_t wr_len, uint8_t *rd_buf, uint16_t rd_len );
265 
277 void eeram2_set_on_hold_status ( eeram2_t *ctx, uint8_t en_hold );
278 
288 void eeram2_set_command ( eeram2_t *ctx, uint8_t command );
289 
301 void eeram2_set_write_status ( eeram2_t *ctx, uint8_t en_write );
302 
320 void eeram2_set_status ( eeram2_t *ctx, uint8_t tx_data );
321 
350 uint8_t eeram2_get_status ( eeram2_t *ctx );
351 
368 uint8_t eeram2_write_byte ( eeram2_t *ctx, uint32_t reg, uint8_t tx_data );
369 
383 uint8_t eeram2_read_byte ( eeram2_t *ctx, uint32_t reg );
384 
403 uint8_t eeram2_write_continuous ( eeram2_t *ctx, uint32_t reg, uint8_t *p_tx_data, uint8_t n_bytes );
404 
423 uint8_t eeram2_read_continuous ( eeram2_t *ctx, uint32_t reg, uint8_t *p_rx_data, uint8_t n_bytes );
424 
438 uint8_t eeram2_read_nonvolatile ( eeram2_t *ctx, uint8_t *p_rx_data );
439 
453 uint8_t eeram2_write_nonvolatile ( eeram2_t *ctx, uint8_t *p_tx_data );
454 
469 uint8_t eeram2_secure_write ( eeram2_t *ctx, uint16_t reg, uint8_t *p_tx_data );
470 
484 uint8_t eeram2_secure_read ( eeram2_t *ctx, uint16_t reg, uint8_t *p_rx_data );
485 
486 #ifdef __cplusplus
487 }
488 #endif
489 #endif // _EERAM2_H_
490  // End public_function group
493 
494 // ------------------------------------------------------------------------- END
eeram2_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: eeram2.h:216
eeram2_cfg_t::spi_speed
uint32_t spi_speed
Definition: eeram2.h:215
eeram2_set_status
void eeram2_set_status(eeram2_t *ctx, uint8_t tx_data)
Set status register function.
eeram2_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: eeram2.h:217
eeram2_cfg_t::cs
pin_name_t cs
Definition: eeram2.h:207
eeram2_write_byte
uint8_t eeram2_write_byte(eeram2_t *ctx, uint32_t reg, uint8_t tx_data)
Write the data byte into SRAM function.
eeram2_init
EERAM2_RETVAL eeram2_init(eeram2_t *ctx, eeram2_cfg_t *cfg)
Initialization function.
eeram2_cfg_t::miso
pin_name_t miso
Definition: eeram2.h:204
eeram2_cfg_setup
void eeram2_cfg_setup(eeram2_cfg_t *cfg)
Config Object Initialization function.
eeram2_t::hld
digital_out_t hld
Definition: eeram2.h:188
eeram2_set_on_hold_status
void eeram2_set_on_hold_status(eeram2_t *ctx, uint8_t en_hold)
Set On-hold status function.
eeram2_t::spi
spi_master_t spi
Definition: eeram2.h:192
eeram2_t
Click ctx object definition.
Definition: eeram2.h:185
eeram2_generic_transfer
void eeram2_generic_transfer(eeram2_t *ctx, uint8_t *wr_buf, uint16_t wr_len, uint8_t *rd_buf, uint16_t rd_len)
Generic transfer function.
eeram2_cfg_t
Click configuration structure definition.
Definition: eeram2.h:201
eeram2_read_byte
uint8_t eeram2_read_byte(eeram2_t *ctx, uint32_t reg)
Read the data byte from SRAM function.
EERAM2_RETVAL
#define EERAM2_RETVAL
Definition: eeram2.h:75
eeram2_write_nonvolatile
uint8_t eeram2_write_nonvolatile(eeram2_t *ctx, uint8_t *p_tx_data)
Nonvolatile user space read function.
eeram2_read_continuous
uint8_t eeram2_read_continuous(eeram2_t *ctx, uint32_t reg, uint8_t *p_rx_data, uint8_t n_bytes)
Continuous read the data into SRAM function.
eeram2_set_command
void eeram2_set_command(eeram2_t *ctx, uint8_t command)
Set command function.
eeram2_secure_write
uint8_t eeram2_secure_write(eeram2_t *ctx, uint16_t reg, uint8_t *p_tx_data)
Secure SRAM write function.
eeram2_cfg_t::hld
pin_name_t hld
Definition: eeram2.h:211
eeram2_write_continuous
uint8_t eeram2_write_continuous(eeram2_t *ctx, uint32_t reg, uint8_t *p_tx_data, uint8_t n_bytes)
Continuous write the data into SRAM function.
eeram2_t::cs
digital_out_t cs
Definition: eeram2.h:187
eeram2_set_write_status
void eeram2_set_write_status(eeram2_t *ctx, uint8_t en_write)
Set write status function.
eeram2_t::chip_select
pin_name_t chip_select
Definition: eeram2.h:193
eeram2_cfg_t::mosi
pin_name_t mosi
Definition: eeram2.h:205
eeram2_cfg_t::sck
pin_name_t sck
Definition: eeram2.h:206
eeram2_get_status
uint8_t eeram2_get_status(eeram2_t *ctx)
Read status register function.
eeram2_read_nonvolatile
uint8_t eeram2_read_nonvolatile(eeram2_t *ctx, uint8_t *p_rx_data)
Nonvolatile user space write function.
eeram2_secure_read
uint8_t eeram2_secure_read(eeram2_t *ctx, uint16_t reg, uint8_t *p_rx_data)
Secure SRAM read function.