eeram2  2.0.0.0
eeram2.h
Go to the documentation of this file.
1 /*
2  * MikroSDK - MikroE Software Development Kit
3  * Copyright© 2020 MikroElektronika d.o.o.
4  *
5  * Permission is hereby granted, free of charge, to any person
6  * obtaining a copy of this software and associated documentation
7  * files (the "Software"), to deal in the Software without restriction,
8  * including without limitation the rights to use, copy, modify, merge,
9  * publish, distribute, sublicense, and/or sell copies of the Software,
10  * and to permit persons to whom the Software is furnished to do so,
11  * subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be
14  * included in all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19  * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22  * OR OTHER DEALINGS IN THE SOFTWARE.
23  */
24 
33 // ----------------------------------------------------------------------------
34 
35 #ifndef EERAM2_H
36 #define EERAM2_H
37 
42 #ifdef PREINIT_SUPPORTED
43 #include "preinit.h"
44 #endif
45 
46 #ifdef MikroCCoreVersion
47  #if MikroCCoreVersion >= 1
48  #include "delays.h"
49  #endif
50 #endif
51 
52 #include "drv_digital_out.h"
53 #include "drv_digital_in.h"
54 #include "drv_spi_master.h"
55 
56 // -------------------------------------------------------------- PUBLIC MACROS
67 #define EERAM2_MAP_MIKROBUS( cfg, mikrobus ) \
68  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
69  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
70  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
71  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
72  cfg.hld = MIKROBUS( mikrobus, MIKROBUS_PWM )
73 
79 #define EERAM2_RETVAL uint8_t
80 
81 #define EERAM2_OK 0x00
82 #define EERAM2_INIT_ERROR 0xFF
83 
89 #define EERAM2_CMD_WREN 0x06
90 #define EERAM2_CMD_WRDI 0x04
91 
97 #define EERAM2_CMD_WRITE 0x02
98 #define EERAM2_CMD_READ 0x03
99 #define EERAM2_CMD_SECURE_WRITE 0x12
100 #define EERAM2_CMD_SECURE_READ 0x13
101 
107 #define EERAM2_CMD_WRSR 0x01
108 #define EERAM2_CMD_RDSR 0x05
109 
115 #define EERAM2_CMD_STORE 0x08
116 #define EERAM2_CMD_RECALL 0x09
117 
123 #define EERAM2_CMD_WRNUR 0xC2
124 #define EERAM2_CMD_RDNUR 0xC3
125 
131 #define EERAM2_CMD_HIBERNATE 0xB9
132 
138 #define EERAM2_HOLD_DISABLE 0x00
139 #define EERAM2_HOLD_ENABLE 0x01
140 
146 #define EERAM2_WRITE_DISABLE 0x00
147 #define EERAM2_WRITE_ENABLE 0x01
148 
149 \
154 #define EERAM2_STATUS_ASE_ENABLE 0x00
155 #define EERAM2_STATUS_ASE_DISABLE 0x40
156 #define EERAM2_STATUS_BP_LVL_0 0x00
157 #define EERAM2_STATUS_BP_LVL_1 0x04
158 #define EERAM2_STATUS_BP_LVL_2 0x08
159 #define EERAM2_STATUS_BP_LVL_3 0x0C
160 
166 #define EERAM2_ERROR 0x00
167 #define EERAM2_SUCCESS 0x01
168 
174 #define EERAM2_SRAM_ADDR_FIRST 0x00000000
175 #define EERAM2_SRAM_ADDR_LAST 0x00FFFFFF
176  // End group macro
179 // --------------------------------------------------------------- PUBLIC TYPES
188 typedef struct
189 {
190  // Output pins
191  digital_out_t cs;
192  digital_out_t hld;
193 
194  // Modules
195 
196  spi_master_t spi;
197  pin_name_t chip_select;
198 
199 } eeram2_t;
200 
204 typedef struct
205 {
206  // Communication gpio pins
207 
208  pin_name_t miso;
209  pin_name_t mosi;
210  pin_name_t sck;
211  pin_name_t cs;
212 
213  // Additional gpio pins
214 
215  pin_name_t hld;
216 
217  // static variable
218 
219  uint32_t spi_speed;
220  spi_master_mode_t spi_mode;
221  spi_master_chip_select_polarity_t cs_polarity;
222 
223 } eeram2_cfg_t;
224  // End types group
226 
227 // ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
228 
233 #ifdef __cplusplus
234 extern "C"{
235 #endif
236 
246 
256 
268 void eeram2_generic_transfer ( eeram2_t *ctx, uint8_t *wr_buf, uint16_t wr_len, uint8_t *rd_buf, uint16_t rd_len );
269 
281 void eeram2_set_on_hold_status ( eeram2_t *ctx, uint8_t en_hold );
282 
292 void eeram2_set_command ( eeram2_t *ctx, uint8_t command );
293 
305 void eeram2_set_write_status ( eeram2_t *ctx, uint8_t en_write );
306 
324 void eeram2_set_status ( eeram2_t *ctx, uint8_t tx_data );
325 
354 uint8_t eeram2_get_status ( eeram2_t *ctx );
355 
372 uint8_t eeram2_write_byte ( eeram2_t *ctx, uint32_t reg, uint8_t tx_data );
373 
387 uint8_t eeram2_read_byte ( eeram2_t *ctx, uint32_t reg );
388 
407 uint8_t eeram2_write_continuous ( eeram2_t *ctx, uint32_t reg, uint8_t *p_tx_data, uint8_t n_bytes );
408 
427 uint8_t eeram2_read_continuous ( eeram2_t *ctx, uint32_t reg, uint8_t *p_rx_data, uint8_t n_bytes );
428 
442 uint8_t eeram2_read_nonvolatile ( eeram2_t *ctx, uint8_t *p_rx_data );
443 
457 uint8_t eeram2_write_nonvolatile ( eeram2_t *ctx, uint8_t *p_tx_data );
458 
473 uint8_t eeram2_secure_write ( eeram2_t *ctx, uint16_t reg, uint8_t *p_tx_data );
474 
488 uint8_t eeram2_secure_read ( eeram2_t *ctx, uint16_t reg, uint8_t *p_rx_data );
489 
490 #ifdef __cplusplus
491 }
492 #endif
493 #endif // _EERAM2_H_
494  // End public_function group
497 
498 // ------------------------------------------------------------------------- END
eeram2_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: eeram2.h:220
eeram2_cfg_t::spi_speed
uint32_t spi_speed
Definition: eeram2.h:219
eeram2_set_status
void eeram2_set_status(eeram2_t *ctx, uint8_t tx_data)
Set status register function.
eeram2_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: eeram2.h:221
eeram2_cfg_t::cs
pin_name_t cs
Definition: eeram2.h:211
eeram2_write_byte
uint8_t eeram2_write_byte(eeram2_t *ctx, uint32_t reg, uint8_t tx_data)
Write the data byte into SRAM function.
eeram2_init
EERAM2_RETVAL eeram2_init(eeram2_t *ctx, eeram2_cfg_t *cfg)
Initialization function.
eeram2_cfg_t::miso
pin_name_t miso
Definition: eeram2.h:208
eeram2_cfg_setup
void eeram2_cfg_setup(eeram2_cfg_t *cfg)
Config Object Initialization function.
eeram2_t::hld
digital_out_t hld
Definition: eeram2.h:192
eeram2_set_on_hold_status
void eeram2_set_on_hold_status(eeram2_t *ctx, uint8_t en_hold)
Set On-hold status function.
eeram2_t::spi
spi_master_t spi
Definition: eeram2.h:196
eeram2_t
Click ctx object definition.
Definition: eeram2.h:189
eeram2_generic_transfer
void eeram2_generic_transfer(eeram2_t *ctx, uint8_t *wr_buf, uint16_t wr_len, uint8_t *rd_buf, uint16_t rd_len)
Generic transfer function.
eeram2_cfg_t
Click configuration structure definition.
Definition: eeram2.h:205
eeram2_read_byte
uint8_t eeram2_read_byte(eeram2_t *ctx, uint32_t reg)
Read the data byte from SRAM function.
EERAM2_RETVAL
#define EERAM2_RETVAL
Definition: eeram2.h:79
eeram2_write_nonvolatile
uint8_t eeram2_write_nonvolatile(eeram2_t *ctx, uint8_t *p_tx_data)
Nonvolatile user space read function.
eeram2_read_continuous
uint8_t eeram2_read_continuous(eeram2_t *ctx, uint32_t reg, uint8_t *p_rx_data, uint8_t n_bytes)
Continuous read the data into SRAM function.
eeram2_set_command
void eeram2_set_command(eeram2_t *ctx, uint8_t command)
Set command function.
eeram2_secure_write
uint8_t eeram2_secure_write(eeram2_t *ctx, uint16_t reg, uint8_t *p_tx_data)
Secure SRAM write function.
eeram2_cfg_t::hld
pin_name_t hld
Definition: eeram2.h:215
eeram2_write_continuous
uint8_t eeram2_write_continuous(eeram2_t *ctx, uint32_t reg, uint8_t *p_tx_data, uint8_t n_bytes)
Continuous write the data into SRAM function.
eeram2_t::cs
digital_out_t cs
Definition: eeram2.h:191
eeram2_set_write_status
void eeram2_set_write_status(eeram2_t *ctx, uint8_t en_write)
Set write status function.
eeram2_t::chip_select
pin_name_t chip_select
Definition: eeram2.h:197
eeram2_cfg_t::mosi
pin_name_t mosi
Definition: eeram2.h:209
eeram2_cfg_t::sck
pin_name_t sck
Definition: eeram2.h:210
eeram2_get_status
uint8_t eeram2_get_status(eeram2_t *ctx)
Read status register function.
eeram2_read_nonvolatile
uint8_t eeram2_read_nonvolatile(eeram2_t *ctx, uint8_t *p_rx_data)
Nonvolatile user space write function.
eeram2_secure_read
uint8_t eeram2_secure_read(eeram2_t *ctx, uint16_t reg, uint8_t *p_rx_data)
Secure SRAM read function.