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42 #ifdef PREINIT_SUPPORTED
46 #ifdef MikroCCoreVersion
47 #if MikroCCoreVersion >= 1
52 #include "drv_digital_out.h"
53 #include "drv_digital_in.h"
54 #include "drv_spi_master.h"
67 #define MRAM2_MAP_MIKROBUS( cfg, mikrobus ) \
68 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
69 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
70 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
71 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
72 cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
73 cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT );
81 #define MRAM2_ERROR -1
88 #define MRAM2_CMD_RDSR 0x05
89 #define MRAM2_CMD_WREN 0x06
90 #define MRAM2_CMD_WRDI 0x04
91 #define MRAM2_CMD_WRSR 0x01
92 #define MRAM2_CMD_READ 0x03
93 #define MRAM2_CMD_FREAD 0x0B
94 #define MRAM2_CMD_WRITE 0x02
95 #define MRAM2_CMD_SLEEP 0xB9
96 #define MRAM2_CMD_WAKE 0xAB
97 #define MRAM2_CMD_TDET 0x17
98 #define MRAM2_CMD_TDETX 0x07
99 #define MRAM2_CMD_RDID 0x4B
106 #define MRAM2_STAT_REG_SRWD 0x80
107 #define MRAM2_STAT_REG_QPI 0x40
108 #define MRAM2_STAT_REG_BP1 0x08
109 #define MRAM2_STAT_REG_BP0 0x04
110 #define MRAM2_STAT_REG_WEL 0x02
117 #define MRAM2_XIP_SET_CONT 0xEF
118 #define MRAM2_XIP_RST_STOP 0xFF
125 #define MRAM2_WP_ENABLE 0x01
126 #define MRAM2_WP_DISABLE 0x00
127 #define MRAM2_HLD_ENABLE 0x01
128 #define MRAM2_HLD_DISABLE 0x00
129 #define MRAM2_PIN_LOW 0x00
130 #define MRAM2_PIN_HIGH 0x01
281 void mram2_fread (
mram2_t *ctx, uint32_t mem_adr, uint8_t mode, uint8_t *rd_data, uint8_t n_bytes );
digital_out_t rst
Definition: mram2.h:148
uint32_t mram2_tdet(mram2_t *ctx)
Tamper Detect (TDET) function.
void mram2_read(mram2_t *ctx, uint32_t mem_adr, uint8_t *rd_data, uint8_t n_bytes)
Read Data Bytes function.
pin_name_t mosi
Definition: mram2.h:166
digital_out_t cs
Definition: mram2.h:145
void mram2_tdetx(mram2_t *ctx)
Tamper Detect Exit function.
spi_master_chip_select_polarity_t cs_polarity
Definition: mram2.h:179
pin_name_t chip_select
Definition: mram2.h:154
pin_name_t sck
Definition: mram2.h:167
void mram2_fread(mram2_t *ctx, uint32_t mem_adr, uint8_t mode, uint8_t *rd_data, uint8_t n_bytes)
Fast Read Data Bytes function.
void mram2_cfg_setup(mram2_cfg_t *cfg)
Config Object Initialization function.
Click configuration structure definition.
Definition: mram2.h:162
Click ctx object definition.
Definition: mram2.h:144
void mram2_wrsr(mram2_t *ctx, uint8_t stat_reg)
Write Status Register function.
void mram2_write(mram2_t *ctx, uint32_t mem_adr, uint8_t *wr_data, uint8_t n_bytes)
Write Data Bytes function.
spi_master_mode_t spi_mode
Definition: mram2.h:178
void mram2_sleep(mram2_t *ctx)
Enter Sleep Mode function.
pin_name_t miso
Definition: mram2.h:165
void mram2_hold(mram2_t *ctx, uint8_t state)
Hold function.
pin_name_t rst
Definition: mram2.h:172
void mram2_write_protect(mram2_t *ctx, uint8_t state)
Write Protect function.
spi_master_t spi
Definition: mram2.h:153
err_t mram2_init(mram2_t *ctx, mram2_cfg_t *cfg)
Initialization function.
pin_name_t int_pin
Definition: mram2.h:173
void mram2_wake(mram2_t *ctx)
Exit Sleep Mode function.
void mram2_wrdi(mram2_t *ctx)
Write Disable function.
digital_out_t int_pin
Definition: mram2.h:149
uint32_t spi_speed
Definition: mram2.h:177
void mram2_rdid(mram2_t *ctx, uint8_t *rd_id)
Read ID function.
void mram2_wren(mram2_t *ctx)
Write Enable function.
pin_name_t cs
Definition: mram2.h:168
uint8_t mram2_rdsr(mram2_t *ctx)
Read Status Register function.