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38 #include "drv_digital_out.h"
39 #include "drv_digital_in.h"
40 #include "drv_spi_master.h"
54 #define C9DOF2_MAP_MIKROBUS( cfg, mikrobus ) \
55 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
56 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
57 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
58 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
59 cfg.snc = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
60 cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
67 #define C9DOF2_RETVAL uint8_t
69 #define C9DOF2_OK 0x00
70 #define C9DOF2_INIT_ERROR 0xFF
77 #define C9DOF2_AK09916_ADR 0x0C
78 #define C9DOF2_WHO_AM_I_AK09916 0x01
79 #define C9DOF2_AK09916_ST1 0x10
80 #define C9DOF2_AK09916_XOUT_L 0x11
81 #define C9DOF2_AK09916_XOUT_H 0x12
82 #define C9DOF2_AK09916_YOUT_L 0x13
83 #define C9DOF2_AK09916_YOUT_H 0x14
84 #define C9DOF2_AK09916_ZOUT_L 0x15
85 #define C9DOF2_AK09916_ZOUT_H 0x16
86 #define C9DOF2_AK09916_ST2 0x18
87 #define C9DOF2_AK09916_CNTL 0x30
88 #define C9DOF2_AK09916_CNTL2 0x31
95 #define C9DOF2_WHO_AM_I_ICM20948 0x00
96 #define C9DOF2_USER_CTRL 0x03
97 #define C9DOF2_LP_CCFG 0x05
98 #define C9DOF2_PWR_MGMT_1 0x06
99 #define C9DOF2_PWR_MGMT_2 0x07
100 #define C9DOF2_INT_PIN_CFG 0x0F
101 #define C9DOF2_INT_EN 0x10
102 #define C9DOF2_INT_EN_1 0x11
103 #define C9DOF2_INT_EN_2 0x12
104 #define C9DOF2_INT_EN_3 0x13
105 #define C9DOF2_I2C_MST_STAT 0x17
106 #define C9DOF2_INT_STAT 0x19
107 #define C9DOF2_INT_STAT_1 0x1A
108 #define C9DOF2_INT_STAT_2 0x1B
109 #define C9DOF2_INT_STAT_3 0x1C
110 #define C9DOF2_DELAY_TIMEH 0x28
111 #define C9DOF2_DELAY_TIMEL 0x29
112 #define C9DOF2_ACCEL_XOUT_H 0x2D
113 #define C9DOF2_ACCEL_XOUT_L 0x2E
114 #define C9DOF2_ACCEL_YOUT_H 0x2F
115 #define C9DOF2_ACCEL_YOUT_L 0x30
116 #define C9DOF2_ACCEL_ZOUT_H 0x31
117 #define C9DOF2_ACCEL_ZOUT_L 0x32
118 #define C9DOF2_GYRO_XOUT_H 0x33
119 #define C9DOF2_GYRO_XOUT_L 0x34
120 #define C9DOF2_GYRO_YOUT_H 0x35
121 #define C9DOF2_GYRO_YOUT_L 0x36
122 #define C9DOF2_GYRO_ZOUT_H 0x37
123 #define C9DOF2_GYRO_ZOUT_L 0x38
124 #define C9DOF2_TEMP_OUT_H 0x39
125 #define C9DOF2_TEMP_OUT_L 0x3A
126 #define C9DOF2_EXT_SENS_DATA_00 0x3B
127 #define C9DOF2_EXT_SENS_DATA_01 0x3C
128 #define C9DOF2_EXT_SENS_DATA_02 0x3D
129 #define C9DOF2_EXT_SENS_DATA_03 0x3E
130 #define C9DOF2_EXT_SENS_DATA_04 0x3F
131 #define C9DOF2_EXT_SENS_DATA_05 0x40
132 #define C9DOF2_EXT_SENS_DATA_06 0x41
133 #define C9DOF2_EXT_SENS_DATA_07 0x42
134 #define C9DOF2_EXT_SENS_DATA_08 0x43
135 #define C9DOF2_EXT_SENS_DATA_09 0x44
136 #define C9DOF2_EXT_SENS_DATA_10 0x45
137 #define C9DOF2_EXT_SENS_DATA_11 0x46
138 #define C9DOF2_EXT_SENS_DATA_12 0x47
139 #define C9DOF2_EXT_SENS_DATA_13 0x48
140 #define C9DOF2_EXT_SENS_DATA_14 0x49
141 #define C9DOF2_EXT_SENS_DATA_15 0x4A
142 #define C9DOF2_EXT_SENS_DATA_16 0x4B
143 #define C9DOF2_EXT_SENS_DATA_17 0x4C
144 #define C9DOF2_EXT_SENS_DATA_18 0x4D
145 #define C9DOF2_EXT_SENS_DATA_19 0x4E
146 #define C9DOF2_EXT_SENS_DATA_20 0x4F
147 #define C9DOF2_EXT_SENS_DATA_21 0x50
148 #define C9DOF2_EXT_SENS_DATA_22 0x51
149 #define C9DOF2_EXT_SENS_DATA_23 0x52
150 #define C9DOF2_FIFO_EN_1 0x66
151 #define C9DOF2_FIFO_EN_2 0x67
152 #define C9DOF2_FIFO_RST 0x68
153 #define C9DOF2_FIFO_MODE 0x69
154 #define C9DOF2_FIFO_CNT_H 0x70
155 #define C9DOF2_FIFO_CNT_L 0x71
156 #define C9DOF2_FIFO_R_W 0x72
157 #define C9DOF2_DATA_RDY_STAT 0x74
158 #define C9DOF2_FIFO_CFG 0x76
159 #define C9DOF2_REG_BANK_SEL 0x7F
166 #define C9DOF2_SELF_TEST_X_GYRO 0x02
167 #define C9DOF2_SELF_TEST_Y_GYRO 0x03
168 #define C9DOF2_SELF_TEST_Z_GYRO 0x04
169 #define C9DOF2_SELF_TEST_X_ACCEL 0x0E
170 #define C9DOF2_SELF_TEST_Y_ACCEL 0x0F
171 #define C9DOF2_SELF_TEST_Z_ACCEL 0x10
172 #define C9DOF2_XA_OFFSET_H 0x14
173 #define C9DOF2_XA_OFFSET_L 0x15
174 #define C9DOF2_YA_OFFSET_H 0x17
175 #define C9DOF2_YA_OFFSET_L 0x18
176 #define C9DOF2_ZA_OFFSET_H 0x1A
177 #define C9DOF2_ZA_OFFSET_L 0x1B
178 #define C9DOF2_TIMEBASE_CORREC_PLL 0x28
185 #define C9DOF2_GYRO_SMPLRT_DIV 0x00
186 #define C9DOF2_GYRO_CFG_1 0x01
187 #define C9DOF2_GYRO_CFG_2 0x02
188 #define C9DOF2_XG_OFFSET_H 0x03
189 #define C9DOF2_XG_OFFSET_L 0x04
190 #define C9DOF2_YG_OFFSET_H 0x05
191 #define C9DOF2_YG_OFFSET_L 0x06
192 #define C9DOF2_ZG_OFFSET_H 0x07
193 #define C9DOF2_ZG_OFFSET_L 0x08
194 #define C9DOF2_ODR_ALIGN_EN 0x09
195 #define C9DOF2_ACCEL_SMPLRT_DIV_1 0x10
196 #define C9DOF2_ACCEL_SMPLRT_DIV_2 0x11
197 #define C9DOF2_ACCEL_INTEL_CTRL 0x12
198 #define C9DOF2_ACCEL_WOM_THR 0x13
199 #define C9DOF2_ACCEL_CFG 0x14
200 #define C9DOF2_ACCEL_CFG_2 0x15
201 #define C9DOF2_FSYNC_CFG 0x52
202 #define C9DOF2_TEMP_CFG 0x53
203 #define C9DOF2_MOD_CTRL_USR 0x54
210 #define C9DOF2_I2C_MST_ODR_CFG 0x00
211 #define C9DOF2_I2C_MST_CTRL 0x01
212 #define C9DOF2_I2C_MST_DELAY_CTRL 0x02
213 #define C9DOF2_I2C_SLV0_ADR 0x03
214 #define C9DOF2_I2C_SLV0_REG 0x04
215 #define C9DOF2_I2C_SLV0_CTRL 0x05
216 #define C9DOF2_I2C_SLV0_DO 0x06
217 #define C9DOF2_I2C_SLV1_ADR 0x07
218 #define C9DOF2_I2C_SLV1_REG 0x08
219 #define C9DOF2_I2C_SLV1_CTRL 0x09
220 #define C9DOF2_I2C_SLV1_DO 0x0A
221 #define C9DOF2_I2C_SLV2_ADR 0x0B
222 #define C9DOF2_I2C_SLV2_REG 0x0C
223 #define C9DOF2_I2C_SLV2_CTRL 0x0D
224 #define C9DOF2_I2C_SLV2_DO 0x0E
225 #define C9DOF2_I2C_SLV3_ADR 0x0F
226 #define C9DOF2_I2C_SLV3_REG 0x10
227 #define C9DOF2_I2C_SLV3_CTRL 0x11
228 #define C9DOF2_I2C_SLV3_DO 0x12
229 #define C9DOF2_I2C_SLV4_ADR 0x13
230 #define C9DOF2_I2C_SLV4_REG 0x14
231 #define C9DOF2_I2C_SLV4_CTRL 0x15
232 #define C9DOF2_I2C_SLV4_DO 0x16
233 #define C9DOF2_I2C_SLV4_DI 0x17
240 #define C9DOF2_REG_BANK_0 0x00
241 #define C9DOF2_REG_BANK_1 0x10
242 #define C9DOF2_REG_BANK_2 0x20
243 #define C9DOF2_REG_BANK_3 0x30
250 #define C9DOF2_USER_CTL_DMP_EN 0x80
251 #define C9DOF2_USER_CTL_FIFO_EN 0x40
252 #define C9DOF2_USER_CTL_I2C_MST_EN 0x20
253 #define C9DOF2_USER_CTL_I2C_IF_DIS 0x10
254 #define C9DOF2_USER_CTL_DMP_RST 0x08
255 #define C9DOF2_USER_CTL_SRAM_RST 0x04
256 #define C9DOF2_USER_CTL_I2C_MST_RST 0x02
263 #define C9DOF2_LP_CFG_I2C_MST_CYC 0x80
264 #define C9DOF2_LP_CFG_ACCEL_CYC 0x40
265 #define C9DOF2_LP_CFG_GYRO_CYC 0x20
272 #define C9DOF2_PWR_MGMT_1_DEV_RST 0x80
273 #define C9DOF2_PWR_MGMT_1_SLP 0x40
274 #define C9DOF2_PWR_MGMT_1_LP_EN 0x20
275 #define C9DOF2_PWR_MGMT_1_TEMP_DIS 0x08
276 #define C9DOF2_PWR_MGMT_1_CLKSEL_7 0x07
277 #define C9DOF2_PWR_MGMT_1_CLKSEL_6 0x06
278 #define C9DOF2_PWR_MGMT_1_CLKSEL_5 0x05
279 #define C9DOF2_PWR_MGMT_1_CLKSEL_4 0x04
280 #define C9DOF2_PWR_MGMT_1_CLKSEL_3 0x03
281 #define C9DOF2_PWR_MGMT_1_CLKSEL_2 0x02
282 #define C9DOF2_PWR_MGMT_1_CLKSEL_1 0x01
283 #define C9DOF2_PWR_MGMT_1_CLKSEL_0 0x00
290 #define C9DOF2_PWR_MGMT_2_DIS_XA 0x20
291 #define C9DOF2_PWR_MGMT_2_DIS_YA 0x10
292 #define C9DOF2_PWR_MGMT_2_DIS_ZA 0x08
293 #define C9DOF2_PWR_MGMT_2_DIS_XG 0x04
294 #define C9DOF2_PWR_MGMT_2_DIS_YG 0x02
295 #define C9DOF2_PWR_MGMT_2_DIS_ZG 0x01
302 #define C9DOF2_INT_PIN_CFG_ACTL 0x80
303 #define C9DOF2_INT_PIN_CFG_OPEN 0x40
304 #define C9DOF2_INT_PIN_CFG_LATCH_INT_EN 0x20
305 #define C9DOF2_INT_PIN_CFG_INT_ANYRD_2CLR 0x10
306 #define C9DOF2_INT_PIN_CFG_ACTL_FSYNC 0x08
307 #define C9DOF2_INT_PIN_CFG_FSYNC_INT_MODE_EN 0x04
308 #define C9DOF2_INT_PIN_CFG_BYPASS_EN 0x02
315 #define C9DOF2_INT_ENABLE_REG_WOF_EN 0x80
316 #define C9DOF2_INT_ENABLE_WOM_INT_EN 0x08
317 #define C9DOF2_INT_ENABLE_PLL_RDY_EN 0x04
318 #define C9DOF2_INT_ENABLE_FIFO_OVF_EN 0x10
319 #define C9DOF2_INT_ENABLE_DMP_INT1_EN 0x04
320 #define C9DOF2_INT_ENABLE_I2C_MST_INT_EN 0x01
327 #define C9DOF2_INT_EN_1_RAW_DATA_0_RDY_EN 0x01
334 #define C9DOF2_INT_EN_2_FIFO_OVERFLOW_EN 0x1F
341 #define C9DOF2_INT_ENABLE_3_FIFO_WM_EN 0x1F
348 #define C9DOF2_I2C_MST_STAT_PASS_THROUGH 0x80
349 #define C9DOF2_I2C_MST_STAT_I2C_SLV4_DONE 0x40
350 #define C9DOF2_I2C_MST_STAT_I2C_LOST_ARB 0x20
351 #define C9DOF2_I2C_MST_STAT_I2C_SLV4_NACK 0x10
352 #define C9DOF2_I2C_MST_STAT_I2C_SLV3_NACK 0x08
353 #define C9DOF2_I2C_MST_STAT_I2C_SLV2_NACK 0x04
354 #define C9DOF2_I2C_MST_STAT_I2C_SLV1_NACK 0x02
355 #define C9DOF2_I2C_MST_STAT_I2C_SLV0_NACK 0x01
362 #define C9DOF2_INT_STAT_WOM_INT 0x80
363 #define C9DOF2_INT_STAT_PLL_RDY_INT 0x40
364 #define C9DOF2_INT_STAT_DMP_INT1 0x20
365 #define C9DOF2_INT_STAT_I2C_MST_INT 0x10
372 #define C9DOF2_INT_STAT_1_RAW_DATA_0_RDY_EN 0x01
379 #define C9DOF2_INT_STAT_2_FIFO_OWF_EN 0x1F
386 #define C9DOF2_INT_STAT_3_FIFO_WM_EN 0x1F
393 #define C9DOF2_FIFO_EN_1_SLV_3_FIFO_EN 0x08
394 #define C9DOF2_FIFO_EN_1_SLV_2_FIFO_EN 0x04
395 #define C9DOF2_FIFO_EN_1_SLV_1_FIFO_EN 0x02
396 #define C9DOF2_FIFO_EN_1_SLV_0_FIFO_EN 0x01
403 #define C9DOF2_FIFO_EN_2_ACCEL_FIFO_EN 0x10
404 #define C9DOF2_FIFO_EN_2_GYRO_Z_FIFO_EN 0x08
405 #define C9DOF2_FIFO_EN_2_GYRO_Y_FIFO_EN 0x04
406 #define C9DOF2_FIFO_EN_2_GYRO_X_FIFO_EN 0x02
407 #define C9DOF2_FIFO_EN_2_TEMP_FIFO_EN 0x01
414 #define C9DOF2_FIFO_CFG_CMD 0x01
421 #define C9DOF2_GYRO_CFG_1_DLPFCFG_7 0x38
422 #define C9DOF2_GYRO_CFG_1_DLPFCFG_6 0x30
423 #define C9DOF2_GYRO_CFG_1_DLPFCFG_5 0x28
424 #define C9DOF2_GYRO_CFG_1_DLPFCFG_4 0x20
425 #define C9DOF2_GYRO_CFG_1_DLPFCFG_3 0x18
426 #define C9DOF2_GYRO_CFG_1_DLPFCFG_2 0x10
427 #define C9DOF2_GYRO_CFG_1_DLPFCFG_1 0x08
428 #define C9DOF2_GYRO_CFG_1_DLPFCFG_0 0x00
429 #define C9DOF2_GYRO_CFG_1_FS_SEL_2000 0x06
430 #define C9DOF2_GYRO_CFG_1_FS_SEL_1000 0x04
431 #define C9DOF2_GYRO_CFG_1_FS_SEL_500 0x02
432 #define C9DOF2_GYRO_CFG_1_FS_SEL_250 0x00
433 #define C9DOF2_GYRO_CFG_1_FCHOICE_EN 0x01
434 #define C9DOF2_GYRO_CFG_1_FCHOICE_BP 0x00
441 #define C9DOF2_GYRO_CFG_2_XGYRO_CTEN 0x20
442 #define C9DOF2_GYRO_CFG_2_YGYRO_CTEN 0x10
443 #define C9DOF2_GYRO_CFG_2_ZGYRO_CTEN 0x08
444 #define C9DOF2_GYRO_CFG_2_AVGCFG_7 0x07
445 #define C9DOF2_GYRO_CFG_2_AVGCFG_6 0x06
446 #define C9DOF2_GYRO_CFG_2_AVGCFG_5 0x05
447 #define C9DOF2_GYRO_CFG_2_AVGCFG_4 0x04
448 #define C9DOF2_GYRO_CFG_2_AVGCFG_3 0x03
449 #define C9DOF2_GYRO_CFG_2_AVGCFG_2 0x02
450 #define C9DOF2_GYRO_CFG_2_AVGCFG_1 0x01
451 #define C9DOF2_GYRO_CFG_2_AVGCFG_0 0x00
458 #define C9DOF2_ODR_ALIGN_CMD_EN 0x01
459 #define C9DOF2_ODR_ALIGN_CMD_DIS 0x00
466 #define C9DOF2_ACCEL_INTEL_CTL_INTEL_EN 0x02
467 #define C9DOF2_ACCEL_INTEL_CTL_INTEL_MODE_INT_CURR 0x01
468 #define C9DOF2_ACCEL_INTEL_CTL_INTEL_MODE_INT_INIT 0x00
475 #define C9DOF2_ACCEL_CFG_DLPFCFG_7 0x38
476 #define C9DOF2_ACCEL_CFG_DLPFCFG_6 0x30
477 #define C9DOF2_ACCEL_CFG_DLPFCFG_5 0x28
478 #define C9DOF2_ACCEL_CFG_DLPFCFG_4 0x20
479 #define C9DOF2_ACCEL_CFG_DLPFCFG_3 0x18
480 #define C9DOF2_ACCEL_CFG_DLPFCFG_2 0x10
481 #define C9DOF2_ACCEL_CFG_DLPFCFG_1 0x08
482 #define C9DOF2_ACCEL_CFG_DLPFCFG_0 0x00
483 #define C9DOF2_ACCEL_CFG_FS_SEL_16G 0x06
484 #define C9DOF2_ACCEL_CFG_FS_SEL_8G 0x04
485 #define C9DOF2_ACCEL_CFG_FS_SEL_4G 0x02
486 #define C9DOF2_ACCEL_CFG_FS_SEL_2G 0x00
487 #define C9DOF2_ACCEL_CFG_FCHOICE_EN 0x01
488 #define C9DOF2_ACCEL_CFG_FCHOICE_BP 0x00
495 #define C9DOF2_ACCEL_2_CFG_AX_ST_EN_REG 0x10
496 #define C9DOF2_ACCEL_2_CFG_AY_ST_EN_REG 0x08
497 #define C9DOF2_ACCEL_2_CFG_AZ_ST_EN_REG 0x04
498 #define C9DOF2_ACCEL_2_CFG_DEC3_CFG_32 0x03
499 #define C9DOF2_ACCEL_2_CFG_DEC3_CFG_16 0x02
500 #define C9DOF2_ACCEL_2_CFG_DEC3_CFG_8 0x01
501 #define C9DOF2_ACCEL_2_CFG_DEC3_CFG_4 0x00
502 #define C9DOF2_ACCEL_2_CFG_DEC3_CFG_1 0x00
509 #define C9DOF2_FSYNC_CFG_DELAY_TIME_EN 0x80
510 #define C9DOF2_FSYNC_CFG_WOF_DEGLITCH_EN 0x40
511 #define C9DOF2_FSYNC_CFG_WOF_EDGE_INT 0x20
512 #define C9DOF2_FSYNC_CFG_EXT_SYNC_SET_ACCEL_ZOUT_L 0x07
513 #define C9DOF2_FSYNC_CFG_EXT_SYNC_SET_ACCEL_YOUT_L 0x06
514 #define C9DOF2_FSYNC_CFG_EXT_SYNC_SET_ACCEL_XOUT_L 0x05
515 #define C9DOF2_FSYNC_CFG_EXT_SYNC_SET_GYRO_ZOUT_L 0x04
516 #define C9DOF2_FSYNC_CFG_EXT_SYNC_SET_GYRO_YOUT_L 0x03
517 #define C9DOF2_FSYNC_CFG_EXT_SYNC_SET_GYRO_XOUT_L 0x02
518 #define C9DOF2_FSYNC_CFG_EXT_SYNC_SET_TEMP_OUT_L 0x01
519 #define C9DOF2_FSYNC_CFG_EXT_SYNC_SET_DIS 0x00
526 #define C9DOF2_TEMP_CFG_DLPFCFG_7 0x07
527 #define C9DOF2_TEMP_CFG_DLPFCFG_6 0x06
528 #define C9DOF2_TEMP_CFG_DLPFCFG_5 0x05
529 #define C9DOF2_TEMP_CFG_DLPFCFG_4 0x04
530 #define C9DOF2_TEMP_CFG_DLPFCFG_3 0x03
531 #define C9DOF2_TEMP_CFG_DLPFCFG_2 0x02
532 #define C9DOF2_TEMP_CFG_DLPFCFG_1 0x01
533 #define C9DOF2_TEMP_CFG_DLPFCFG_0 0x00
540 #define C9DOF2_MOD_CTRL_USR_REG_LP_DMP_EN 0x01
541 #define C9DOF2_MOD_CTRL_USR_REG_LP_DMP_DIS 0x00
548 #define C9DOF2_CNTL2_MODE_SELF_TEST 0x10
549 #define C9DOF2_CNTL2_MODE_CONT_MEAS_4 0x08
550 #define C9DOF2_CNTL2_MODE_CONT_MEAS_3 0x06
551 #define C9DOF2_CNTL2_MODE_CONT_MEAS_2 0x04
552 #define C9DOF2_CNTL2_MODE_CONT_MEAS_1 0x02
553 #define C9DOF2_CNTL2_MODE_ONE_SHOT 0x01
554 #define C9DOF2_CNTL2_MODE_POW_DOWN 0x00
561 #define C9DOF2_CNTL3_SOFT_RST 0x01
568 #define C9DOF2_WHO_AM_I_ICM20948_VAL 0xEA
575 #define C9DOF2_GYRO_SENS_FS_SEL_2000 16.4
576 #define C9DOF2_GYRO_SENS_FS_SEL_1000 32.8
577 #define C9DOF2_GYRO_SENS_FS_SEL_500 65.5
578 #define C9DOF2_GYRO_SENS_FS_SEL_250 131.0
579 #define C9DOF2_ACCEL_SENS_FS_SEL_16G 2048.0
580 #define C9DOF2_ACCEL_SENS_FS_SEL_8G 4096.0
581 #define C9DOF2_ACCEL_SENS_FS_SEL_4G 8192.0
582 #define C9DOF2_ACCEL_SENS_FS_SEL_2G 16384.0
589 #define C9DOF2_POWER_ON 0x01
590 #define C9DOF2_POWER_OFF 0x00
597 #define C9DOF2_SNC_LOW 0x00
598 #define C9DOF2_SNC_HIGH 0x01
605 #define C9DOF2_READ_BIT_MASK 0x80
606 #define C9DOF2_WRITE_BIT_MASK 0x7F
Click configuration structure definition.
Definition: c9dof2.h:639
void c9dof2_cfg_setup(c9dof2_cfg_t *cfg)
Config Object Initialization function.
void c9dof2_write_data(c9dof2_t *ctx, uint8_t reg, int16_t wr_data)
Write Data function.
void c9dof2_read_accelerometer(c9dof2_t *ctx, int16_t *accel_x, int16_t *accel_y, int16_t *accel_z)
Read accelerometer data function.
spi_master_chip_select_polarity_t cs_polarity
Definition: c9dof2.h:657
void c9dof2_snc_pin(c9dof2_t *ctx, uint8_t state)
FSYNC Pin State function.
uint8_t c9dof2_read_byte(c9dof2_t *ctx, uint8_t reg)
Read Byte function.
digital_in_t int_pin
Definition: c9dof2.h:627
uint8_t c9dof2_check_int(c9dof2_t *ctx)
Check Interrupt state function.
void c9dof2_write_byte(c9dof2_t *ctx, uint8_t reg, uint8_t wr_data)
Write Byte function.
spi_master_t spi
Definition: c9dof2.h:631
void c9dof2_acceleration_rate(c9dof2_t *ctx, float *x_accel_rte, float *y_accel_rte, float *z_accel_rte)
Read acceleration Rate function.
void c9dof2_power(c9dof2_t *ctx, uint8_t on_off)
Power up function.
C9DOF2_RETVAL c9dof2_init(c9dof2_t *ctx, c9dof2_cfg_t *cfg)
Initialization function.
pin_name_t chip_select
Definition: c9dof2.h:632
void c9dof2_read_gyroscope(c9dof2_t *ctx, int16_t *gyro_x, int16_t *gyro_y, int16_t *gyro_z)
Read gyroscope data function.
Click ctx object definition.
Definition: c9dof2.h:618
#define C9DOF2_RETVAL
Definition: c9dof2.h:67
pin_name_t miso
Definition: c9dof2.h:643
void c9dof2_dev_rst(c9dof2_t *ctx)
Device Reset function.
spi_master_mode_t spi_mode
Definition: c9dof2.h:656
void c9dof2_def_settings(c9dof2_t *ctx)
Default settings function.
pin_name_t mosi
Definition: c9dof2.h:644
void c9dof2_angular_rate(c9dof2_t *ctx, float *x_ang_rte, float *y_ang_rte, float *z_ang_rte)
Read Angular Rate function.
pin_name_t int_pin
Definition: c9dof2.h:651
digital_out_t cs
Definition: c9dof2.h:623
int16_t c9dof2_read_data(c9dof2_t *ctx, uint8_t reg)
Read Data function.
pin_name_t sck
Definition: c9dof2.h:645
pin_name_t snc
Definition: c9dof2.h:650
digital_out_t snc
Definition: c9dof2.h:622
float c9dof2_read_temperature(c9dof2_t *ctx, float temp_offs)
Read temperture function.
pin_name_t cs
Definition: c9dof2.h:646
uint32_t spi_speed
Definition: c9dof2.h:655