ism  2.0.0.0
ism.h
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22 
28 #ifndef ISM_H
29 #define ISM_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
35 #include "drv_digital_out.h"
36 #include "drv_digital_in.h"
37 #include "drv_spi_master.h"
38 
59 #define ISM_REG_BANK_0_CONFIG 0x00
60 #define ISM_REG_BANK_0_EN_AA 0x01
61 #define ISM_REG_BANK_0_EN_RXADDR 0x02
62 #define ISM_REG_BANK_0_SETUP_AW 0x03
63 #define ISM_REG_BANK_0_SETUP_RETR 0x04
64 #define ISM_REG_BANK_0_RF_CH 0x05
65 #define ISM_REG_BANK_0_RF_SETUP 0x06
66 #define ISM_REG_BANK_0_STATUS 0x07
67 #define ISM_REG_BANK_0_OBSERVE_TX 0x08
68 #define ISM_REG_BANK_0_CD 0x09
69 #define ISM_REG_BANK_0_RX_ADDR_P0 0x0A
70 #define ISM_REG_BANK_0_RX_ADDR_P1 0x0B
71 #define ISM_REG_BANK_0_RX_ADDR_P2 0x0C
72 #define ISM_REG_BANK_0_RX_ADDR_P3 0x0D
73 #define ISM_REG_BANK_0_RX_ADDR_P4 0x0E
74 #define ISM_REG_BANK_0_RX_ADDR_P5 0x0F
75 #define ISM_REG_BANK_0_TX_ADDR 0x10
76 #define ISM_REG_BANK_0_RX_PW_P0 0x11
77 #define ISM_REG_BANK_0_RX_PW_P1 0x12
78 #define ISM_REG_BANK_0_RX_PW_P2 0x13
79 #define ISM_REG_BANK_0_RX_PW_P3 0x14
80 #define ISM_REG_BANK_0_RX_PW_P4 0x15
81 #define ISM_REG_BANK_0_RX_PW_P5 0x16
82 #define ISM_REG_BANK_0_FIFO_STATUS 0x17
83 #define ISM_REG_BANK_0_PAYLOAD_WIDTH 0x1F
84 #define ISM_REG_BANK_1_REG_0 0x00
85 #define ISM_REG_BANK_1_REG_1 0x01
86 #define ISM_REG_BANK_1_REG_2 0x02
87 #define ISM_REG_BANK_1_REG_3 0x03
88 #define ISM_REG_BANK_1_REG_4 0x04
89 #define ISM_REG_BANK_1_REG_5 0x05
90 #define ISM_REG_BANK_1_REG_6 0x06
91 #define ISM_REG_BANK_1_REG_7 0x07
92 #define ISM_REG_BANK_1_REG_8 0x08
93 #define ISM_REG_BANK_1_REG_9 0x09
94 #define ISM_REG_BANK_1_REG_A 0x0A
95 #define ISM_REG_BANK_1_REG_B 0x0B
96 #define ISM_REG_BANK_1_REG_C 0x0C
97 #define ISM_REG_BANK_1_REG_D 0x0D
98 #define ISM_REG_BANK_1_REG_E 0x0E
99  // ism_reg
101 
111 #define ISM_CMD_FLUSH_TX 0xE1
112 #define ISM_CMD_FLUSH_RX 0xE2
113 #define ISM_CMD_REUSE_TX_PL 0xE3
114 #define ISM_CMD_W_TX_PAYLOAD_NOACK 0xB0
115 #define ISM_CMD_W_ACK_PAYLOAD 0xA8
116 #define ISM_CMD_ACTIVATE 0x50
117 #define ISM_CMD_R_RX_PL_WID 0x60
118 #define ISM_CMD_NOP_NOP 0xFF
119  // ism_cmd
121 
136 #define ISM_STATUS_RX_DR 0x40
137 #define ISM_STATUS_TX_DS 0x20
138 #define ISM_STATUS_MAX_RT 0x10
139 #define STATUS_TX_FULL 0x01
140 #define ISM_FIFO_STATUS_TX_REUSE 0x40
141 #define ISM_FIFO_STATUS_TX_FULL 0x20
142 #define ISM_FIFO_STATUS_TX_EMPTY 0x10
143 #define ISM_FIFO_STATUS_RX_FULL 0x02
144 #define ISM_FIFO_STATUS_RX_EMPTY 0x01
145 
150 #define ISM_SEL_BANK_0 0
151 #define ISM_SEL_BANK_1 1
152 
157 #define ISM_MAX_PACKET_LEN 32
158 
163 #define ISM_RT_PIN_STATE_LOW 0
164 #define ISM_RT_PIN_STATE_HIGH 1
165 
170 #define ISM_RD_RX_PLOAD 0x61
171 #define ISM_WR_TX_PLOAD 0xA0
172 
177 #define ISM_READ_BIT_MASK 0x00
178 #define ISM_WRITE_BIT_MASK 0x20
179  // ism_set
181 
196 #define ISM_MAP_MIKROBUS( cfg, mikrobus ) \
197  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
198  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
199  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
200  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
201  cfg.tl = MIKROBUS( mikrobus, MIKROBUS_AN ); \
202  cfg.ce = MIKROBUS( mikrobus, MIKROBUS_RST ); \
203  cfg.rl = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
204  cfg.irq = MIKROBUS( mikrobus, MIKROBUS_INT )
205  // ism_map // ism
208 
213 typedef struct
214 {
215  // Output pins
216  digital_out_t tl;
217  digital_out_t ce;
218  digital_out_t rl;
220  // Input pins
221  digital_in_t irq;
223  // Modules
224  spi_master_t spi;
226  pin_name_t chip_select;
228 } ism_t;
229 
234 typedef struct
235 {
236  // Communication gpio pins
237  pin_name_t miso;
238  pin_name_t mosi;
239  pin_name_t sck;
240  pin_name_t cs;
242  // Additional gpio pins
243  pin_name_t tl;
244  pin_name_t ce;
245  pin_name_t rl;
246  pin_name_t irq;
248  // static variable
249  uint32_t spi_speed;
250  spi_master_mode_t spi_mode;
251  spi_master_chip_select_polarity_t cs_polarity;
253 } ism_cfg_t;
254 
259 typedef enum
260 {
261  ISM_OK = 0,
262  ISM_ERROR = -1
263 
265 
281 void ism_cfg_setup ( ism_cfg_t *cfg );
282 
296 err_t ism_init ( ism_t *ctx, ism_cfg_t *cfg );
297 
307 void ism_default_cfg ( ism_t *ctx );
308 
323 err_t ism_generic_write ( ism_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len );
324 
339 err_t ism_generic_read ( ism_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len );
340 
353 err_t ism_set_cmd ( ism_t *ctx, uint8_t cmd, uint8_t cmd_data );
354 
365 void ism_chip_enable ( ism_t *ctx );
366 
377 void ism_chip_disable ( ism_t *ctx );
378 
392 void ism_set_rl_pin_state ( ism_t *ctx, uint8_t rt_pin_state );
393 
407 void ism_set_tl_pin_state ( ism_t *ctx, uint8_t tl_pin_state );
408 
421 
437 err_t ism_switch_bank ( ism_t *ctx, uint8_t bank_sel );
438 
451 err_t ism_switch_rx_mode ( ism_t *ctx );
452 
465 err_t ism_switch_tx_mode ( ism_t *ctx );
466 
479 err_t ism_device_config ( ism_t *ctx );
480 
494 err_t ism_receive_packet ( ism_t *ctx, uint8_t *rx_data );
495 
511 err_t ism_transmit_packet ( ism_t *ctx, uint8_t type, uint8_t *tx_data, uint8_t len );
512 
513 #ifdef __cplusplus
514 }
515 #endif
516 #endif // ISM_H
517  // ism
519 
520 // ------------------------------------------------------------------------ END
ism_generic_read
err_t ism_generic_read(ism_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len)
ISM data reading function.
ism_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: ism.h:250
ism_t::ce
digital_out_t ce
Definition: ism.h:217
ism_cfg_t::rl
pin_name_t rl
Definition: ism.h:245
ism_t::tl
digital_out_t tl
Definition: ism.h:216
ism_t::rl
digital_out_t rl
Definition: ism.h:218
ism_set_tl_pin_state
void ism_set_tl_pin_state(ism_t *ctx, uint8_t tl_pin_state)
ISM TL pin setting function.
ism_switch_rx_mode
err_t ism_switch_rx_mode(ism_t *ctx)
ISM switch RX mode function.
ism_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: ism.h:251
ism_cfg_setup
void ism_cfg_setup(ism_cfg_t *cfg)
ISM configuration object setup function.
ism_default_cfg
void ism_default_cfg(ism_t *ctx)
ISM default configuration function.
ism_generic_write
err_t ism_generic_write(ism_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len)
ISM data writing function.
ISM_ERROR
@ ISM_ERROR
Definition: ism.h:262
ism_check_interrupt_request
uint8_t ism_check_interrupt_request(ism_t *ctx)
ISM check interrupt request function.
ism_t
ISM Click context object.
Definition: ism.h:214
ISM_OK
@ ISM_OK
Definition: ism.h:261
ism_cfg_t::spi_speed
uint32_t spi_speed
Definition: ism.h:249
ism_switch_tx_mode
err_t ism_switch_tx_mode(ism_t *ctx)
ISM switch TX mode function.
ism_set_cmd
err_t ism_set_cmd(ism_t *ctx, uint8_t cmd, uint8_t cmd_data)
ISM set command function.
ism_switch_bank
err_t ism_switch_bank(ism_t *ctx, uint8_t bank_sel)
ISM switch bank function.
ism_receive_packet
err_t ism_receive_packet(ism_t *ctx, uint8_t *rx_data)
ISM receive packet function.
ism_cfg_t::mosi
pin_name_t mosi
Definition: ism.h:238
ism_cfg_t::tl
pin_name_t tl
Definition: ism.h:243
ism_cfg_t::irq
pin_name_t irq
Definition: ism.h:246
ism_cfg_t::miso
pin_name_t miso
Definition: ism.h:237
ism_t::spi
spi_master_t spi
Definition: ism.h:224
ism_chip_enable
void ism_chip_enable(ism_t *ctx)
ISM set chip enable function.
ism_t::chip_select
pin_name_t chip_select
Definition: ism.h:226
ism_device_config
err_t ism_device_config(ism_t *ctx)
ISM device configuration function.
ism_cfg_t::cs
pin_name_t cs
Definition: ism.h:240
ism_t::irq
digital_in_t irq
Definition: ism.h:221
ism_set_rl_pin_state
void ism_set_rl_pin_state(ism_t *ctx, uint8_t rt_pin_state)
ISM RL pin setting function.
ism_chip_disable
void ism_chip_disable(ism_t *ctx)
ISM set chip disable function.
ism_cfg_t
ISM Click configuration object.
Definition: ism.h:235
ism_init
err_t ism_init(ism_t *ctx, ism_cfg_t *cfg)
ISM initialization function.
ism_cfg_t::sck
pin_name_t sck
Definition: ism.h:239
ism_cfg_t::ce
pin_name_t ce
Definition: ism.h:244
ism_transmit_packet
err_t ism_transmit_packet(ism_t *ctx, uint8_t type, uint8_t *tx_data, uint8_t len)
ISM transmit package function.
ism_return_value_t
ism_return_value_t
ISM Click return value data.
Definition: ism.h:260