ecg4  2.0.0.0
ecg4.h
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1 /*
2  * MikroSDK - MikroE Software Development Kit
3  * Copyright (c) 2019, MikroElektronika - www.mikroe.com
4  * All rights reserved.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22  * SOFTWARE.
23  */
24 
33 // ----------------------------------------------------------------------------
34 
35 #ifndef ECG4_H
36 #define ECG4_H
37 
38 #include "mikrosdk_version.h"
39 
40 #ifdef __GNUC__
41 #if mikroSDK_GET_VERSION < 20800ul
42 #include "rcu_delays.h"
43 #else
44 #include "delays.h"
45 #endif
46 #endif
47 
48 #include "drv_digital_out.h"
49 #include "drv_digital_in.h"
50 #include "drv_uart.h"
51 
52 // -------------------------------------------------------------- PUBLIC MACROS
62 #define ECG4_MAP_MIKROBUS( cfg, mikrobus ) \
63  cfg.tx_pin = MIKROBUS( mikrobus, MIKROBUS_TX ); \
64  cfg.rx_pin = MIKROBUS( mikrobus, MIKROBUS_RX ); \
65  cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
66  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS )
67 
73 #define ECG4_RETVAL uint8_t
74 
75 #define ECG4_OK 0x00
76 #define ECG4_INIT_ERROR 0xFF
77 
79 #define ECG4_SYNC_BYTE 0xAA
80 #define ECG4_EXCODE_BYTE 0x55
81 #define ECG4_SIGNAL_QUALITY_CODE_BYTE 0x02
82 #define ECG4_HEART_RATE_CODE_BYTE 0x03
83 #define ECG4_RAW_DATA_CODE_BYTE 0x80
84 #define ECG4_RESPONSE_READY 0x01
85 #define ECG4_RESPONSE_NOT_READY 0x00
86 #define ECG4_ENABLE_LDO_CTRL 0x01
87 #define ECG4_DISABLE_LDO_CTRL 0x00
88 
93 #define DRV_RX_BUFFER_SIZE 1000
94 #define DRV_TX_BUFFER_SIZE 50
95  // End group macro
98 // --------------------------------------------------------------- PUBLIC TYPES
99 
109 typedef void ( *ecg4_hdl_t )( uint8_t*, uint8_t*, uint8_t*, uint8_t* );
110 
114 typedef struct
115 {
116  // Output pins
117 
118  digital_out_t rst;
119  digital_out_t cs;
120 
121  // Modules
122 
123  uart_t uart;
124 
125  char uart_rx_buffer[ DRV_RX_BUFFER_SIZE ];
126  char uart_tx_buffer[ DRV_TX_BUFFER_SIZE ];
127 
129  uint8_t response_ready;
130 
131 } ecg4_t;
132 
136 typedef struct
137 {
138  // Communication gpio pins
139 
140  pin_name_t rx_pin;
141  pin_name_t tx_pin;
142 
143  // Additional gpio pins
144 
145  pin_name_t rst;
146  pin_name_t cs;
147 
148  // static variable
149 
150  uint32_t baud_rate; // Clock speed.
152  uart_data_bits_t data_bit; // Data bits.
153  uart_parity_t parity_bit; // Parity bit.
154  uart_stop_bits_t stop_bit; // Stop bits.
155 
156 } ecg4_cfg_t;
157 
161 typedef uint8_t ecg4_error_t;
162  // End types group
164 // ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
165 
171 #ifdef __cplusplus
172 extern "C"{
173 #endif
174 
184 
194 
199 void ecg4_module_reset ( ecg4_t *ctx );
200 
207 void ecg4_generic_write ( ecg4_t *ctx, char *data_buf, uint16_t len );
208 
216 int32_t ecg4_generic_read ( ecg4_t *ctx, char *data_buf, uint16_t max_len );
217 
232 void ecg4_enable_ldo_ctrl ( ecg4_t *ctx, uint8_t state );
233 
241 void ecg4_uart_isr( ecg4_t *ctx, uint8_t rx_dat );
242 
250 uint8_t ecg4_responseReady( ecg4_t *ctx );
251 
252 #ifdef __cplusplus
253 }
254 #endif
255 #endif // _ECG4_H_
256  // End public_function group
259 
260 // ------------------------------------------------------------------------- END
DRV_RX_BUFFER_SIZE
#define DRV_RX_BUFFER_SIZE
Definition: ecg4.h:93
ecg4_cfg_t::baud_rate
uint32_t baud_rate
Definition: ecg4.h:150
ecg4_cfg_t::rst
pin_name_t rst
Definition: ecg4.h:145
ecg4_hdl_t
void(* ecg4_hdl_t)(uint8_t *, uint8_t *, uint8_t *, uint8_t *)
Definition: ecg4.h:109
ecg4_error_t
uint8_t ecg4_error_t
Error type.
Definition: ecg4.h:161
ecg4_cfg_t::stop_bit
uart_stop_bits_t stop_bit
Definition: ecg4.h:154
ecg4_t::response_ready
uint8_t response_ready
Definition: ecg4.h:129
ecg4_t::cs
digital_out_t cs
Definition: ecg4.h:119
ecg4_t
Click ctx object definition.
Definition: ecg4.h:115
ecg4_module_reset
void ecg4_module_reset(ecg4_t *ctx)
Reset module.
ecg4_cfg_t::cs
pin_name_t cs
Definition: ecg4.h:146
ecg4_uart_isr
void ecg4_uart_isr(ecg4_t *ctx, uint8_t rx_dat)
Uart Interrupt Routine function.
ecg4_cfg_t::rx_pin
pin_name_t rx_pin
Definition: ecg4.h:140
ecg4_cfg_t
Click configuration structure definition.
Definition: ecg4.h:137
ecg4_cfg_setup
void ecg4_cfg_setup(ecg4_cfg_t *cfg)
Config Object Initialization function.
ecg4_generic_write
void ecg4_generic_write(ecg4_t *ctx, char *data_buf, uint16_t len)
Generic write function.
ecg4_t::uart
uart_t uart
Definition: ecg4.h:123
ecg4_cfg_t::parity_bit
uart_parity_t parity_bit
Definition: ecg4.h:153
ECG4_RETVAL
#define ECG4_RETVAL
Definition: ecg4.h:73
ecg4_t::rst
digital_out_t rst
Definition: ecg4.h:118
ecg4_enable_ldo_ctrl
void ecg4_enable_ldo_ctrl(ecg4_t *ctx, uint8_t state)
LDO Control function.
ecg4_generic_read
int32_t ecg4_generic_read(ecg4_t *ctx, char *data_buf, uint16_t max_len)
Generic read function.
DRV_TX_BUFFER_SIZE
#define DRV_TX_BUFFER_SIZE
Definition: ecg4.h:94
ecg4_cfg_t::tx_pin
pin_name_t tx_pin
Definition: ecg4.h:141
ecg4_responseReady
uint8_t ecg4_responseReady(ecg4_t *ctx)
Response ready check function.
ecg4_cfg_t::data_bit
uart_data_bits_t data_bit
Definition: ecg4.h:152
ecg4_t::driver_hdl
ecg4_hdl_t driver_hdl
Definition: ecg4.h:128
ecg4_init
ECG4_RETVAL ecg4_init(ecg4_t *ctx, ecg4_cfg_t *cfg)
Initialization function.
ecg4_cfg_t::uart_blocking
bool uart_blocking
Definition: ecg4.h:151