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38 #include "drv_digital_out.h"
39 #include "drv_digital_in.h"
53 #define ENOCEAN3_MAP_MIKROBUS( cfg, mikrobus ) \
54 cfg.tx_pin = MIKROBUS( mikrobus, MIKROBUS_TX ); \
55 cfg.rx_pin = MIKROBUS( mikrobus, MIKROBUS_RX ); \
56 cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST )
64 #define ENOCEAN3_RETVAL uint8_t
66 #define ENOCEAN3_OK 0x00
67 #define ENOCEAN3_INIT_ERROR 0xFF
74 #define DRV_RX_BUFFER_SIZE 500
75 #define DRV_TX_BUFFER_SIZE 100
79 #define ENOCEAN3_SYNC_BYTE 0x55
80 #define ENOCEAN3_MAX_BUFF_SIZE 256
81 #define ENOCEAN3_HEADER_SIZE 0x04
82 #define ENOCEAN3_BUFF_EMPTY 0x00
85 #define ENOCEAN3_RESPONSE_READY 0x01
86 #define ENOCEAN3_RESPONSE_NOT_READY 0x00
87 #define ENOCEAN3_UART_RX_READY 0x01
88 #define ENOCEAN3_UART_RX_NOT_READY 0x00
89 #define ENOCEAN3_OK 0x00
90 #define ENOCEAN3_INVALID_PACKET_SIZE 0x01
92 #define ENOCEAN3_PACK_TYPE_EVENT 0x04
93 #define ENOCEAN3_PACK_TYPE_COMMON_COMMAND 0x05
94 #define ENOCEAN3_CO_EVENT_SECUREDEVICES 0x05
95 #define ENOCEAN3_CO_WR_FILTER_ADD 0x0B
96 #define ENOCEAN3_CO_WR_FILTER_ENABLE 0x0E
97 #define ENOCEAN3_CO_WR_REPEATER 0x09
98 #define ENOCEAN3_CO_SET_NOISETHRESHOLD 0x32
100 #define ENOCEAN3_FILT_TYPE_SOURCE_ID 0x00
101 #define ENOCEAN3_FILT_TYPE_R_ORG 0x01
102 #define ENOCEAN3_FILT_TYPE_RSSI 0x02
103 #define ENOCEAN3_FILT_TYPE_DEST_ID 0x03
104 #define ENOCEAN3_FILT_KIND_NEG_TEL_FWRD 0x00
105 #define ENOCEAN3_FILT_KIND_POS_TEL_FWRD 0x80
106 #define ENOCEAN3_FILT_KIND_NEG_TEL_RPT 0x40
107 #define ENOCEAN3_FILT_KIND_POS_TEL_RPT 0xC0
108 #define ENOCEAN3_FILT_FWRD_OFF 0x00
109 #define ENOCEAN3_FILT_FWRD_ON 0x01
110 #define ENOCEAN3_FILT_OP_OR_ALL_FILT 0x00
111 #define ENOCEAN3_FILT_OP_AND_ALL_FILT 0x01
112 #define ENOCEAN3_FILT_OP_OR_RADIO_INTER_AND_FILT_RPT 0x08
113 #define ENOCEAN3_FILT_OP_AND_RADIO_INTER_OR_FILT_RPT 0x09
114 #define ENOCEAN3_RPT_OFF 0x00
115 #define ENOCEAN3_RPT_ALL_TELEG 0x01
116 #define ENOCEAN3_RPT_SELECTIVE 0x02
117 #define ENOCEAN3_RPT_LEVEL_OFF 0x00
118 #define ENOCEAN3_RPT_LEVEL_ONE 0x01
119 #define ENOCEAN3_RPT_LEVEL_TWO 0x02
120 #define ENOCEAN3_RSSI_LEVEL_100_DBM_NEG 0x2E
121 #define ENOCEAN3_RSSI_LEVEL_99_DBM_NEG 0x2F
122 #define ENOCEAN3_RSSI_LEVEL_98_DBM_NEG 0x30
123 #define ENOCEAN3_RSSI_LEVEL_97_DBM_NEG 0x31
124 #define ENOCEAN3_RSSI_LEVEL_96_DBM_NEG 0x32
125 #define ENOCEAN3_RSSI_LEVEL_95_DBM_NEG 0x33
126 #define ENOCEAN3_RSSI_LEVEL_94_DBM_NEG 0x34
127 #define ENOCEAN3_RSSI_LEVEL_93_DBM_NEG 0x35
128 #define ENOCEAN3_RSSI_LEVEL_92_DBM_NEG 0x36
129 #define ENOCEAN3_RSSI_LEVEL_91_DBM_NEG 0x37
130 #define ENOCEAN3_RSSI_LEVEL_90_DBM_NEG 0x38
142 uint16_t data_length;
145 uint8_t data_buff[ 256 ];
304 #endif // _ENOCEAN3_H_
uint8_t enocean3_response_ready(enocean3_t *ctx)
Response Ready function.
pin_name_t rx_pin
Definition: enocean3.h:179
#define DRV_RX_BUFFER_SIZE
Definition: enocean3.h:74
Click ctx object definition.
Definition: enocean3.h:155
uint8_t enocean3_error_t
Error type.
Definition: enocean3.h:199
#define ENOCEAN3_RETVAL
Definition: enocean3.h:64
void enocean3_response_handler_set(enocean3_t *ctx, enocean3_hdl_t handler)
Handler Set function.
enocean3_hdl_t driver_hdl
Definition: enocean3.h:167
uint8_t response_ready
Definition: enocean3.h:168
int32_t enocean3_generic_read(enocean3_t *ctx, char *data_buf, uint16_t max_len)
Generic read function.
Click configuration structure definition.
Definition: enocean3.h:176
pin_name_t tx_pin
Definition: enocean3.h:180
uart_t uart
Definition: enocean3.h:162
void enocean3_cfg_setup(enocean3_cfg_t *cfg)
Config Object Initialization function.
void enocean3_set_rst_pin(enocean3_t *ctx, uint8_t state)
Set RST ( reset ) pin state.
pin_name_t rst
Definition: enocean3.h:184
uart_stop_bits_t stop_bit
Definition: enocean3.h:192
uint32_t baud_rate
Definition: enocean3.h:188
uint8_t enocean3_send_packet(enocean3_t *ctx, enocean3_packet_t *packet)
Packet Send function.
uart_data_bits_t data_bit
Definition: enocean3.h:190
digital_out_t rst
Definition: enocean3.h:158
#define DRV_TX_BUFFER_SIZE
Definition: enocean3.h:75
void enocean3_uart_isr(enocean3_t *ctx)
UART Interrupt Routine function.
bool uart_blocking
Definition: enocean3.h:189
ENOCEAN3_RETVAL enocean3_init(enocean3_t *ctx, enocean3_cfg_t *cfg)
Initialization function.
Definition: enocan3.h:190
void(* enocean3_hdl_t)(enocean3_packet_t *, uint16_t *)
Definition: enocean3.h:149
uart_parity_t parity_bit
Definition: enocean3.h:191
void enocean3_generic_write(enocean3_t *ctx, char *data_buf, uint16_t len)
Generic write function.