enocean 2.0.0.0
enocean.h
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1/*
2 * MikroSDK - MikroE Software Development Kit
3 * Copyright© 2020 MikroElektronika d.o.o.
4 *
5 * Permission is hereby granted, free of charge, to any person
6 * obtaining a copy of this software and associated documentation
7 * files (the "Software"), to deal in the Software without restriction,
8 * including without limitation the rights to use, copy, modify, merge,
9 * publish, distribute, sublicense, and/or sell copies of the Software,
10 * and to permit persons to whom the Software is furnished to do so,
11 * subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22 * OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
33// ----------------------------------------------------------------------------
34
35#ifndef ENOCEAN_H
36#define ENOCEAN_H
37
38#include "drv_digital_out.h"
39#include "drv_digital_in.h"
40#include "drv_uart.h"
41
42
43// -------------------------------------------------------------- PUBLIC MACROS
53#define ENOCEAN_MAP_MIKROBUS( cfg, mikrobus ) \
54 cfg.tx_pin = MIKROBUS( mikrobus, MIKROBUS_TX ); \
55 cfg.rx_pin = MIKROBUS( mikrobus, MIKROBUS_RX ); \
56 cfg.en = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
57 cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST )
58
65#define ENOCEAN_RETVAL uint8_t
66
67#define ENOCEAN_OK 0x00
68#define ENOCEAN_INIT_ERROR 0xFF
75#define DRV_RX_BUFFER_SIZE 500
76#define DRV_TX_BUFFER_SIZE 100
80#define ENOCEAN_SYNC_BYTE 0x55
81#define ENOCEAN_MAX_BUFF_SIZE 256
82#define ENOCEAN_HEADER_SIZE 0x04
83#define ENOCEAN_BUFF_EMPTY 0x00
84
85
86#define ENOCEAN_RESPONSE_READY 0x01
87#define ENOCEAN_RESPONSE_NOT_READY 0x00
88#define ENOCEAN_UART_RX_READY 0x01
89#define ENOCEAN_UART_RX_NOT_READY 0x00
90#define ENOCEAN_OK 0x00
91#define ENOCEAN_INVALID_PACKET_SIZE 0x01
92
93#define ENOCEAN_PACK_TYPE_EVENT 0x04
94#define ENOCEAN_PACK_TYPE_COMMON_COMMAND 0x05
95#define ENOCEAN_CO_EVENT_SECUREDEVICES 0x05
96#define ENOCEAN_CO_WR_FILTER_ADD 0x0B
97#define ENOCEAN_CO_WR_FILTER_ENABLE 0x0E
98#define ENOCEAN_CO_WR_REPEATER 0x09
99#define ENOCEAN_CO_SET_NOISETHRESHOLD 0x32
100
101#define ENOCEAN_FILT_TYPE_SOURCE_ID 0x00
102#define ENOCEAN_FILT_TYPE_R_ORG 0x01
103#define ENOCEAN_FILT_TYPE_RSSI 0x02
104#define ENOCEAN_FILT_TYPE_DEST_ID 0x03
105#define ENOCEAN_FILT_KIND_NEG_TEL_FWRD 0x00
106#define ENOCEAN_FILT_KIND_POS_TEL_FWRD 0x80
107#define ENOCEAN_FILT_KIND_NEG_TEL_RPT 0x40
108#define ENOCEAN_FILT_KIND_POS_TEL_RPT 0xC0
109#define ENOCEAN_FILT_FWRD_OFF 0x00
110#define ENOCEAN_FILT_FWRD_ON 0x01
111#define ENOCEAN_FILT_OP_OR_ALL_FILT 0x00
112#define ENOCEAN_FILT_OP_AND_ALL_FILT 0x01
113#define ENOCEAN_FILT_OP_OR_RADIO_INTER_AND_FILT_RPT 0x08
114#define ENOCEAN_FILT_OP_AND_RADIO_INTER_OR_FILT_RPT 0x09
115#define ENOCEAN_RPT_OFF 0x00
116#define ENOCEAN_RPT_ALL_TELEG 0x01
117#define ENOCEAN_RPT_SELECTIVE 0x02
118#define ENOCEAN_RPT_LEVEL_OFF 0x00
119#define ENOCEAN_RPT_LEVEL_ONE 0x01
120#define ENOCEAN_RPT_LEVEL_TWO 0x02
121#define ENOCEAN_RSSI_LEVEL_100_DBM_NEG 0x2E
122#define ENOCEAN_RSSI_LEVEL_99_DBM_NEG 0x2F
123#define ENOCEAN_RSSI_LEVEL_98_DBM_NEG 0x30
124#define ENOCEAN_RSSI_LEVEL_97_DBM_NEG 0x31
125#define ENOCEAN_RSSI_LEVEL_96_DBM_NEG 0x32
126#define ENOCEAN_RSSI_LEVEL_95_DBM_NEG 0x33
127#define ENOCEAN_RSSI_LEVEL_94_DBM_NEG 0x34
128#define ENOCEAN_RSSI_LEVEL_93_DBM_NEG 0x35
129#define ENOCEAN_RSSI_LEVEL_92_DBM_NEG 0x36
130#define ENOCEAN_RSSI_LEVEL_91_DBM_NEG 0x37
131#define ENOCEAN_RSSI_LEVEL_90_DBM_NEG 0x38
132 // End group macro
134// --------------------------------------------------------------- PUBLIC TYPES /** @{ */
140
141typedef struct {
142
143 uint16_t data_length;
144 uint8_t opt_length;
145 uint8_t packet_type;
146 uint8_t data_buff[ 256 ];
147
149
150typedef void ( *enocean_hdl_t )( enocean_packet_t*, uint16_t* );
151
155typedef struct
156{
157 // Output pins
158
159 digital_out_t rst;
160 digital_out_t en;
161
162 // Modules
163
164 uart_t uart;
165
166 char uart_rx_buffer[ DRV_RX_BUFFER_SIZE ];
167 char uart_tx_buffer[ DRV_TX_BUFFER_SIZE ];
168
171
172} enocean_t;
173
177typedef struct
178{
179 // Communication gpio pins
180
181 pin_name_t rx_pin;
182 pin_name_t tx_pin;
183
184 // Additional gpio pins
185
186 pin_name_t rst;
187 pin_name_t en;
188
189 // static variable
190
191 uint32_t baud_rate; // Clock speed.
193 uart_data_bits_t data_bit; // Data bits.
194 uart_parity_t parity_bit; // Parity bit.
195 uart_stop_bits_t stop_bit; // Stop bits.
196
198
202typedef uint8_t enocean_error_t;
203 // End types group
205
206// ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
207
213#ifdef __cplusplus
214extern "C"{
215#endif
216
226
235
241void enocean_set_rst_pin ( enocean_t *ctx, uint8_t state );
242
249void enocean_generic_write ( enocean_t *ctx, char *data_buf, uint16_t len );
250
258int32_t enocean_generic_read ( enocean_t *ctx, char *data_buf, uint16_t max_len );
259
269
281
292
302
303
304#ifdef __cplusplus
305}
306#endif
307#endif // _ENOCEAN_H_
308 // End public_function group
311
312// ------------------------------------------------------------------------- END
void(* enocean_hdl_t)(enocean_packet_t *, uint16_t *)
Definition: enocean.h:150
uint8_t enocean_error_t
Error type.
Definition: enocean.h:202
#define DRV_RX_BUFFER_SIZE
Definition: enocean.h:75
#define DRV_TX_BUFFER_SIZE
Definition: enocean.h:76
#define ENOCEAN_RETVAL
Definition: enocean.h:65
void enocean_generic_write(enocean_t *ctx, char *data_buf, uint16_t len)
Generic write function.
void enocean_cfg_setup(enocean_cfg_t *cfg)
Config Object Initialization function.
void enocean_response_handler_set(enocean_t *ctx, enocean_hdl_t handler)
Handler Set function.
uint8_t enocean_response_ready(enocean_t *ctx)
Response Ready function.
uint8_t enocean_send_packet(enocean_t *ctx, enocean_packet_t *packet)
Packet Send function.
ENOCEAN_RETVAL enocean_init(enocean_t *ctx, enocean_cfg_t *cfg)
Initialization function.
int32_t enocean_generic_read(enocean_t *ctx, char *data_buf, uint16_t max_len)
Generic read function.
void enocean_set_rst_pin(enocean_t *ctx, uint8_t state)
Set RST ( reset ) pin state.
void enocean_uart_isr(enocean_t *ctx)
UART Interrupt Routine function.
Click configuration structure definition.
Definition: enocean.h:178
uint32_t baud_rate
Definition: enocean.h:191
bool uart_blocking
Definition: enocean.h:192
uart_data_bits_t data_bit
Definition: enocean.h:193
pin_name_t tx_pin
Definition: enocean.h:182
pin_name_t rx_pin
Definition: enocean.h:181
uart_stop_bits_t stop_bit
Definition: enocean.h:195
pin_name_t en
Definition: enocean.h:187
uart_parity_t parity_bit
Definition: enocean.h:194
pin_name_t rst
Definition: enocean.h:186
Definition: enocean.h:141
uint16_t data_length
Definition: enocean.h:143
uint8_t opt_length
Definition: enocean.h:144
uint8_t packet_type
Definition: enocean.h:145
Click ctx object definition.
Definition: enocean.h:156
uint8_t response_ready
Definition: enocean.h:170
enocean_hdl_t driver_hdl
Definition: enocean.h:169
uart_t uart
Definition: enocean.h:164
digital_out_t en
Definition: enocean.h:160
digital_out_t rst
Definition: enocean.h:159