enocean  2.0.0.0
enocean.h
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1 /*
2  * MikroSDK - MikroE Software Development Kit
3  * Copyright© 2020 MikroElektronika d.o.o.
4  *
5  * Permission is hereby granted, free of charge, to any person
6  * obtaining a copy of this software and associated documentation
7  * files (the "Software"), to deal in the Software without restriction,
8  * including without limitation the rights to use, copy, modify, merge,
9  * publish, distribute, sublicense, and/or sell copies of the Software,
10  * and to permit persons to whom the Software is furnished to do so,
11  * subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be
14  * included in all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19  * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22  * OR OTHER DEALINGS IN THE SOFTWARE.
23  */
24 
33 // ----------------------------------------------------------------------------
34 
35 #ifndef ENOCEAN_H
36 #define ENOCEAN_H
37 
38 #include "mikrosdk_version.h"
39 
40 #ifdef __GNUC__
41 #if mikroSDK_GET_VERSION < 20800ul
42 #include "rcu_delays.h"
43 #else
44 #include "delays.h"
45 #endif
46 #endif
47 
48 #include "drv_digital_out.h"
49 #include "drv_digital_in.h"
50 #include "drv_uart.h"
51 
52 
53 // -------------------------------------------------------------- PUBLIC MACROS
63 #define ENOCEAN_MAP_MIKROBUS( cfg, mikrobus ) \
64  cfg.tx_pin = MIKROBUS( mikrobus, MIKROBUS_TX ); \
65  cfg.rx_pin = MIKROBUS( mikrobus, MIKROBUS_RX ); \
66  cfg.en = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
67  cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST )
68 
75 #define ENOCEAN_RETVAL uint8_t
76 
77 #define ENOCEAN_OK 0x00
78 #define ENOCEAN_INIT_ERROR 0xFF
79 
85 #define DRV_RX_BUFFER_SIZE 500
86 #define DRV_TX_BUFFER_SIZE 100
87 
90 #define ENOCEAN_SYNC_BYTE 0x55
91 #define ENOCEAN_MAX_BUFF_SIZE 256
92 #define ENOCEAN_HEADER_SIZE 0x04
93 #define ENOCEAN_BUFF_EMPTY 0x00
94 
95 
96 #define ENOCEAN_RESPONSE_READY 0x01
97 #define ENOCEAN_RESPONSE_NOT_READY 0x00
98 #define ENOCEAN_UART_RX_READY 0x01
99 #define ENOCEAN_UART_RX_NOT_READY 0x00
100 #define ENOCEAN_OK 0x00
101 #define ENOCEAN_INVALID_PACKET_SIZE 0x01
102 
103 #define ENOCEAN_PACK_TYPE_EVENT 0x04
104 #define ENOCEAN_PACK_TYPE_COMMON_COMMAND 0x05
105 #define ENOCEAN_CO_EVENT_SECUREDEVICES 0x05
106 #define ENOCEAN_CO_WR_FILTER_ADD 0x0B
107 #define ENOCEAN_CO_WR_FILTER_ENABLE 0x0E
108 #define ENOCEAN_CO_WR_REPEATER 0x09
109 #define ENOCEAN_CO_SET_NOISETHRESHOLD 0x32
110 
111 #define ENOCEAN_FILT_TYPE_SOURCE_ID 0x00
112 #define ENOCEAN_FILT_TYPE_R_ORG 0x01
113 #define ENOCEAN_FILT_TYPE_RSSI 0x02
114 #define ENOCEAN_FILT_TYPE_DEST_ID 0x03
115 #define ENOCEAN_FILT_KIND_NEG_TEL_FWRD 0x00
116 #define ENOCEAN_FILT_KIND_POS_TEL_FWRD 0x80
117 #define ENOCEAN_FILT_KIND_NEG_TEL_RPT 0x40
118 #define ENOCEAN_FILT_KIND_POS_TEL_RPT 0xC0
119 #define ENOCEAN_FILT_FWRD_OFF 0x00
120 #define ENOCEAN_FILT_FWRD_ON 0x01
121 #define ENOCEAN_FILT_OP_OR_ALL_FILT 0x00
122 #define ENOCEAN_FILT_OP_AND_ALL_FILT 0x01
123 #define ENOCEAN_FILT_OP_OR_RADIO_INTER_AND_FILT_RPT 0x08
124 #define ENOCEAN_FILT_OP_AND_RADIO_INTER_OR_FILT_RPT 0x09
125 #define ENOCEAN_RPT_OFF 0x00
126 #define ENOCEAN_RPT_ALL_TELEG 0x01
127 #define ENOCEAN_RPT_SELECTIVE 0x02
128 #define ENOCEAN_RPT_LEVEL_OFF 0x00
129 #define ENOCEAN_RPT_LEVEL_ONE 0x01
130 #define ENOCEAN_RPT_LEVEL_TWO 0x02
131 #define ENOCEAN_RSSI_LEVEL_100_DBM_NEG 0x2E
132 #define ENOCEAN_RSSI_LEVEL_99_DBM_NEG 0x2F
133 #define ENOCEAN_RSSI_LEVEL_98_DBM_NEG 0x30
134 #define ENOCEAN_RSSI_LEVEL_97_DBM_NEG 0x31
135 #define ENOCEAN_RSSI_LEVEL_96_DBM_NEG 0x32
136 #define ENOCEAN_RSSI_LEVEL_95_DBM_NEG 0x33
137 #define ENOCEAN_RSSI_LEVEL_94_DBM_NEG 0x34
138 #define ENOCEAN_RSSI_LEVEL_93_DBM_NEG 0x35
139 #define ENOCEAN_RSSI_LEVEL_92_DBM_NEG 0x36
140 #define ENOCEAN_RSSI_LEVEL_91_DBM_NEG 0x37
141 #define ENOCEAN_RSSI_LEVEL_90_DBM_NEG 0x38
142  // End group macro
144 // --------------------------------------------------------------- PUBLIC TYPES /** @{ */
150 
151 typedef struct {
152 
153  uint16_t data_length;
154  uint8_t opt_length;
155  uint8_t packet_type;
156  uint8_t data_buff[ 256 ];
157 
159 
160 typedef void ( *enocean_hdl_t )( enocean_packet_t*, uint16_t* );
161 
165 typedef struct
166 {
167  // Output pins
168 
169  digital_out_t rst;
170  digital_out_t en;
171 
172  // Modules
173 
174  uart_t uart;
175 
176  char uart_rx_buffer[ DRV_RX_BUFFER_SIZE ];
177  char uart_tx_buffer[ DRV_TX_BUFFER_SIZE ];
178 
180  uint8_t response_ready;
181 
182 } enocean_t;
183 
187 typedef struct
188 {
189  // Communication gpio pins
190 
191  pin_name_t rx_pin;
192  pin_name_t tx_pin;
193 
194  // Additional gpio pins
195 
196  pin_name_t rst;
197  pin_name_t en;
198 
199  // static variable
200 
201  uint32_t baud_rate; // Clock speed.
203  uart_data_bits_t data_bit; // Data bits.
204  uart_parity_t parity_bit; // Parity bit.
205  uart_stop_bits_t stop_bit; // Stop bits.
206 
207 } enocean_cfg_t;
208 
212 typedef uint8_t enocean_error_t;
213  // End types group
215 
216 // ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
217 
223 #ifdef __cplusplus
224 extern "C"{
225 #endif
226 
236 
245 
251 void enocean_set_rst_pin ( enocean_t *ctx, uint8_t state );
252 
259 void enocean_generic_write ( enocean_t *ctx, char *data_buf, uint16_t len );
260 
268 int32_t enocean_generic_read ( enocean_t *ctx, char *data_buf, uint16_t max_len );
269 
279 
291 
302 
312 
313 
314 #ifdef __cplusplus
315 }
316 #endif
317 #endif // _ENOCEAN_H_
318  // End public_function group
321 
322 // ------------------------------------------------------------------------- END
DRV_RX_BUFFER_SIZE
#define DRV_RX_BUFFER_SIZE
Definition: enocean.h:85
enocean_response_ready
uint8_t enocean_response_ready(enocean_t *ctx)
Response Ready function.
enocean_cfg_t::stop_bit
uart_stop_bits_t stop_bit
Definition: enocean.h:205
enocean_t::rst
digital_out_t rst
Definition: enocean.h:169
enocean_response_handler_set
void enocean_response_handler_set(enocean_t *ctx, enocean_hdl_t handler)
Handler Set function.
enocean_packet_t
Definition: enocean.h:151
enocean_packet_t::packet_type
uint8_t packet_type
Definition: enocean.h:155
enocean_cfg_t::en
pin_name_t en
Definition: enocean.h:197
enocean_cfg_t::baud_rate
uint32_t baud_rate
Definition: enocean.h:201
enocean_init
ENOCEAN_RETVAL enocean_init(enocean_t *ctx, enocean_cfg_t *cfg)
Initialization function.
enocean_send_packet
uint8_t enocean_send_packet(enocean_t *ctx, enocean_packet_t *packet)
Packet Send function.
enocean_hdl_t
void(* enocean_hdl_t)(enocean_packet_t *, uint16_t *)
Definition: enocean.h:160
ENOCEAN_RETVAL
#define ENOCEAN_RETVAL
Definition: enocean.h:75
enocean_t::uart
uart_t uart
Definition: enocean.h:174
enocean_cfg_setup
void enocean_cfg_setup(enocean_cfg_t *cfg)
Config Object Initialization function.
enocean_cfg_t::tx_pin
pin_name_t tx_pin
Definition: enocean.h:192
enocean_cfg_t::uart_blocking
bool uart_blocking
Definition: enocean.h:202
enocean_error_t
uint8_t enocean_error_t
Error type.
Definition: enocean.h:212
enocean_generic_read
int32_t enocean_generic_read(enocean_t *ctx, char *data_buf, uint16_t max_len)
Generic read function.
enocean_set_rst_pin
void enocean_set_rst_pin(enocean_t *ctx, uint8_t state)
Set RST ( reset ) pin state.
enocean_t::response_ready
uint8_t response_ready
Definition: enocean.h:180
enocean_cfg_t::rx_pin
pin_name_t rx_pin
Definition: enocean.h:191
enocean_cfg_t::data_bit
uart_data_bits_t data_bit
Definition: enocean.h:203
enocean_packet_t::opt_length
uint8_t opt_length
Definition: enocean.h:154
DRV_TX_BUFFER_SIZE
#define DRV_TX_BUFFER_SIZE
Definition: enocean.h:86
enocean_t::en
digital_out_t en
Definition: enocean.h:170
enocean_cfg_t
Click configuration structure definition.
Definition: enocean.h:188
enocean_cfg_t::parity_bit
uart_parity_t parity_bit
Definition: enocean.h:204
enocean_cfg_t::rst
pin_name_t rst
Definition: enocean.h:196
enocean_packet_t::data_length
uint16_t data_length
Definition: enocean.h:153
enocean_uart_isr
void enocean_uart_isr(enocean_t *ctx)
UART Interrupt Routine function.
enocean_t::driver_hdl
enocean_hdl_t driver_hdl
Definition: enocean.h:179
enocean_t
Click ctx object definition.
Definition: enocean.h:166
enocean_generic_write
void enocean_generic_write(enocean_t *ctx, char *data_buf, uint16_t len)
Generic write function.