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42 #ifdef PREINIT_SUPPORTED
46 #ifdef MikroCCoreVersion
47 #if MikroCCoreVersion >= 1
52 #include "drv_digital_out.h"
53 #include "drv_digital_in.h"
67 #define ENOCEAN_MAP_MIKROBUS( cfg, mikrobus ) \
68 cfg.tx_pin = MIKROBUS( mikrobus, MIKROBUS_TX ); \
69 cfg.rx_pin = MIKROBUS( mikrobus, MIKROBUS_RX ); \
70 cfg.en = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
71 cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST )
79 #define ENOCEAN_RETVAL uint8_t
81 #define ENOCEAN_OK 0x00
82 #define ENOCEAN_INIT_ERROR 0xFF
89 #define DRV_RX_BUFFER_SIZE 500
90 #define DRV_TX_BUFFER_SIZE 100
94 #define ENOCEAN_SYNC_BYTE 0x55
95 #define ENOCEAN_MAX_BUFF_SIZE 256
96 #define ENOCEAN_HEADER_SIZE 0x04
97 #define ENOCEAN_BUFF_EMPTY 0x00
100 #define ENOCEAN_RESPONSE_READY 0x01
101 #define ENOCEAN_RESPONSE_NOT_READY 0x00
102 #define ENOCEAN_UART_RX_READY 0x01
103 #define ENOCEAN_UART_RX_NOT_READY 0x00
104 #define ENOCEAN_OK 0x00
105 #define ENOCEAN_INVALID_PACKET_SIZE 0x01
107 #define ENOCEAN_PACK_TYPE_EVENT 0x04
108 #define ENOCEAN_PACK_TYPE_COMMON_COMMAND 0x05
109 #define ENOCEAN_CO_EVENT_SECUREDEVICES 0x05
110 #define ENOCEAN_CO_WR_FILTER_ADD 0x0B
111 #define ENOCEAN_CO_WR_FILTER_ENABLE 0x0E
112 #define ENOCEAN_CO_WR_REPEATER 0x09
113 #define ENOCEAN_CO_SET_NOISETHRESHOLD 0x32
115 #define ENOCEAN_FILT_TYPE_SOURCE_ID 0x00
116 #define ENOCEAN_FILT_TYPE_R_ORG 0x01
117 #define ENOCEAN_FILT_TYPE_RSSI 0x02
118 #define ENOCEAN_FILT_TYPE_DEST_ID 0x03
119 #define ENOCEAN_FILT_KIND_NEG_TEL_FWRD 0x00
120 #define ENOCEAN_FILT_KIND_POS_TEL_FWRD 0x80
121 #define ENOCEAN_FILT_KIND_NEG_TEL_RPT 0x40
122 #define ENOCEAN_FILT_KIND_POS_TEL_RPT 0xC0
123 #define ENOCEAN_FILT_FWRD_OFF 0x00
124 #define ENOCEAN_FILT_FWRD_ON 0x01
125 #define ENOCEAN_FILT_OP_OR_ALL_FILT 0x00
126 #define ENOCEAN_FILT_OP_AND_ALL_FILT 0x01
127 #define ENOCEAN_FILT_OP_OR_RADIO_INTER_AND_FILT_RPT 0x08
128 #define ENOCEAN_FILT_OP_AND_RADIO_INTER_OR_FILT_RPT 0x09
129 #define ENOCEAN_RPT_OFF 0x00
130 #define ENOCEAN_RPT_ALL_TELEG 0x01
131 #define ENOCEAN_RPT_SELECTIVE 0x02
132 #define ENOCEAN_RPT_LEVEL_OFF 0x00
133 #define ENOCEAN_RPT_LEVEL_ONE 0x01
134 #define ENOCEAN_RPT_LEVEL_TWO 0x02
135 #define ENOCEAN_RSSI_LEVEL_100_DBM_NEG 0x2E
136 #define ENOCEAN_RSSI_LEVEL_99_DBM_NEG 0x2F
137 #define ENOCEAN_RSSI_LEVEL_98_DBM_NEG 0x30
138 #define ENOCEAN_RSSI_LEVEL_97_DBM_NEG 0x31
139 #define ENOCEAN_RSSI_LEVEL_96_DBM_NEG 0x32
140 #define ENOCEAN_RSSI_LEVEL_95_DBM_NEG 0x33
141 #define ENOCEAN_RSSI_LEVEL_94_DBM_NEG 0x34
142 #define ENOCEAN_RSSI_LEVEL_93_DBM_NEG 0x35
143 #define ENOCEAN_RSSI_LEVEL_92_DBM_NEG 0x36
144 #define ENOCEAN_RSSI_LEVEL_91_DBM_NEG 0x37
145 #define ENOCEAN_RSSI_LEVEL_90_DBM_NEG 0x38
160 uint8_t data_buff[ 256 ];
321 #endif // _ENOCEAN_H_
#define DRV_RX_BUFFER_SIZE
Definition: enocean.h:89
uint8_t enocean_response_ready(enocean_t *ctx)
Response Ready function.
uart_stop_bits_t stop_bit
Definition: enocean.h:209
digital_out_t rst
Definition: enocean.h:173
void enocean_response_handler_set(enocean_t *ctx, enocean_hdl_t handler)
Handler Set function.
Definition: enocean.h:155
uint8_t packet_type
Definition: enocean.h:159
pin_name_t en
Definition: enocean.h:201
uint32_t baud_rate
Definition: enocean.h:205
ENOCEAN_RETVAL enocean_init(enocean_t *ctx, enocean_cfg_t *cfg)
Initialization function.
uint8_t enocean_send_packet(enocean_t *ctx, enocean_packet_t *packet)
Packet Send function.
void(* enocean_hdl_t)(enocean_packet_t *, uint16_t *)
Definition: enocean.h:164
#define ENOCEAN_RETVAL
Definition: enocean.h:79
uart_t uart
Definition: enocean.h:178
void enocean_cfg_setup(enocean_cfg_t *cfg)
Config Object Initialization function.
pin_name_t tx_pin
Definition: enocean.h:196
bool uart_blocking
Definition: enocean.h:206
uint8_t enocean_error_t
Error type.
Definition: enocean.h:216
int32_t enocean_generic_read(enocean_t *ctx, char *data_buf, uint16_t max_len)
Generic read function.
void enocean_set_rst_pin(enocean_t *ctx, uint8_t state)
Set RST ( reset ) pin state.
uint8_t response_ready
Definition: enocean.h:184
pin_name_t rx_pin
Definition: enocean.h:195
uart_data_bits_t data_bit
Definition: enocean.h:207
uint8_t opt_length
Definition: enocean.h:158
#define DRV_TX_BUFFER_SIZE
Definition: enocean.h:90
digital_out_t en
Definition: enocean.h:174
Click configuration structure definition.
Definition: enocean.h:192
uart_parity_t parity_bit
Definition: enocean.h:208
pin_name_t rst
Definition: enocean.h:200
uint16_t data_length
Definition: enocean.h:157
void enocean_uart_isr(enocean_t *ctx)
UART Interrupt Routine function.
enocean_hdl_t driver_hdl
Definition: enocean.h:183
Click ctx object definition.
Definition: enocean.h:170
void enocean_generic_write(enocean_t *ctx, char *data_buf, uint16_t len)
Generic write function.