clockgen  2.0.0.0
clockgen.h
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1 /*
2  * MikroSDK - MikroE Software Development Kit
3  * Copyright© 2020 MikroElektronika d.o.o.
4  *
5  * Permission is hereby granted, free of charge, to any person
6  * obtaining a copy of this software and associated documentation
7  * files (the "Software"), to deal in the Software without restriction,
8  * including without limitation the rights to use, copy, modify, merge,
9  * publish, distribute, sublicense, and/or sell copies of the Software,
10  * and to permit persons to whom the Software is furnished to do so,
11  * subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be
14  * included in all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19  * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22  * OR OTHER DEALINGS IN THE SOFTWARE.
23  */
24 
33 // ----------------------------------------------------------------------------
34 
35 #ifndef CLOCKGEN_H
36 #define CLOCKGEN_H
37 
42 #ifdef PREINIT_SUPPORTED
43 #include "preinit.h"
44 #endif
45 
46 #ifdef MikroCCoreVersion
47  #if MikroCCoreVersion >= 1
48  #include "delays.h"
49  #endif
50 #endif
51 
52 #include "drv_digital_out.h"
53 #include "drv_digital_in.h"
54 #include "drv_i2c_master.h"
55 
56 // -------------------------------------------------------------- PUBLIC MACROS
66 #define CLOCKGEN_MAP_MIKROBUS( cfg, mikrobus ) \
67  cfg.scl = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
68  cfg.sda = MIKROBUS( mikrobus, MIKROBUS_SDA )
69 
75 #define CLOCKGEN_RETVAL uint8_t
76 
77 #define CLOCKGEN_OK 0x00
78 #define CLOCKGEN_INIT_ERROR 0xFF
79 
85 #define CLOCKGEN_SLAVE_ADDRESS 0x60
86 
92 #define CLOCKGEN_REG_DEV_STATUS 0
93 #define CLOCKGEN_REG_INT_STATUS_STICKY 1
94 #define CLOCKGEN_REG_INT_STATUS_MASK 2
95 #define CLOCKGEN_REG_OUTPUT_ENABLE_CTRL 3
96 #define CLOCKGEN_REG_OEB_EN_CTRL_MASK 9
97 #define CLOCKGEN_REG_PLL_IN_SRC 15
98 #define CLOCKGEN_REG_CLK0_CTRL 16
99 #define CLOCKGEN_REG_CLK1_CTRL 17
100 #define CLOCKGEN_REG_CLK2_CTRL 18
101 #define CLOCKGEN_REG_CLK3_CTRL 19
102 #define CLOCKGEN_REG_CLK4_CTRL 20
103 #define CLOCKGEN_REG_CLK5_CTRL 21
104 #define CLOCKGEN_REG_CLK6_CTRL 22
105 #define CLOCKGEN_REG_CLK7_CTRL 23
106 #define CLOCKGEN_REG_CLK3_0_DIS_STATE 24
107 #define CLOCKGEN_REG_CLK7_4_DIS_STATE 25
108 
114 #define CLOCKGEN_REG_MULTI_NA_PARAM3_B15_8 26
115 #define CLOCKGEN_REG_MULTI_NA_PARAM3_B7_0 27
116 #define CLOCKGEN_REG_MULTI_NA_PARAM1_B17_16 28
117 #define CLOCKGEN_REG_MULTI_NA_PARAM1_B15_8 29
118 #define CLOCKGEN_REG_MULTI_NA_PARAM1_B7_0 30
119 #define CLOCKGEN_REG_MULTI_NA_PARAM3_2_B19_16 31
120 #define CLOCKGEN_REG_MULTI_NA_PARAM2_B15_8 32
121 #define CLOCKGEN_REG_MULTI_NA_PARAM2_B7_0 33
122 
128 #define CLOCKGEN_REG_MULTI_NB_PARAM3_B15_8 34
129 #define CLOCKGEN_REG_MULTI_NB_PARAM3_B7_0 35
130 #define CLOCKGEN_REG_MULTI_NB_PARAM1_B17_16 36
131 #define CLOCKGEN_REG_MULTI_NB_PARAM1_B15_8 37
132 #define CLOCKGEN_REG_MULTI_NB_PARAM1_B7_0 38
133 #define CLOCKGEN_REG_MULTI_NB_PARAM3_2_B19_16 39
134 #define CLOCKGEN_REG_MULTI_NB_PARAM2_B15_8 40
135 #define CLOCKGEN_REG_MULTI_NB_PARAM2_B7_0 41
136 
142 #define CLOCKGEN_REG_MULTI_0_PARAM3_B15_8 42
143 #define CLOCKGEN_REG_MULTI_0_PARAM3_B7_0 43
144 #define CLOCKGEN_REG_MULTI_0_PARAM1_B17_16_DIVS 44
145 #define CLOCKGEN_REG_MULTI_0_PARAM1_B15_8 45
146 #define CLOCKGEN_REG_MULTI_0_PARAM1_B7_0 46
147 #define CLOCKGEN_REG_MULTI_0_PARAM3_2_B19_16 47
148 #define CLOCKGEN_REG_MULTI_0_PARAM2_B15_8 48
149 #define CLOCKGEN_REG_MULTI_0_PARAM2_B7_0 49
150 
156 #define CLOCKGEN_REG_MULTI_1_PARAM3_B15_8 50
157 #define CLOCKGEN_REG_MULTI_1_PARAM3_B7_0 51
158 #define CLOCKGEN_REG_MULTI_1_PARAM1_B17_16_DIVS 52
159 #define CLOCKGEN_REG_MULTI_1_PARAM1_B15_8 53
160 #define CLOCKGEN_REG_MULTI_1_PARAM1_B7_0 54
161 #define CLOCKGEN_REG_MULTI_1_PARAM3_2_B19_16 55
162 #define CLOCKGEN_REG_MULTI_1_PARAM2_B15_8 56
163 #define CLOCKGEN_REG_MULTI_1_PARAM2_B7_0 57
164 
170 #define CLOCKGEN_REG_MULTI_2_PARAM3_B15_8 58
171 #define CLOCKGEN_REG_MULTI_2_PARAM3_B7_0 59
172 #define CLOCKGEN_REG_MULTI_2_PARAM1_B17_16_DIVS 60
173 #define CLOCKGEN_REG_MULTI_2_PARAM1_B15_8 61
174 #define CLOCKGEN_REG_MULTI_2_PARAM1_B7_0 62
175 #define CLOCKGEN_REG_MULTI_2_PARAM3_2_B19_16 63
176 #define CLOCKGEN_REG_MULTI_2_PARAM2_B15_8 64
177 #define CLOCKGEN_REG_MULTI_2_PARAM2_B7_0 65
178 
184 #define CLOCKGEN_REG_MULTI_3_PARAM3_B15_8 66
185 #define CLOCKGEN_REG_MULTI_3_PARAM3_B7_0 67
186 #define CLOCKGEN_REG_MULTI_3_PARAM1_B17_16_DIVS 68
187 #define CLOCKGEN_REG_MULTI_3_PARAM1_B15_8 69
188 #define CLOCKGEN_REG_MULTI_3_PARAM1_B7_0 70
189 #define CLOCKGEN_REG_MULTI_3_PARAM3_2_B19_16 71
190 #define CLOCKGEN_REG_MULTI_3_PARAM2_B15_8 72
191 #define CLOCKGEN_REG_MULTI_3_PARAM2_B7_0 73
192 
198 #define CLOCKGEN_REG_MULTI_4_PARAM3_B15_8 74
199 #define CLOCKGEN_REG_MULTI_4_PARAM3_B7_0 75
200 #define CLOCKGEN_REG_MULTI_4_PARAM1_B17_16_DIVS 76
201 #define CLOCKGEN_REG_MULTI_4_PARAM1_B15_8 77
202 #define CLOCKGEN_REG_MULTI_4_PARAM1_B7_0 78
203 #define CLOCKGEN_REG_MULTI_4_PARAM3_2_B19_16 79
204 #define CLOCKGEN_REG_MULTI_4_PARAM2_B15_8 80
205 #define CLOCKGEN_REG_MULTI_4_PARAM2_B7_0 81
206 
212 #define CLOCKGEN_REG_MULTI_5_PARAM3_B15_8 82
213 #define CLOCKGEN_REG_MULTI_5_PARAM3_B7_0 83
214 #define CLOCKGEN_REG_MULTI_5_PARAM1_B17_16_DIVS 84
215 #define CLOCKGEN_REG_MULTI_5_PARAM1_B15_8 85
216 #define CLOCKGEN_REG_MULTI_5_PARAM1_B7_0 86
217 #define CLOCKGEN_REG_MULTI_5_PARAM3_2_B19_16 87
218 #define CLOCKGEN_REG_MULTI_5_PARAM2_B15_8 88
219 #define CLOCKGEN_REG_MULTI_5_PARAM2_B7_0 89
220 
226 #define CLOCKGEN_REG_MULTI_6_PARAM3_B15_8 90
227 #define CLOCKGEN_REG_MULTI_6_PARAM3_B7_0 91
228 #define CLOCKGEN_REG_MULTI_6_PARAM1_B17_16_DIVS 92
229 #define CLOCKGEN_REG_MULTI_6_PARAM1_B15_8 93
230 #define CLOCKGEN_REG_MULTI_6_PARAM1_B7_0 94
231 #define CLOCKGEN_REG_MULTI_6_PARAM3_2_B19_16 95
232 #define CLOCKGEN_REG_MULTI_6_PARAM2_B15_8 96
233 #define CLOCKGEN_REG_MULTI_6_PARAM2_B7_0 97
234 
240 #define CLOCKGEN_REG_MULTI_7_PARAM3_B15_8 98
241 #define CLOCKGEN_REG_MULTI_7_PARAM3_B7_0 99
242 #define CLOCKGEN_REG_MULTI_7_PARAM1_B17_16_DIVS 100
243 #define CLOCKGEN_REG_MULTI_7_PARAM1_B15_8 101
244 #define CLOCKGEN_REG_MULTI_7_PARAM1_B7_0 102
245 #define CLOCKGEN_REG_MULTI_7_PARAM3_2_B19_16 103
246 #define CLOCKGEN_REG_MULTI_7_PARAM2_B15_8 104
247 #define CLOCKGEN_REG_MULTI_7_PARAM2_B7_0 105
248 
254 #define CLOCKGEN_REG_SPREAD_SPECTRUM_DOWN_PARAM2_EN_B14_8 149
255 #define CLOCKGEN_REG_SPREAD_SPECTRUM_DOWN_PARAM2_B7_0 150
256 #define CLOCKGEN_REG_SPREAD_SPECTRUM_DOWN_PARAM3_MODE_B14_8 151
257 #define CLOCKGEN_REG_SPREAD_SPECTRUM_DOWN_PARAM3_B7_0 152
258 #define CLOCKGEN_REG_SPREAD_SPECTRUM_DOWN_PARAM1_B7_0 153
259 #define CLOCKGEN_REG_SPREAD_SPECTRUM_DOWN_PARAM3_B11_8_UP_DWN 154
260 #define CLOCKGEN_REG_SPREAD_SPECTRUM_UP_DOWN_PLL_A 155
261 #define CLOCKGEN_REG_SPREAD_SPECTRUM_UP_PARAM2_B14_8 156
262 #define CLOCKGEN_REG_SPREAD_SPECTRUM_UP_PARAM2_B7_0 157
263 #define CLOCKGEN_REG_SPREAD_SPECTRUM_UP_PARAM3_B14_8 158
264 #define CLOCKGEN_REG_SPREAD_SPECTRUM_UP_PARAM3_B7_0 159
265 #define CLOCKGEN_REG_SPREAD_SPECTRUM_UP_PARAM1_B7_0 160
266 #define CLOCKGEN_REG_SPREAD_SPECTRUM_UP_PARAM1_B11_8 161
267 
273 #define CLOCKGEN_REG_VCXO_PARAM_B7_0 162
274 #define CLOCKGEN_REG_VCXO_PARAM_B15_8 163
275 #define CLOCKGEN_REG_VCXO_PARAM_B21_16 164
276 
282 #define CLOCKGEN_REG_CLK0_INIT_OFFSET 165
283 #define CLOCKGEN_REG_CLK1_INIT_OFFSET 166
284 #define CLOCKGEN_REG_CLK2_INIT_OFFSET 167
285 
291 #define CLOCKGEN_REG_PLL_RST 177
292 #define CLOCKGEN_REG_CRYSTAL_INTERNAL_CL 183
293 #define CLOCKGEN_REG_FANOUT_EN 187
294 
300 #define CLOCKGEN_CLOCK_0 0
301 #define CLOCKGEN_CLOCK_1 1
302 #define CLOCKGEN_CLOCK_2 2
303 #define CLOCKGEN_CLOCK_3 3
304 #define CLOCKGEN_CLOCK_4 4
305 #define CLOCKGEN_CLOCK_5 5
306 #define CLOCKGEN_CLOCK_6 6
307 #define CLOCKGEN_CLOCK_7 7
308 #define CLOCKGEN_DISABLE_ALL_CLK 8
309 
315 #define CLOCKGEN_CLK_CTRL 16
316 
317 #define CLOCKGEN_PLLA 0xFF
318 #define CLOCKGEN_PLLB 0xDF
319 
320 #define CLOCKGEN_RESET_PLLA 0x20
321 #define CLOCKGEN_RESET_PLLB 0x80
322 
323 #define CLOCKGEN_PLL_PARAMS 0xFA
324 #define CLOCKGEN_CLK_PARAMS 0xFB
325 
326 #define CLOCKGEN_PARAM_DIV_4_EN 0x3
327 #define CLOCKGEN_PARAM_DIV_OTHER 0x0
328 
334 #define CLOCKGEN_PARAM_DIV_1 0x0
335 #define CLOCKGEN_PARAM_DIV_2 0x1
336 #define CLOCKGEN_PARAM_DIV_4 0x2
337 #define CLOCKGEN_PARAM_DIV_8 0x3
338 #define CLOCKGEN_PARAM_DIV_16 0x4
339 #define CLOCKGEN_PARAM_DIV_32 0x5
340 #define CLOCKGEN_PARAM_DIV_64 0x6
341 #define CLOCKGEN_PARAM_DIV_128 0x7
342 
348 #define CLOCKGEN_PLL_INPUT_XO 0
349 #define CLOCKGEN_PLL_INPUT_CLKIN 1
350 
351 #define CLOCKGEN_FREQ_MULTY 100
352 
358 #define CLOCKGEN_DIS_STATE_LOW 0
359 #define CLOCKGEN_DIS_STATE_HIGH 1
360 #define CLOCKGEN_DIS_STATE_HIGH_IMP 2
361 #define CLOCKGEN_DIS_STATE_NEVER_DIS 3
362 
368 #define CLOCKGEN_PARAMS_MACRO 8
369 #define CLOCKGEN 0
370 #define CLOCKGEN_DISIABLE_STATE_SHIFT 2
371 
372 #define CLOCKGEN_XTAL 25000000
373 #define CLOCKGEN_MAX_FREQ CLOCKGEN_XTAL * 32
374  // End group macro
376 // --------------------------------------------------------------- PUBLIC TYPES
385 typedef struct
386 {
387  // Modules
388 
389  i2c_master_t i2c;
390 
391  // ctx variable
392 
393  uint8_t slave_address;
394 
395  // Aditional variable
396 
397  uint32_t denom;
398  uint8_t factor;
399 
400 } clockgen_t;
401 
405 typedef struct
406 {
407  // Communication gpio pins
408 
409  pin_name_t scl;
410  pin_name_t sda;
411 
412  // static variable
413 
414  uint32_t i2c_speed;
415  uint8_t i2c_address;
416 
418 
422 typedef struct
423 {
424  uint32_t p1;
425  uint32_t p2;
426  uint32_t p3;
427  uint8_t div4;
428  uint8_t div_val;
429 
431  // End types group
433 // ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
434 
440 #ifdef __cplusplus
441 extern "C"{
442 #endif
443 
453 
463 
472 
483 void clockgen_generic_write ( clockgen_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len );
484 
495 void clockgen_generic_read ( clockgen_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len );
496 
505 void clockgen_enable_clk ( clockgen_t *ctx, uint8_t clk_num );
506 
516 void clockgen_ctrl_clk ( clockgen_t *ctx, uint8_t clk_num, uint8_t ctrl_data );
517 
527 void clockgen_set_disable_state ( clockgen_t *ctx, uint8_t clk_num, uint8_t disable_state );
528 
538 void clockgen_set_clk_pll ( clockgen_t *ctx, uint8_t clk_num, uint8_t pll_sel );
539 
549 void clockgen_set_params ( clockgen_t *ctx, uint8_t clk_pll_num, clockgen_params_t *param_group );
550 
560 void clockgen_get_params ( clockgen_t *ctx, uint8_t clk_pll_num, clockgen_params_t *param_group );
561 
572 void clockgen_set_frequency ( clockgen_t *ctx, uint8_t clk_num, uint8_t pll_num, uint32_t freq );
573 
585 void clockgen_setup_pll ( clockgen_t *ctx, uint8_t pll, uint8_t mult, uint32_t num );
586 
600 void clockgen_setup_multisyinth ( clockgen_t *ctx, uint8_t clk_num, uint32_t divider, uint32_t num );
601 
602 #ifdef __cplusplus
603 }
604 #endif
605 #endif // _CLOCKGEN_H_
606  // End public_function group
609 
610 // ------------------------------------------------------------------------- END
clockgen_cfg_t::scl
pin_name_t scl
Definition: clockgen.h:409
clockgen_params_t::p1
uint32_t p1
Definition: clockgen.h:424
clockgen_set_frequency
void clockgen_set_frequency(clockgen_t *ctx, uint8_t clk_num, uint8_t pll_num, uint32_t freq)
Function for setting clock frequency on specific clock.
clockgen_ctrl_clk
void clockgen_ctrl_clk(clockgen_t *ctx, uint8_t clk_num, uint8_t ctrl_data)
Function enabling specific clock.
clockgen_t::slave_address
uint8_t slave_address
Definition: clockgen.h:393
clockgen_setup_pll
void clockgen_setup_pll(clockgen_t *ctx, uint8_t pll, uint8_t mult, uint32_t num)
Function for setting pll.
clockgen_setup_multisyinth
void clockgen_setup_multisyinth(clockgen_t *ctx, uint8_t clk_num, uint32_t divider, uint32_t num)
Function for setting clock divider.
clockgen_params_t::p3
uint32_t p3
Definition: clockgen.h:426
clockgen_t::denom
uint32_t denom
Definition: clockgen.h:397
clockgen_params_t
Structure for setting clock parameters.
Definition: clockgen.h:423
clockgen_t::i2c
i2c_master_t i2c
Definition: clockgen.h:389
clockgen_default_cfg
void clockgen_default_cfg(clockgen_t *ctx)
Click Default Configuration function.
clockgen_cfg_t::sda
pin_name_t sda
Definition: clockgen.h:410
clockgen_cfg_t::i2c_address
uint8_t i2c_address
Definition: clockgen.h:415
clockgen_cfg_t
Click configuration structure definition.
Definition: clockgen.h:406
clockgen_init
CLOCKGEN_RETVAL clockgen_init(clockgen_t *ctx, clockgen_cfg_t *cfg)
Initialization function.
clockgen_t::factor
uint8_t factor
Definition: clockgen.h:398
clockgen_generic_write
void clockgen_generic_write(clockgen_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len)
Generic write function.
clockgen_set_disable_state
void clockgen_set_disable_state(clockgen_t *ctx, uint8_t clk_num, uint8_t disable_state)
Function for setting clock disabling state.
clockgen_params_t::div_val
uint8_t div_val
Definition: clockgen.h:428
CLOCKGEN_RETVAL
#define CLOCKGEN_RETVAL
Definition: clockgen.h:75
clockgen_get_params
void clockgen_get_params(clockgen_t *ctx, uint8_t clk_pll_num, clockgen_params_t *param_group)
Function for getting clock pll-s.
clockgen_cfg_setup
void clockgen_cfg_setup(clockgen_cfg_t *cfg)
Config Object Initialization function.
clockgen_params_t::p2
uint32_t p2
Definition: clockgen.h:425
clockgen_cfg_t::i2c_speed
uint32_t i2c_speed
Definition: clockgen.h:414
clockgen_generic_read
void clockgen_generic_read(clockgen_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len)
Generic read function.
clockgen_enable_clk
void clockgen_enable_clk(clockgen_t *ctx, uint8_t clk_num)
Function enabling specific clock.
clockgen_t
Click ctx object definition.
Definition: clockgen.h:386
clockgen_params_t::div4
uint8_t div4
Definition: clockgen.h:427
clockgen_set_params
void clockgen_set_params(clockgen_t *ctx, uint8_t clk_pll_num, clockgen_params_t *param_group)
Function for setting clock pll-s.
clockgen_set_clk_pll
void clockgen_set_clk_pll(clockgen_t *ctx, uint8_t clk_num, uint8_t pll_sel)
Function for setting clock pll-s.