lr5  2.0.0.0
lr5.h
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1 /*
2  * MikroSDK - MikroE Software Development Kit
3  * Copyright© 2020 MikroElektronika d.o.o.
4  *
5  * Permission is hereby granted, free of charge, to any person
6  * obtaining a copy of this software and associated documentation
7  * files (the "Software"), to deal in the Software without restriction,
8  * including without limitation the rights to use, copy, modify, merge,
9  * publish, distribute, sublicense, and/or sell copies of the Software,
10  * and to permit persons to whom the Software is furnished to do so,
11  * subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be
14  * included in all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19  * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22  * OR OTHER DEALINGS IN THE SOFTWARE.
23  */
24 
33 // ----------------------------------------------------------------------------
34 
35 #ifndef LR5_H
36 #define LR5_H
37 
38 #include "drv_digital_out.h"
39 #include "drv_digital_in.h"
40 #include "drv_uart.h"
41 
42 // -------------------------------------------------------------- PUBLIC MACROS
52 #define LR5_MAP_MIKROBUS( cfg, mikrobus ) \
53  cfg.tx_pin = MIKROBUS( mikrobus, MIKROBUS_TX ); \
54  cfg.rx_pin = MIKROBUS( mikrobus, MIKROBUS_RX ); \
55  cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
56  cfg.wk = MIKROBUS( mikrobus, MIKROBUS_CS ); \
57  cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
58 
64 #define LR5_RETVAL uint8_t
65 
66 #define LR5_OK 0x00
67 #define LR5_INIT_ERROR 0xFF
68 
74 #define RESPONSE_BIT 0x80
75 #define FRAME_HEADER 0xAA
76 
82 #define RESET_CMD 0x30
83 #define FACTORY_RESET_CMD 0x31
84 #define EEPROM_WRITE_CMD 0x32
85 #define EEPROM_READ_CMD 0x33
86 #define GET_FW_VERSION_CMD 0x34
87 #define GET_SERIALNO_CMD 0x35
88 #define GET_DEV_EUI_CMD 0x36
89 #define JOIN_CMD 0x40
90 #define JOIN_IND 0x41
91 #define GET_ACT_STATUS_CMD 0x42
92 #define SET_APP_KEY_CMD 0x43
93 #define SET_APP_SESSION_KEY_CMD 0x44
94 #define SET_NWK_SESSION_KEY_CMD 0x45
95 #define TX_MSG_CMD 0x46
96 #define TX_MSG_CONFIRMED_IND 0x47
97 #define TX_MSG_UNCONFIRMED_IND 0x48
98 #define RX_MSG_IND 0x49
99 #define GET_SESSION_STATUS_CMD 0x4A
100 #define SET_NEXT_DR_CMD 0x4B
101 #define SET_BATTERY_LVL_CMD 0x50
102 #define GET_BATTERY_LVL_CMD 0x51
103 #define SET_UPLINK_CNT_CMD 0x52
104 #define GET_UPLINK_CNT_CMD 0x53
105 #define SET_DOWNLINK_CNT_CMD 0x54
106 #define GET_DOWNLINK_CNT_CMD 0x55
107 #define SET_CH_MASK_CMD 0x57
108 #define GET_CH_PARAM_CMD 0x58
109 
115 #define LR5_ABP 0x00
116 #define LR5_OTAA 0x01
117 #define LR5_UNRELIABLE_DATA_TX 0x00
118 #define LR5_RELIABLE_DATA_TX 0x01
119 #define LR5_SF10_125KHZ 0x00
120 #define LR5_SF9_125KHZ 0x01
121 #define LR5_SF8_125KHZ 0x02
122 #define LR5_SF7_125KHZ 0x03
123 #define LR5_SF8_500KHZ 0x04
124 #define LR5_CH_IDX_0 0x00
125 #define LR5_CH_IDX_1 0x01
126 #define LR5_CH_IDX_2 0x02
127 #define LR5_CH_IDX_3 0x03
128 #define LR5_CH_IDX_4 0x04
129 #define LR5_CH_IDX_5 0x05
130 #define LR5_CH_IDX_6 0x06
131 #define LR5_CH_IDX_7 0x07
132 #define LR5_CH_IDX_8 0x08
133 #define LR5_CH_IDX_9 0x09
134 #define LR5_CH_IDX_10 0x0A
135 #define LR5_CH_IDX_11 0x0B
136 #define LR5_CH_IDX_12 0x0C
137 #define LR5_CH_IDX_13 0x0D
138 #define LR5_CH_IDX_14 0x0E
139 #define LR5_CH_IDX_15 0x0F
140 
146 #define LR5_FRAME_HEADER_ERR 0xFF
147 #define LR5_CMD_RESPONSE_ERR 0xFE
148 #define LR5_CHKSUM_ERR 0xFD
149 #define LR5_NBYTES_INVALID 0xFC
150 #define LR5_CH_IDX_INVALID 0xFB
151 #define LR5_OK 0x00
152 #define LR5_RESPONSE_NOT_RECEIVED 0x00
153 #define LR5_RESPONSE_RECEIVED 0x01
154 #define LR5_CMD_RESPONSE_READY 0x01
155 #define LR5_IND_RESPONSE_READY 0x02
156 #define LR5_DATA_READY 0x00
157 #define LR5_DATA_NOT_READY 0x01
158 
164 #define DRV_RX_BUFFER_SIZE 500
165  // End group macro
168 // --------------------------------------------------------------- PUBLIC TYPES
177 typedef void ( *lr5_hdl_t )( uint8_t*, uint8_t*, uint8_t* );
178 
182 typedef struct
183 {
184  // Output pins
185 
186  digital_out_t rst;
187  digital_out_t wk;
188 
189  // Input pins
190 
191  digital_in_t int_pin;
192 
193  // Modules
194 
195  uart_t uart;
196 
197  char uart_rx_buffer[ DRV_RX_BUFFER_SIZE ];
198  char uart_tx_buffer[ DRV_RX_BUFFER_SIZE ];
199 
200  uint8_t command_code;
201  uint8_t received_flag;
202  uint8_t rx_dat[ 260 ];
203  uint16_t rx_cnt;
205 
206 } lr5_t;
207 
211 typedef struct
212 {
213  uint8_t cmd_code;
214  uint8_t cmd_length;
215  uint8_t cmd_data[ 256 ];
216 
217 } lr5_cmd_t;
218 
222 typedef struct
223 {
224  uint8_t options;
225  uint8_t port;
226  uint8_t *msg_data;
227  uint8_t msg_length;
228 
229 } lr5_msg_t;
230 
231 
235 typedef struct
236 {
237  // Communication gpio pins
238 
239  pin_name_t rx_pin;
240  pin_name_t tx_pin;
241 
242  // Additional gpio pins
243 
244  pin_name_t rst;
245  pin_name_t wk;
246  pin_name_t int_pin;
247 
248  // static variable
249 
250  uint32_t baud_rate; // Clock speed.
252  uart_data_bits_t data_bit; // Data bits.
253  uart_parity_t parity_bit; // Parity bit.
254  uart_stop_bits_t stop_bit; // Stop bits.
255 
256 } lr5_cfg_t;
257 
258  // End types group
260 // ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
261 
267 #ifdef __cplusplus
268 extern "C"{
269 #endif
270 
279 void lr5_cfg_setup ( lr5_cfg_t *cfg );
280 
290 
300 int32_t lr5_generic_read ( lr5_t *ctx, char *data_buf, uint16_t max_len );
301 
310 void lr5_response_handler_set ( lr5_t *ctx, void ( *handler )( uint8_t*, uint8_t*, uint8_t* ) );
311 
320 void lr5_uart_isr ( lr5_t *ctx );
321 
331 
344 
353 void lr5_hw_reset ( lr5_t *ctx );
354 
364 
374 void lr5_reset_cmd ( lr5_t *ctx );
375 
386 
401 LR5_RETVAL lr5_eeprom_write_cmd ( lr5_t *ctx, uint8_t start_addr, uint8_t *data_in, uint8_t n_bytes );
402 
414 LR5_RETVAL lr5_eeprom_read_cmd ( lr5_t *ctx, uint8_t start_addr, uint8_t n_bytes );
415 
424 
433 
442 
451 void lr5_join_cmd ( lr5_t *ctx, uint8_t mode );
452 
461 
471 void lr5_set_app_key_cmd ( lr5_t *ctx, uint8_t *app_key );
472 
482 void lr5_set_app_session_key_cmd ( lr5_t *ctx, uint8_t *app_s_key );
483 
493 void lr5_set_nwk_session_key_cmd ( lr5_t *ctx, uint8_t *nwk_s_key );
494 
513 
522 
533 void lr5_set_next_dr_cmd ( lr5_t *ctx, uint8_t data_rate );
534 
545 void lr5_set_battery_level_cmd ( lr5_t *ctx, uint8_t battery_level );
546 
555 
564 void lr5_set_uplink_cnt_cmd ( lr5_t *ctx, uint32_t uplink_cnt );
565 
574 
583 void lr5_set_downlink_cnt_cmd ( lr5_t *ctx, uint32_t downlink_cnt );
584 
593 
607 void lr5_set_ch_mask_cmd ( lr5_t *ctx, uint8_t *ch_mask );
608 
619 LR5_RETVAL lr5_get_ch_param_cmd ( lr5_t *ctx, uint8_t ch_idx );
620 
621 #ifdef __cplusplus
622 }
623 #endif
624 #endif // _LR5_H_
625  // End public_function group
628 
629 // ------------------------------------------------------------------------- END
DRV_RX_BUFFER_SIZE
#define DRV_RX_BUFFER_SIZE
Definition: lr5.h:164
lr5_t::rst
digital_out_t rst
Definition: lr5.h:186
lr5_hdl_t
void(* lr5_hdl_t)(uint8_t *, uint8_t *, uint8_t *)
Handler definition for data logging.
Definition: lr5.h:177
lr5_cfg_setup
void lr5_cfg_setup(lr5_cfg_t *cfg)
Config Object Initialization function.
lr5_generic_read
int32_t lr5_generic_read(lr5_t *ctx, char *data_buf, uint16_t max_len)
Generic read function.
lr5_t::received_flag
uint8_t received_flag
Definition: lr5.h:201
lr5_get_downlink_cnt_cmd
void lr5_get_downlink_cnt_cmd(lr5_t *ctx)
Get Downlink Counter Command.
lr5_get_ch_param_cmd
LR5_RETVAL lr5_get_ch_param_cmd(lr5_t *ctx, uint8_t ch_idx)
Get Channel Parameters Command.
lr5_t::rx_cnt
uint16_t rx_cnt
Definition: lr5.h:203
lr5_t::driver_hdl
lr5_hdl_t driver_hdl
Definition: lr5.h:204
lr5_set_uplink_cnt_cmd
void lr5_set_uplink_cnt_cmd(lr5_t *ctx, uint32_t uplink_cnt)
Set Uplink Counter Command.
lr5_tx_msg_cmd
LR5_RETVAL lr5_tx_msg_cmd(lr5_t *ctx, lr5_msg_t *msg)
TX Message Command.
lr5_join_cmd
void lr5_join_cmd(lr5_t *ctx, uint8_t mode)
Join Network Command.
lr5_factory_reset_cmd
void lr5_factory_reset_cmd(lr5_t *ctx)
Factory Reset Command.
lr5_set_nwk_session_key_cmd
void lr5_set_nwk_session_key_cmd(lr5_t *ctx, uint8_t *nwk_s_key)
Set Nwk Session Key Command.
lr5_reset_cmd
void lr5_reset_cmd(lr5_t *ctx)
SW Reset Command.
lr5_t::int_pin
digital_in_t int_pin
Definition: lr5.h:191
lr5_eeprom_write_cmd
LR5_RETVAL lr5_eeprom_write_cmd(lr5_t *ctx, uint8_t start_addr, uint8_t *data_in, uint8_t n_bytes)
EEPROM Write Command.
lr5_set_downlink_cnt_cmd
void lr5_set_downlink_cnt_cmd(lr5_t *ctx, uint32_t downlink_cnt)
Set Downlink Counter Command.
lr5_t::wk
digital_out_t wk
Definition: lr5.h:187
lr5_set_next_dr_cmd
void lr5_set_next_dr_cmd(lr5_t *ctx, uint8_t data_rate)
Set Next TX Data Rate Command.
lr5_init
LR5_RETVAL lr5_init(lr5_t *ctx, lr5_cfg_t *cfg)
Initialization function.
lr5_cmd_t::cmd_code
uint8_t cmd_code
Definition: lr5.h:213
lr5_cfg_t::rst
pin_name_t rst
Definition: lr5.h:244
lr5_t::uart
uart_t uart
Definition: lr5.h:195
lr5_cfg_t::parity_bit
uart_parity_t parity_bit
Definition: lr5.h:253
lr5_get_battery_level_cmd
void lr5_get_battery_level_cmd(lr5_t *ctx)
Get Battery Level Command.
lr5_get_activation_status_cmd
void lr5_get_activation_status_cmd(lr5_t *ctx)
Get Activation Status Command.
lr5_get_dev_eui_cmd
void lr5_get_dev_eui_cmd(lr5_t *ctx)
Get DevEUI Command.
lr5_response_ready
LR5_RETVAL lr5_response_ready(lr5_t *ctx)
Response Ready function.
lr5_t
Click ctx object definition.
Definition: lr5.h:183
lr5_msg_t::port
uint8_t port
Definition: lr5.h:225
lr5_cfg_t::stop_bit
uart_stop_bits_t stop_bit
Definition: lr5.h:254
lr5_t::command_code
uint8_t command_code
Definition: lr5.h:200
lr5_cfg_t::rx_pin
pin_name_t rx_pin
Definition: lr5.h:239
lr5_cfg_t
Click configuration structure definition.
Definition: lr5.h:236
lr5_cfg_t::baud_rate
uint32_t baud_rate
Definition: lr5.h:250
lr5_get_serial_no_cmd
void lr5_get_serial_no_cmd(lr5_t *ctx)
Get Mipot Serial Number Command.
lr5_cfg_t::uart_blocking
bool uart_blocking
Definition: lr5.h:251
lr5_set_ch_mask_cmd
void lr5_set_ch_mask_cmd(lr5_t *ctx, uint8_t *ch_mask)
Set Channels Mask Command.
lr5_cfg_t::wk
pin_name_t wk
Definition: lr5.h:245
lr5_cfg_t::data_bit
uart_data_bits_t data_bit
Definition: lr5.h:252
lr5_task
LR5_RETVAL lr5_task(lr5_t *ctx)
Parser Task function.
LR5_RETVAL
#define LR5_RETVAL
Definition: lr5.h:64
lr5_msg_t::msg_length
uint8_t msg_length
Definition: lr5.h:227
lr5_get_fw_version_cmd
void lr5_get_fw_version_cmd(lr5_t *ctx)
Get FW Version Command.
lr5_msg_t::msg_data
uint8_t * msg_data
Definition: lr5.h:226
lr5_hw_reset
void lr5_hw_reset(lr5_t *ctx)
HW Reset function.
lr5_msg_t::options
uint8_t options
Definition: lr5.h:224
lr5_uart_isr
void lr5_uart_isr(lr5_t *ctx)
UART ISR function.
lr5_set_app_session_key_cmd
void lr5_set_app_session_key_cmd(lr5_t *ctx, uint8_t *app_s_key)
Set App Session Key Command.
lr5_cmd_t
Command structure definition.
Definition: lr5.h:212
lr5_data_indication
LR5_RETVAL lr5_data_indication(lr5_t *ctx)
Data Indication function.
lr5_msg_t
Message command definition.
Definition: lr5.h:223
lr5_response_handler_set
void lr5_response_handler_set(lr5_t *ctx, void(*handler)(uint8_t *, uint8_t *, uint8_t *))
Set Handler function.
lr5_get_session_status_cmd
void lr5_get_session_status_cmd(lr5_t *ctx)
Get Session Status Command.
lr5_set_battery_level_cmd
void lr5_set_battery_level_cmd(lr5_t *ctx, uint8_t battery_level)
Set Battery Level Command.
lr5_eeprom_read_cmd
LR5_RETVAL lr5_eeprom_read_cmd(lr5_t *ctx, uint8_t start_addr, uint8_t n_bytes)
EEPROM Read Command.
lr5_cmd_t::cmd_length
uint8_t cmd_length
Definition: lr5.h:214
lr5_cfg_t::int_pin
pin_name_t int_pin
Definition: lr5.h:246
lr5_cfg_t::tx_pin
pin_name_t tx_pin
Definition: lr5.h:240
lr5_set_app_key_cmd
void lr5_set_app_key_cmd(lr5_t *ctx, uint8_t *app_key)
Set App Key Command.
lr5_get_uplink_cnt_cmd
void lr5_get_uplink_cnt_cmd(lr5_t *ctx)
Get Uplink Counter Command.