nanolr 2.0.0.0
nanolr.h
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1/*
2 * MikroSDK - MikroE Software Development Kit
3 * Copyright© 2020 MikroElektronika d.o.o.
4 *
5 * Permission is hereby granted, free of charge, to any person
6 * obtaining a copy of this software and associated documentation
7 * files (the "Software"), to deal in the Software without restriction,
8 * including without limitation the rights to use, copy, modify, merge,
9 * publish, distribute, sublicense, and/or sell copies of the Software,
10 * and to permit persons to whom the Software is furnished to do so,
11 * subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22 * OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
33// ----------------------------------------------------------------------------
34
35#ifndef NANOLR_H
36#define NANOLR_H
37
38#include "drv_digital_out.h"
39#include "drv_digital_in.h"
40#include "drv_uart.h"
41
42// -------------------------------------------------------------- PUBLIC MACROS
52#define NANOLR_MAP_MIKROBUS( cfg, mikrobus ) \
53 cfg.tx_pin = MIKROBUS( mikrobus, MIKROBUS_TX ); \
54 cfg.rx_pin = MIKROBUS( mikrobus, MIKROBUS_RX ); \
55 cfg.st = MIKROBUS( mikrobus, MIKROBUS_AN ); \
56 cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
57 cfg.cts = MIKROBUS( mikrobus, MIKROBUS_CS ); \
58 cfg.gp1 = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
59 cfg.rts = MIKROBUS( mikrobus, MIKROBUS_INT )
66#define NANOLR_RETVAL uint8_t
67
68#define NANOLR_OK 0x00
69#define NANOLR_INIT_ERROR 0xFF
76#define NANOLR_CMD_DEV_INFO 0x01
77#define NANOLR_CMD_DEV_STATE 0x04
78#define NANOLR_CMD_RESET 0x05
79#define NANOLR_CMD_FW_VER 0x06
80#define NANOLR_CMD_RESTORE_DEF_SETTINGS 0x07
81#define NANOLR_CMD_SAVE_SETTINGS 0x08
82#define NANOLR_CMD_SERIAL_PORT_CFG 0x09
83#define NANOLR_CMD_OUTPUT_POWER 0x10
84#define NANOLR_CMD_OP_CHAN 0x11
85#define NANOLR_CMD_ENERGY_SAVE 0x13
86#define NANOLR_CMD_PHYSICAL_ADR 0x20
87#define NANOLR_CMD_NETWORK_ADR 0x21
88#define NANOLR_CMD_NETWORK_ID 0x22
89#define NANOLR_CMD_NETWORK_ROLE 0x23
90#define NANOLR_CMD_NETWORK_AUTO_SETTINGS 0x24
91#define NANOLR_CMD_NETWORK_PREF 0x25
92#define NANOLR_CMD_NETWORK_SECURITY 0x26
93#define NANOLR_CMD_NETWORK_JOIN_MODE 0x27
94#define NANOLR_CMD_NETWORK_STOP 0x30
95#define NANOLR_CMD_NETWORK_START 0x31
96#define NANOLR_CMD_SEND_DATA 0x50
97#define NANOLR_CMD_RECEIVED_DATA 0x60
98#define NANOLR_CMD_ENTER_BOOTLOADER 0x70
105#define NANOLR_SET_BOOTLOADER_OPTIONS 0x71
106#define NANOLR_ERASE_MEM 0x78
107#define NANOLR_WRITE_MEM_CHUNK 0x7A
108#define NANOLR_READ_MEM_CHUNK 0x7B
109#define NANOLR_COMMIT_FW 0x7F
116#define NANOLR_SUCCESS 0x00
117#define NANOLR_GENERIC_ERROR 0x01
118#define NANOLR_PARAM_NOT_ACCEPTED 0x02
119#define NANOLR_OPERATION_TIMEOUT 0x03
120#define NANOLR_NO_MEMORY 0x04
121#define NANOLR_UNSUPPORTED 0x05
122#define NANOLR_BUSY 0x06
129#define NANOLR_DEV_INFO_RESP 0x81
130#define NANOLR_DEV_STATE_RESP 0x84
131#define NANOLR_RESET_RESP 0x85
132#define NANOLR_FW_VER_RESP 0x86
133#define NANOLR_RESTORE_DEF_SETTINGS_RESP 0x87
134#define NANOLR_SAVE_SETTINGS_RESP 0x88
135#define NANOLR_SERIAL_PORT_CFG_RESP 0x89
136#define NANOLR_OUTPUT_POWER_RESP 0x90
137#define NANOLR_OP_CHAN_RESP 0x91
138#define NANOLR_ENERGY_SAVE_RESP 0x93
139#define NANOLR_PHYSICAL_ADR_RESP 0xA0
140#define NANOLR_NETWORK_ADR_RESP 0xA1
141#define NANOLR_NETWORK_ID_RESP 0xA2
142#define NANOLR_NETWORK_ROLE_RESP 0xA3
143#define NANOLR_NETWORK_AUTO_SETTINGS_RESP 0xA4
144#define NANOLR_NETWORK_PREF_RESP 0xA5
145#define NANOLR_NETWORK_SECURITY_RESP 0xA6
152#define NANOLR_BAUD_RATE_MAINTAIN_SPEED 0x00
153#define NANOLR_BAUD_RATE_1200 0x01
154#define NANOLR_BAUD_RATE_2400 0x02
155#define NANOLR_BAUD_RATE_4800 0x03
156#define NANOLR_BAUD_RATE_9600 0x04
157#define NANOLR_BAUD_RATE_19200 0x05
158#define NANOLR_BAUD_RATE_38400 0x06
159#define NANOLR_BAUD_RATE_57600 0x07
160#define NANOLR_BAUD_RATE_115200 0x08
167#define NANOLR_DEVICE_ID_UNKNOWN 0x00
168#define NANOLR_DEVICE_ID_EMB_ZRF2XX 0x20
169#define NANOLR_DEVICE_ID_EMB_ZRF231XX 0x24
170#define NANOLR_DEVICE_ID_EMB_ZRF231PA 0x26
171#define NANOLR_DEVICE_ID_EMB_ZRF212XX 0x28
172#define NANOLR_DEVICE_ID_EMB_ZRF212B 0x29
173#define NANOLR_DEVICE_ID_EMB_Z253X 0x30
174#define NANOLR_DEVICE_ID_EMB_Z2530X 0x34
175#define NANOLR_DEVICE_ID_EMB_Z2530PA 0x36
176#define NANOLR_DEVICE_ID_EMB_Z2531X 0x38
177#define NANOLR_DEVICE_ID_EMB_Z2531PA_USB 0x3A
178#define NANOLR_DEVICE_ID_EMB_Z2538X 0x3C
179#define NANOLR_DEVICE_ID_EMB_Z2538PA 0x3D
180#define NANOLR_DEVICE_ID_EMB_WMBX 0x40
181#define NANOLR_DEVICE_ID_EMB_WMB169X 0x44
182#define NANOLR_DEVICE_ID_EMB_WMB169T 0x45
183#define NANOLR_DEVICE_ID_EMB_WMB169PA 0x46
184#define NANOLR_DEVICE_ID_EMB_WMB868X 0x48
185#define NANOLR_DEVICE_ID_EMB_WMB868 0x49
186#define NANOLR_DEVICE_ID_EMB_LRX 0x50
187#define NANOLR_DEVICE_ID_EMB_LR1272 0x54
194#define NANOLR_NETWORK_ROLE_COORDINATOR 0x00
195#define NANOLR_NETWORK_ROLE_RESERVED 0x01
196#define NANOLR_NETWORK_ROLE_END_DEV 0x02
203#define NANOLR_DEV_STATE_BOOTING 0x00
204#define NANOLR_DEV_STATE_INSIDE_BOOTLOADER 0x01
205#define NANOLR_DEV_STATE_RDY_STARTUP_OP_SUCC 0x10
206#define NANOLR_DEV_STATE_RDY_STARTUP_OP_FAILED 0x11
207#define NANOLR_DEV_STATE_OFFLINE 0x20
208#define NANOLR_DEV_STATE_CONNECTING 0x21
209#define NANOLR_DEV_STATE_TRANSPARENT_MODE_STARTUP 0x22
210#define NANOLR_DEV_STATE_ONLINE 0x30
211#define NANOLR_DEV_STATE_DISCONNECTING 0x40
212#define NANOLR_DEV_STATE_RESERVED 0x50
213#define NANOLR_DEV_STATE_END_RECEIVING_WINDOW 0x51
220#define NANOLR_ENERGY_SAVE_MODE_ALWAYS_ON 0x00
221#define NANOLR_ENERGY_SAVE_MODE_RX_WINDOW 0x01
222#define NANOLR_ENERGY_SAVE_MODE_TX_ONLY 0x02
229#define NANOLR_OP_CHANNEL_CH_1_868_1MHz 0x01
230#define NANOLR_OP_CHANNEL_CH_2_868_3MHz 0x02
231#define NANOLR_OP_CHANNEL_CH_3_868_5MHz 0x03
232#define NANOLR_OP_CHANNEL_CH_4_869_525MHz 0x04
233#define NANOLR_OP_CHANNEL_SPR_FCT_128 0x07
234#define NANOLR_OP_CHANNEL_SPR_FCT_256 0x08
235#define NANOLR_OP_CHANNEL_SPR_FCT_512 0x09
236#define NANOLR_OP_CHANNEL_SPR_FCT_1024 0x0A
237#define NANOLR_OP_CHANNEL_SPR_FCT_2048 0x0B
238#define NANOLR_OP_CHANNEL_SPR_FCT_4096 0x0C
239#define NANOLR_OP_CHANNEL_BANDWIDTH_125KHz 0x00
240#define NANOLR_OP_CHANNEL_BANDWIDTH_250KHz 0x01
241#define NANOLR_OP_CHANNEL_CODING_RATE_4_5 0x01
242#define NANOLR_OP_CHANNEL_CODING_RATE_4_6 0x02
243#define NANOLR_OP_CHANNEL_CODING_RATE_4_7 0x03
244#define NANOLR_OP_CHANNEL_CODING_RATE_4_8 0x04
251#define NANOLR_NTW_ROLE_COORDINATOR 0x00
252#define NANOLR_NTW_ROLE_END_DEVICE 0x02
259#define NANOLR_NTW_PREFERENCE_PROTOCOL_LR_EMB 0x00
260#define NANOLR_NTW_PREFERENCE_PROTOCOL_LR_WAN 0x80
261#define NANOLR_NTW_PREFERENCE_AUTO_JOIN_DISABLE 0x00
262#define NANOLR_NTW_PREFERENCE_AUTO_JOIN_ENABLE 0x40
263#define NANOLR_NTW_PREFERENCE_ADAPTIVE_DATA_RATE_DISABLE 0x00
264#define NANOLR_NTW_PREFERENCE_ADAPTIVE_DATA_RATE_ENABLE 0x20
271#define NANOLR_NTW_JOIN_MODE_ABP 0x00
272#define NANOLR_NTW_JOIN_MODE_OTAA 0x01
273
274#define NANOLR_RSP_READY 0x01
275#define NANOLR_RSP_NOT_READY 0x00
276
277#define NANOLR_ERR_CRC 0x01
278#define NANOLR_ERR_STATUS_OK 0x00
285#define DRV_RX_BUFFER_SIZE 500 // End group macro
289// --------------------------------------------------------------- PUBLIC TYPES
299#define nanolr_err_t uint8_t
300
304typedef struct
305{
306 // Output pins
307
308 digital_out_t st;
309 digital_out_t rst;
310 digital_out_t cts;
311
312 // Input pins
313
314 digital_in_t gp1;
315 digital_in_t rts;
316
317 // Modules
318
319 uart_t uart;
320
321 char uart_rx_buffer[ DRV_RX_BUFFER_SIZE ];
322 char uart_tx_buffer[ DRV_RX_BUFFER_SIZE ];
323
324 char rx_data[ 256 ];
325 uint16_t rsp_len;
326 uint8_t rsp_rdy;
327
328} nanolr_t;
329
333typedef struct
334{
335 // Communication gpio pins
336
337 pin_name_t rx_pin;
338 pin_name_t tx_pin;
339
340 // Additional gpio pins
341
342 pin_name_t st;
343 pin_name_t rst;
344 pin_name_t cts;
345 pin_name_t gp1;
346 pin_name_t rts;
347
348 // static variable
349
350 uint32_t baud_rate; // Clock speed.
352 uart_data_bits_t data_bit; // Data bits.
353 uart_parity_t parity_bit; // Parity bit.
354 uart_stop_bits_t stop_bit; // Stop bits.
355
357
361typedef struct
362{
363 uint16_t length;
364 uint8_t message_id;
365 uint8_t payload[ 256 ];
366 uint8_t crc;
367
369
373typedef struct
374{
375 uint8_t channel;
377 uint8_t bandwidth;
378 uint8_t coding_rate;
379
381 // End types group
383// ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
384
390#ifdef __cplusplus
391extern "C"{
392#endif
393
403
413
422
430void nanolr_reset ( nanolr_t *ctx );
431
441void nanolr_generic_write ( nanolr_t *ctx, char *data_buf, uint16_t len );
442
454int32_t nanolr_generic_read ( nanolr_t *ctx, char *data_buf, uint16_t max_len );
455
466
475void nanolr_clear_2_send ( nanolr_t *ctx, uint8_t state );
476
487
496void nanolr_set_st_pin ( nanolr_t *ctx, uint8_t state );
497
506
515
524
533
542
551
560
569
578void nanolr_set_output_power ( nanolr_t *ctx, uint8_t out_pwr );
579
622
633
643
653
662
674void nanolr_set_physical_address ( nanolr_t *ctx, uint8_t *app_eui, uint8_t *dev_eui );
675
694
707void nanolr_set_network_address ( nanolr_t *ctx, uint16_t ntw_addr );
708
726
735void nanolr_set_network_id ( nanolr_t *ctx, uint16_t ntw_id );
736
745
761void nanolr_set_network_role ( nanolr_t *ctx, uint8_t ntw_role );
762
771
780
811void nanolr_set_network_preference ( nanolr_t *ctx, uint8_t prot, uint8_t auto_join, uint8_t adr );
812
821
834void nanolr_set_network_join_mode ( nanolr_t *ctx, uint8_t ntw_join_mode );
835
844
853
862
872
881
890
911void nanolr_send_data ( nanolr_t *ctx, uint8_t *tx_data, uint8_t length );
912
922uint8_t nanolr_rsp_rdy ( nanolr_t *ctx );
923
933
944
945#ifdef __cplusplus
946}
947#endif
948#endif // _NANOLR_H_
949 // End public_function group
952
953// ------------------------------------------------------------------------- END
#define DRV_RX_BUFFER_SIZE
Definition: nanolr.h:285
#define NANOLR_RETVAL
Definition: nanolr.h:66
void nanolr_get_network_preference(nanolr_t *ctx)
Get network preference function.
int32_t nanolr_generic_read(nanolr_t *ctx, char *data_buf, uint16_t max_len)
Generic read function.
void nanolr_get_operating_channel(nanolr_t *ctx)
Get operating channel function.
void nanolr_get_device_state(nanolr_t *ctx)
Get device state function.
void nanolr_network_start(nanolr_t *ctx)
Network start function.
void nanolr_send_data(nanolr_t *ctx, uint8_t *tx_data, uint8_t length)
Send data function.
void nanolr_save_energy_rx_window(nanolr_t *ctx)
Save energy rx window function.
void nanolr_sw_reset(nanolr_t *ctx)
Software reset function.
void nanolr_network_stop(nanolr_t *ctx)
Network stop function.
void nanolr_get_network_address(nanolr_t *ctx)
Get network address function.
void nanolr_save_settings(nanolr_t *ctx)
Restore to factory function.
void nanolr_get_network_id(nanolr_t *ctx)
Get network identifiers function.
uint8_t nanolr_rsp_rdy(nanolr_t *ctx)
Check response ready function.
void nanolr_save_energy_tx_only(nanolr_t *ctx)
Save energy tx only function.
uint8_t nanolr_get_gp1_pin(nanolr_t *ctx)
Get GP1 pin state function.
void nanolr_save_energy_always_on(nanolr_t *ctx)
Save energy on function.
void nanolr_get_network_auto_settings(nanolr_t *ctx)
Get network automated settings function.
void nanolr_get_network_join_mode(nanolr_t *ctx)
Get network join mode function.
void nanolr_restore_2_factory(nanolr_t *ctx)
Restore to factory function.
void nanolr_reset(nanolr_t *ctx)
Reset module.
uint8_t nanolr_request_2_send(nanolr_t *ctx)
Request to Send function.
void nanolr_default_cfg(nanolr_t *ctx)
Click Default Configuration function.
void nanolr_get_wan_network_type(nanolr_t *ctx)
Get LRWAN network type function.
void nanolr_set_network_address(nanolr_t *ctx, uint16_t ntw_addr)
Set network address function.
void nanolr_clear_2_send(nanolr_t *ctx, uint8_t state)
Clear to Send function.
void nanolr_set_network_preference(nanolr_t *ctx, uint8_t prot, uint8_t auto_join, uint8_t adr)
Set network preference function.
void nanolr_set_network_role(nanolr_t *ctx, uint8_t ntw_role)
Set network role function.
void nanolr_get_network_role(nanolr_t *ctx)
Get network role function.
void nanolr_get_output_power(nanolr_t *ctx)
Get output power function.
nanolr_err_t nanolr_parser_rsp(nanolr_t *ctx, nanolr_rsp_t *response)
Response parser function.
NANOLR_RETVAL nanolr_init(nanolr_t *ctx, nanolr_cfg_t *cfg)
Initialization function.
void nanolr_cfg_setup(nanolr_cfg_t *cfg)
Config Object Initialization function.
void nanolr_set_network_id(nanolr_t *ctx, uint16_t ntw_id)
Set network identifiers function.
void nanolr_uart_isr(nanolr_t *ctx)
UART ISR function.
void nanolr_get_device_info(nanolr_t *ctx)
Get device information function.
void nanolr_get_battery_level(nanolr_t *ctx)
Get battery level function.
void nanolr_set_physical_address(nanolr_t *ctx, uint8_t *app_eui, uint8_t *dev_eui)
Set physical address function.
void nanolr_set_st_pin(nanolr_t *ctx, uint8_t state)
Set ST pin state function.
void nanolr_get_physical_address(nanolr_t *ctx)
Get physical address function.
void nanolr_set_output_power(nanolr_t *ctx, uint8_t out_pwr)
Set output power function.
void nanolr_set_operating_channel(nanolr_t *ctx, nanolr_network_t *net)
Set operating channel function.
void nanolr_generic_write(nanolr_t *ctx, char *data_buf, uint16_t len)
Generic write function.
void nanolr_wan_network_private(nanolr_t *ctx)
Set LRWAN network type private function.
void nanolr_wan_network_public(nanolr_t *ctx)
Set LRWAN network type public function.
void nanolr_set_network_join_mode(nanolr_t *ctx, uint8_t ntw_join_mode)
Set network join mode function.
void nanolr_get_fw_ver(nanolr_t *ctx)
Get firmware version function.
#define nanolr_err_t
Driver Error type.
Definition: nanolr.h:299
Click configuration structure definition.
Definition: nanolr.h:334
pin_name_t rts
Definition: nanolr.h:346
pin_name_t st
Definition: nanolr.h:342
uint32_t baud_rate
Definition: nanolr.h:350
pin_name_t cts
Definition: nanolr.h:344
bool uart_blocking
Definition: nanolr.h:351
uart_data_bits_t data_bit
Definition: nanolr.h:352
pin_name_t tx_pin
Definition: nanolr.h:338
pin_name_t rx_pin
Definition: nanolr.h:337
uart_stop_bits_t stop_bit
Definition: nanolr.h:354
pin_name_t gp1
Definition: nanolr.h:345
uart_parity_t parity_bit
Definition: nanolr.h:353
pin_name_t rst
Definition: nanolr.h:343
Click network structure definition.
Definition: nanolr.h:374
uint8_t spreading_factor
Definition: nanolr.h:376
uint8_t coding_rate
Definition: nanolr.h:378
uint8_t channel
Definition: nanolr.h:375
uint8_t bandwidth
Definition: nanolr.h:377
Click response structure definition.
Definition: nanolr.h:362
uint16_t length
Definition: nanolr.h:363
uint8_t message_id
Definition: nanolr.h:364
uint8_t crc
Definition: nanolr.h:366
Click ctx object definition.
Definition: nanolr.h:305
uint16_t rsp_len
Definition: nanolr.h:325
digital_in_t gp1
Definition: nanolr.h:314
uart_t uart
Definition: nanolr.h:319
uint8_t rsp_rdy
Definition: nanolr.h:326
digital_in_t rts
Definition: nanolr.h:315
digital_out_t st
Definition: nanolr.h:308
digital_out_t rst
Definition: nanolr.h:309
digital_out_t cts
Definition: nanolr.h:310