isoadc5  2.0.0.0
isoadc5.h
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22 
28 #ifndef ISOADC5_H
29 #define ISOADC5_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
35 #include "drv_digital_out.h"
36 #include "drv_digital_in.h"
37 #include "drv_spi_master.h"
38 
59 #define ISOADC5_REG_PROD_ID 0x00
60 #define ISOADC5_REG_ADC_1 0x01
61 #define ISOADC5_REG_ADC_2 0x02
62 #define ISOADC5_REG_ADC_3 0x03
63 #define ISOADC5_REG_ADC_4 0x04
64 #define ISOADC5_REG_FADC_1 0x05
65 #define ISOADC5_REG_FADC_2 0x06
66 #define ISOADC5_REG_FADC_3 0x07
67 #define ISOADC5_REG_FADC_4 0x08
68 #define ISOADC5_REG_COUNTHI_1 0x09
69 #define ISOADC5_REG_COUNTHI_2 0x0A
70 #define ISOADC5_REG_COUNTHI_3 0x0B
71 #define ISOADC5_REG_COUNTHI_4 0x0C
72 #define ISOADC5_REG_COUNTLO_1 0x0D
73 #define ISOADC5_REG_COUNTLO_2 0x0E
74 #define ISOADC5_REG_COUNTLO_3 0x0F
75 #define ISOADC5_REG_COUNTLO_4 0x10
76 #define ISOADC5_REG_COUT_STATUS 0x11
77 #define ISOADC5_REG_INTERRUPT_STATUS 0x12
78 #define ISOADC5_REG_INTERRUPT_ENABLE 0x13
79 #define ISOADC5_REG_CONTROL 0x14
80  // isoadc5_reg
82 
97 #define ISOADC5_DEVICE_ID 0x00
98 #define ISOADC5_NORMAL_OPERATION 0x00
99 #define ISOADC5_WAKE_UP_FROM_POR 0x80
100 #define ISOADC5_DEVICE_REV 0x01
101 
106 #define ISOADC5_ADC_NOT_UPDATED 0x8000
107 #define ISOADC5_ADC_12BIT_MASK 0x0FFF
108 
113 #define ISOADC5_CO_MODE_STATUS 0x80
114 #define ISOADC5_CO_IN_SEL_FILTERED_ADC 0x40
115 
120 #define ISOADC5_STATUS_CO_4 0x08
121 #define ISOADC5_STATUS_CO_3 0x04
122 #define ISOADC5_STATUS_CO_2 0x02
123 #define ISOADC5_STATUS_CO_1 0x01
124 
129 #define ISOADC5_INT_STATUS_EOC 0x1000
130 #define ISOADC5_INT_STATUS_ADCF 0x0800
131 #define ISOADC5_INT_STATUS_FLD 0x0400
132 #define ISOADC5_INT_STATUS_SPIFRM 0x0200
133 #define ISOADC5_INT_STATUS_SPICRC 0x0100
134 #define ISOADC5_INT_STATUS_CO_POS_4 0x0080
135 #define ISOADC5_INT_STATUS_CO_POS_3 0x0040
136 #define ISOADC5_INT_STATUS_CO_POS_2 0x0020
137 #define ISOADC5_INT_STATUS_CO_POS_1 0x0010
138 #define ISOADC5_INT_STATUS_CO_NEG_4 0x0008
139 #define ISOADC5_INT_STATUS_CO_NEG_3 0x0004
140 #define ISOADC5_INT_STATUS_CO_NEG_2 0x0002
141 #define ISOADC5_INT_STATUS_CO_NEG_1 0x0001
142 
147 #define ISOADC5_EN_CRC 0x8000
148 #define ISOADC5_EN_COMMON_COMP 0x4000
149 #define ISOADC5_CLEAR_FLT_4 0x0080
150 #define ISOADC5_CLEAR_FLT_3 0x0040
151 #define ISOADC5_CLEAR_FLT_2 0x0020
152 #define ISOADC5_CLEAR_FLT_1 0x0010
153 #define ISOADC5_DISABLE_PWR 0x0008
154 #define ISOADC5_CLEAR_POR 0x0004
155 #define ISOADC5_SOFT_RESET 0x0002
156 #define ISOADC5_HARD_RESET 0x0001
157 
162 #define ISOADC5_ADC_CHANNEL_1 0x01
163 #define ISOADC5_ADC_CHANNEL_2 0x02
164 #define ISOADC5_ADC_CHANNEL_3 0x03
165 #define ISOADC5_ADC_CHANNEL_4 0x04
166 
171 #define ISOADC5_ADC_UNFILTERED 0x00
172 #define ISOADC5_ADC_FILTERED 0x01
173 
178 #define ISOADC5_MAX_VOLTAGE 48.0
179 
184 #define ISOADC5_SPI_READ 0x00
185 #define ISOADC5_SPI_WRITE 0x02
186 #define ISOADC5_SPI_BURST 0x01
187  // isoadc5_set
189 
204 #define ISOADC5_MAP_MIKROBUS( cfg, mikrobus ) \
205  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
206  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
207  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
208  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
209  cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
210  // isoadc5_map // isoadc5
213 
218 typedef struct
219 {
220  digital_in_t int_pin;
222  // Modules
223  spi_master_t spi;
225  pin_name_t chip_select;
227 } isoadc5_t;
228 
233 typedef struct
234 {
235  // Communication gpio pins
236  pin_name_t miso;
237  pin_name_t mosi;
238  pin_name_t sck;
239  pin_name_t cs;
241  // Additional gpio pins
242  pin_name_t int_pin;
244  // static variable
245  uint32_t spi_speed;
246  spi_master_mode_t spi_mode;
247  spi_master_chip_select_polarity_t cs_polarity;
249 } isoadc5_cfg_t;
250 
255 typedef struct
256 {
257  uint16_t adc_1;
258  uint16_t adc_2;
259  uint16_t adc_3;
260  uint16_t adc_4;
261  uint16_t int_status;
262 
264 
269 typedef enum
270 {
272  ISOADC5_ERROR = -1
273 
275 
292 
306 err_t isoadc5_init ( isoadc5_t *ctx, isoadc5_cfg_t *cfg );
307 
321 err_t isoadc5_write_register ( isoadc5_t *ctx, uint8_t reg, uint16_t data_in );
322 
336 err_t isoadc5_read_register ( isoadc5_t *ctx, uint8_t reg, uint16_t *data_out );
337 
353 err_t isoadc5_read_register_burst ( isoadc5_t *ctx, uint8_t filt, isoadc5_burst_payload_t *payload );
354 
369 err_t isoadc5_read_voltage( isoadc5_t *ctx, uint8_t filt, uint8_t ch, float *volt );
370 
380 
381 #ifdef __cplusplus
382 }
383 #endif
384 #endif // ISOADC5_H
385  // isoadc5
387 
388 // ------------------------------------------------------------------------ END
ISOADC5_ERROR
@ ISOADC5_ERROR
Definition: isoadc5.h:272
isoadc5_cfg_t::spi_speed
uint32_t spi_speed
Definition: isoadc5.h:245
isoadc5_write_register
err_t isoadc5_write_register(isoadc5_t *ctx, uint8_t reg, uint16_t data_in)
ISO ADC 5 write register function.
isoadc5_cfg_t::miso
pin_name_t miso
Definition: isoadc5.h:236
isoadc5_return_value_t
isoadc5_return_value_t
ISO ADC 5 Click return value data.
Definition: isoadc5.h:270
isoadc5_cfg_t::cs
pin_name_t cs
Definition: isoadc5.h:239
isoadc5_burst_payload_t::adc_2
uint16_t adc_2
Definition: isoadc5.h:258
isoadc5_burst_payload_t
ISO ADC 5 Click burst payload structure object.
Definition: isoadc5.h:256
isoadc5_burst_payload_t::adc_1
uint16_t adc_1
Definition: isoadc5.h:257
isoadc5_t
ISO ADC 5 Click context object.
Definition: isoadc5.h:219
isoadc5_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: isoadc5.h:246
isoadc5_cfg_t::sck
pin_name_t sck
Definition: isoadc5.h:238
isoadc5_burst_payload_t::adc_3
uint16_t adc_3
Definition: isoadc5.h:259
isoadc5_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: isoadc5.h:247
isoadc5_init
err_t isoadc5_init(isoadc5_t *ctx, isoadc5_cfg_t *cfg)
ISO ADC 5 initialization function.
isoadc5_t::int_pin
digital_in_t int_pin
Definition: isoadc5.h:220
isoadc5_cfg_t::mosi
pin_name_t mosi
Definition: isoadc5.h:237
isoadc5_cfg_t
ISO ADC 5 Click configuration object.
Definition: isoadc5.h:234
isoadc5_burst_payload_t::adc_4
uint16_t adc_4
Definition: isoadc5.h:260
isoadc5_burst_payload_t::int_status
uint16_t int_status
Definition: isoadc5.h:261
ISOADC5_OK
@ ISOADC5_OK
Definition: isoadc5.h:271
isoadc5_read_register
err_t isoadc5_read_register(isoadc5_t *ctx, uint8_t reg, uint16_t *data_out)
ISO ADC 5 read register function.
isoadc5_get_int_pin
uint8_t isoadc5_get_int_pin(isoadc5_t *ctx)
ISO ADC 5 get int pin function.
isoadc5_read_voltage
err_t isoadc5_read_voltage(isoadc5_t *ctx, uint8_t filt, uint8_t ch, float *volt)
ISO ADC 5 read voltage function.
isoadc5_cfg_t::int_pin
pin_name_t int_pin
Definition: isoadc5.h:242
isoadc5_cfg_setup
void isoadc5_cfg_setup(isoadc5_cfg_t *cfg)
ISO ADC 5 configuration object setup function.
isoadc5_read_register_burst
err_t isoadc5_read_register_burst(isoadc5_t *ctx, uint8_t filt, isoadc5_burst_payload_t *payload)
ISO ADC 5 read register function.
isoadc5_t::chip_select
pin_name_t chip_select
Definition: isoadc5.h:225
isoadc5_t::spi
spi_master_t spi
Definition: isoadc5.h:223