isoadc5  2.0.0.0
isoadc5.h
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22 
28 #ifndef ISOADC5_H
29 #define ISOADC5_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
39 #ifdef PREINIT_SUPPORTED
40 #include "preinit.h"
41 #endif
42 
43 #ifdef MikroCCoreVersion
44  #if MikroCCoreVersion >= 1
45  #include "delays.h"
46  #endif
47 #endif
48 
49 #include "drv_digital_out.h"
50 #include "drv_digital_in.h"
51 #include "drv_spi_master.h"
52 
73 #define ISOADC5_REG_PROD_ID 0x00
74 #define ISOADC5_REG_ADC_1 0x01
75 #define ISOADC5_REG_ADC_2 0x02
76 #define ISOADC5_REG_ADC_3 0x03
77 #define ISOADC5_REG_ADC_4 0x04
78 #define ISOADC5_REG_FADC_1 0x05
79 #define ISOADC5_REG_FADC_2 0x06
80 #define ISOADC5_REG_FADC_3 0x07
81 #define ISOADC5_REG_FADC_4 0x08
82 #define ISOADC5_REG_COUNTHI_1 0x09
83 #define ISOADC5_REG_COUNTHI_2 0x0A
84 #define ISOADC5_REG_COUNTHI_3 0x0B
85 #define ISOADC5_REG_COUNTHI_4 0x0C
86 #define ISOADC5_REG_COUNTLO_1 0x0D
87 #define ISOADC5_REG_COUNTLO_2 0x0E
88 #define ISOADC5_REG_COUNTLO_3 0x0F
89 #define ISOADC5_REG_COUNTLO_4 0x10
90 #define ISOADC5_REG_COUT_STATUS 0x11
91 #define ISOADC5_REG_INTERRUPT_STATUS 0x12
92 #define ISOADC5_REG_INTERRUPT_ENABLE 0x13
93 #define ISOADC5_REG_CONTROL 0x14
94  // isoadc5_reg
96 
111 #define ISOADC5_DEVICE_ID 0x00
112 #define ISOADC5_NORMAL_OPERATION 0x00
113 #define ISOADC5_WAKE_UP_FROM_POR 0x80
114 #define ISOADC5_DEVICE_REV 0x01
115 
120 #define ISOADC5_ADC_NOT_UPDATED 0x8000
121 #define ISOADC5_ADC_12BIT_MASK 0x0FFF
122 
127 #define ISOADC5_CO_MODE_STATUS 0x80
128 #define ISOADC5_CO_IN_SEL_FILTERED_ADC 0x40
129 
134 #define ISOADC5_STATUS_CO_4 0x08
135 #define ISOADC5_STATUS_CO_3 0x04
136 #define ISOADC5_STATUS_CO_2 0x02
137 #define ISOADC5_STATUS_CO_1 0x01
138 
143 #define ISOADC5_INT_STATUS_EOC 0x1000
144 #define ISOADC5_INT_STATUS_ADCF 0x0800
145 #define ISOADC5_INT_STATUS_FLD 0x0400
146 #define ISOADC5_INT_STATUS_SPIFRM 0x0200
147 #define ISOADC5_INT_STATUS_SPICRC 0x0100
148 #define ISOADC5_INT_STATUS_CO_POS_4 0x0080
149 #define ISOADC5_INT_STATUS_CO_POS_3 0x0040
150 #define ISOADC5_INT_STATUS_CO_POS_2 0x0020
151 #define ISOADC5_INT_STATUS_CO_POS_1 0x0010
152 #define ISOADC5_INT_STATUS_CO_NEG_4 0x0008
153 #define ISOADC5_INT_STATUS_CO_NEG_3 0x0004
154 #define ISOADC5_INT_STATUS_CO_NEG_2 0x0002
155 #define ISOADC5_INT_STATUS_CO_NEG_1 0x0001
156 
161 #define ISOADC5_EN_CRC 0x8000
162 #define ISOADC5_EN_COMMON_COMP 0x4000
163 #define ISOADC5_CLEAR_FLT_4 0x0080
164 #define ISOADC5_CLEAR_FLT_3 0x0040
165 #define ISOADC5_CLEAR_FLT_2 0x0020
166 #define ISOADC5_CLEAR_FLT_1 0x0010
167 #define ISOADC5_DISABLE_PWR 0x0008
168 #define ISOADC5_CLEAR_POR 0x0004
169 #define ISOADC5_SOFT_RESET 0x0002
170 #define ISOADC5_HARD_RESET 0x0001
171 
176 #define ISOADC5_ADC_CHANNEL_1 0x01
177 #define ISOADC5_ADC_CHANNEL_2 0x02
178 #define ISOADC5_ADC_CHANNEL_3 0x03
179 #define ISOADC5_ADC_CHANNEL_4 0x04
180 
185 #define ISOADC5_ADC_UNFILTERED 0x00
186 #define ISOADC5_ADC_FILTERED 0x01
187 
192 #define ISOADC5_MAX_VOLTAGE 48.0
193 
198 #define ISOADC5_SPI_READ 0x00
199 #define ISOADC5_SPI_WRITE 0x02
200 #define ISOADC5_SPI_BURST 0x01
201  // isoadc5_set
203 
218 #define ISOADC5_MAP_MIKROBUS( cfg, mikrobus ) \
219  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
220  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
221  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
222  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
223  cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
224  // isoadc5_map // isoadc5
227 
232 typedef struct
233 {
234  digital_in_t int_pin;
236  // Modules
237  spi_master_t spi;
239  pin_name_t chip_select;
241 } isoadc5_t;
242 
247 typedef struct
248 {
249  // Communication gpio pins
250  pin_name_t miso;
251  pin_name_t mosi;
252  pin_name_t sck;
253  pin_name_t cs;
255  // Additional gpio pins
256  pin_name_t int_pin;
258  // static variable
259  uint32_t spi_speed;
260  spi_master_mode_t spi_mode;
261  spi_master_chip_select_polarity_t cs_polarity;
263 } isoadc5_cfg_t;
264 
269 typedef struct
270 {
271  uint16_t adc_1;
272  uint16_t adc_2;
273  uint16_t adc_3;
274  uint16_t adc_4;
275  uint16_t int_status;
276 
278 
283 typedef enum
284 {
286  ISOADC5_ERROR = -1
287 
289 
306 
320 err_t isoadc5_init ( isoadc5_t *ctx, isoadc5_cfg_t *cfg );
321 
335 err_t isoadc5_write_register ( isoadc5_t *ctx, uint8_t reg, uint16_t data_in );
336 
350 err_t isoadc5_read_register ( isoadc5_t *ctx, uint8_t reg, uint16_t *data_out );
351 
367 err_t isoadc5_read_register_burst ( isoadc5_t *ctx, uint8_t filt, isoadc5_burst_payload_t *payload );
368 
383 err_t isoadc5_read_voltage( isoadc5_t *ctx, uint8_t filt, uint8_t ch, float *volt );
384 
394 
395 #ifdef __cplusplus
396 }
397 #endif
398 #endif // ISOADC5_H
399  // isoadc5
401 
402 // ------------------------------------------------------------------------ END
ISOADC5_ERROR
@ ISOADC5_ERROR
Definition: isoadc5.h:286
isoadc5_cfg_t::spi_speed
uint32_t spi_speed
Definition: isoadc5.h:259
isoadc5_write_register
err_t isoadc5_write_register(isoadc5_t *ctx, uint8_t reg, uint16_t data_in)
ISO ADC 5 write register function.
isoadc5_cfg_t::miso
pin_name_t miso
Definition: isoadc5.h:250
isoadc5_return_value_t
isoadc5_return_value_t
ISO ADC 5 Click return value data.
Definition: isoadc5.h:284
isoadc5_cfg_t::cs
pin_name_t cs
Definition: isoadc5.h:253
isoadc5_burst_payload_t::adc_2
uint16_t adc_2
Definition: isoadc5.h:272
isoadc5_burst_payload_t
ISO ADC 5 Click burst payload structure object.
Definition: isoadc5.h:270
isoadc5_burst_payload_t::adc_1
uint16_t adc_1
Definition: isoadc5.h:271
isoadc5_t
ISO ADC 5 Click context object.
Definition: isoadc5.h:233
isoadc5_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: isoadc5.h:260
isoadc5_cfg_t::sck
pin_name_t sck
Definition: isoadc5.h:252
isoadc5_burst_payload_t::adc_3
uint16_t adc_3
Definition: isoadc5.h:273
isoadc5_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: isoadc5.h:261
isoadc5_init
err_t isoadc5_init(isoadc5_t *ctx, isoadc5_cfg_t *cfg)
ISO ADC 5 initialization function.
isoadc5_t::int_pin
digital_in_t int_pin
Definition: isoadc5.h:234
isoadc5_cfg_t::mosi
pin_name_t mosi
Definition: isoadc5.h:251
isoadc5_cfg_t
ISO ADC 5 Click configuration object.
Definition: isoadc5.h:248
isoadc5_burst_payload_t::adc_4
uint16_t adc_4
Definition: isoadc5.h:274
isoadc5_burst_payload_t::int_status
uint16_t int_status
Definition: isoadc5.h:275
ISOADC5_OK
@ ISOADC5_OK
Definition: isoadc5.h:285
isoadc5_read_register
err_t isoadc5_read_register(isoadc5_t *ctx, uint8_t reg, uint16_t *data_out)
ISO ADC 5 read register function.
isoadc5_get_int_pin
uint8_t isoadc5_get_int_pin(isoadc5_t *ctx)
ISO ADC 5 get int pin function.
isoadc5_read_voltage
err_t isoadc5_read_voltage(isoadc5_t *ctx, uint8_t filt, uint8_t ch, float *volt)
ISO ADC 5 read voltage function.
isoadc5_cfg_t::int_pin
pin_name_t int_pin
Definition: isoadc5.h:256
isoadc5_cfg_setup
void isoadc5_cfg_setup(isoadc5_cfg_t *cfg)
ISO ADC 5 configuration object setup function.
isoadc5_read_register_burst
err_t isoadc5_read_register_burst(isoadc5_t *ctx, uint8_t filt, isoadc5_burst_payload_t *payload)
ISO ADC 5 read register function.
isoadc5_t::chip_select
pin_name_t chip_select
Definition: isoadc5.h:239
isoadc5_t::spi
spi_master_t spi
Definition: isoadc5.h:237