nvsram  2.0.0.0
nvsram.h
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22 
28 #ifndef NVSRAM_H
29 #define NVSRAM_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
39 #ifdef PREINIT_SUPPORTED
40 #include "preinit.h"
41 #endif
42 
43 #ifdef MikroCCoreVersion
44  #if MikroCCoreVersion >= 1
45  #include "delays.h"
46  #endif
47 #endif
48 
49 #include "drv_digital_out.h"
50 #include "drv_digital_in.h"
51 #include "drv_i2c_master.h"
52 
73 #define NVSRAM_MEM_CTL_REG 0x00
74 #define NVSRAM_SERIAL_NUM_REG_1 0x01
75 #define NVSRAM_SERIAL_NUM_REG_2 0x02
76 #define NVSRAM_SERIAL_NUM_REG_3 0x03
77 #define NVSRAM_SERIAL_NUM_REG_4 0x04
78 #define NVSRAM_SERIAL_NUM_REG_5 0x05
79 #define NVSRAM_SERIAL_NUM_REG_6 0x06
80 #define NVSRAM_SERIAL_NUM_REG_7 0x07
81 #define NVSRAM_SERIAL_NUM_REG_8 0x08
82 #define NVSRAM_DEV_ID_REG_1 0x09
83 #define NVSRAM_DEV_ID_REG_2 0x0A
84 #define NVSRAM_DEV_ID_REG_3 0x0B
85 #define NVSRAM_DEV_ID_REG_4 0x0C
86 #define NVSRAM_CMD_REG 0xAA
87  // nvsram_reg
89 
104 #define NVSRAM_I2C_MEM_SEL 0x50
105 
110 #define NVSRAM_CMD_STORE 0x3C
111 #define NVSRAM_CMD_RECALL 0x60
112 #define NVSRAM_CMD_ASENB 0x59
113 #define NVSRAM_CMD_ASDISB 0x19
114 #define NVSRAM_CMD_SLEEP 0xB9
115 
120 #define NVSRAM_BP_NONE 0x00
121 #define NVSRAM_BP_QUARTER 0x04
122 #define NVSRAM_BP_HALF 0x08
123 #define NVSRAM_BP_ALL 0x0C
124 #define NVSRAM_NO_SNL 0x00
125 #define NVSRAM_SNL 0x40
126 
131 #define NVSRAM_WRITE_MEMORY_DISABLE 0x00
132 #define NVSRAM_WRITE_MEMORY_ENABLE 0x01
133 
138 #define NVSRAM_I2C_SLAVE_ADDR_0 0x18
139 #define NVSRAM_I2C_SLAVE_ADDR_1 0x1A
140 #define NVSRAM_I2C_SLAVE_ADDR_2 0x1C
141 #define NVSRAM_I2C_SLAVE_ADDR_3 0x1E
142  // nvsram_set
144 
159 #define NVSRAM_MAP_MIKROBUS( cfg, mikrobus ) \
160  cfg.scl = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
161  cfg.sda = MIKROBUS( mikrobus, MIKROBUS_SDA ); \
162  cfg.wp = MIKROBUS( mikrobus, MIKROBUS_PWM )
163  // nvsram_map // nvsram
166 
171 typedef struct
172 {
173  // Output pins
174  digital_out_t wp;
176  // Modules
177  i2c_master_t i2c;
179  // I2C slave address
180  uint8_t slave_address;
182 } nvsram_t;
183 
188 typedef struct
189 {
190  pin_name_t scl;
191  pin_name_t sda;
193  pin_name_t wp;
195  uint32_t i2c_speed;
196  uint8_t i2c_address;
198 } nvsram_cfg_t;
199 
204 typedef enum
205 {
207  NVSRAM_ERROR = -1
208 
210 
227 
242 err_t nvsram_init ( nvsram_t *ctx, nvsram_cfg_t *cfg );
243 
259 err_t nvsram_generic_write ( nvsram_t *ctx, uint8_t reg, uint8_t *tx_buf, uint8_t tx_len );
260 
276 err_t nvsram_generic_read ( nvsram_t *ctx, uint8_t reg, uint8_t *rx_buf, uint8_t rx_len );
277 
291 void nvsram_reg_write ( nvsram_t *ctx, uint8_t reg, uint8_t tx_data );
292 
305 uint8_t nvsram_reg_read ( nvsram_t *ctx, uint8_t reg );
306 
322 void nvsram_burst_reg_write ( nvsram_t *ctx, uint8_t reg, uint8_t *p_tx_data, uint8_t n_bytes );
323 
339 void nvsram_burst_reg_read ( nvsram_t *ctx, uint8_t reg, uint8_t *p_rx_data, uint8_t n_bytes );
340 
353 void nvsram_send_cmd ( nvsram_t *ctx, uint8_t cmd );
354 
366 uint32_t nvsram_read_dev_id ( nvsram_t *ctx );
367 
383 void nvsram_memory_write ( nvsram_t *ctx, uint32_t mem_adr, uint8_t *p_tx_data, uint16_t n_bytes );
384 
400 void nvsram_memory_read ( nvsram_t *ctx, uint32_t mem_adr, uint8_t *p_rx_data, uint16_t n_bytes );
401 
414 void nvsram_enable_memory_write ( nvsram_t *ctx, uint8_t en_wr_mem );
415 
416 #ifdef __cplusplus
417 }
418 #endif
419 #endif // NVSRAM_H
420  // nvsram
422 
423 // ------------------------------------------------------------------------ END
nvsram_generic_read
err_t nvsram_generic_read(nvsram_t *ctx, uint8_t reg, uint8_t *rx_buf, uint8_t rx_len)
nvSRAM I2C reading function.
nvsram_cfg_t::i2c_address
uint8_t i2c_address
Definition: nvsram.h:196
nvsram_cfg_t::i2c_speed
uint32_t i2c_speed
Definition: nvsram.h:195
nvsram_init
err_t nvsram_init(nvsram_t *ctx, nvsram_cfg_t *cfg)
nvSRAM initialization function.
nvsram_burst_reg_read
void nvsram_burst_reg_read(nvsram_t *ctx, uint8_t reg, uint8_t *p_rx_data, uint8_t n_bytes)
Burst register read function.
nvsram_enable_memory_write
void nvsram_enable_memory_write(nvsram_t *ctx, uint8_t en_wr_mem)
Enable memory write function.
nvsram_burst_reg_write
void nvsram_burst_reg_write(nvsram_t *ctx, uint8_t reg, uint8_t *p_tx_data, uint8_t n_bytes)
Burst register write function.
nvsram_t
nvSRAM Click context object.
Definition: nvsram.h:172
NVSRAM_OK
@ NVSRAM_OK
Definition: nvsram.h:206
nvsram_reg_read
uint8_t nvsram_reg_read(nvsram_t *ctx, uint8_t reg)
Generic read the byte of data function.
nvsram_generic_write
err_t nvsram_generic_write(nvsram_t *ctx, uint8_t reg, uint8_t *tx_buf, uint8_t tx_len)
nvSRAM I2C writing function.
nvsram_memory_write
void nvsram_memory_write(nvsram_t *ctx, uint32_t mem_adr, uint8_t *p_tx_data, uint16_t n_bytes)
Write memory function.
NVSRAM_ERROR
@ NVSRAM_ERROR
Definition: nvsram.h:207
nvsram_memory_read
void nvsram_memory_read(nvsram_t *ctx, uint32_t mem_adr, uint8_t *p_rx_data, uint16_t n_bytes)
Read memory function.
nvsram_cfg_t
nvSRAM Click configuration object.
Definition: nvsram.h:189
nvsram_t::wp
digital_out_t wp
Definition: nvsram.h:174
nvsram_t::slave_address
uint8_t slave_address
Definition: nvsram.h:180
nvsram_cfg_t::scl
pin_name_t scl
Definition: nvsram.h:190
nvsram_return_value_t
nvsram_return_value_t
nvSRAM Click return value data.
Definition: nvsram.h:205
nvsram_reg_write
void nvsram_reg_write(nvsram_t *ctx, uint8_t reg, uint8_t tx_data)
Generic write the byte of data function.
nvsram_cfg_t::sda
pin_name_t sda
Definition: nvsram.h:191
nvsram_send_cmd
void nvsram_send_cmd(nvsram_t *ctx, uint8_t cmd)
Send command function.
nvsram_cfg_setup
void nvsram_cfg_setup(nvsram_cfg_t *cfg)
nvSRAM configuration object setup function.
nvsram_t::i2c
i2c_master_t i2c
Definition: nvsram.h:177
nvsram_read_dev_id
uint32_t nvsram_read_dev_id(nvsram_t *ctx)
Read device ID function.
nvsram_cfg_t::wp
pin_name_t wp
Definition: nvsram.h:193