clockgen5 2.0.0.0
clockgen5.h
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2** Copyright (C) 2020 MikroElektronika d.o.o.
3** Contact: https://www.mikroe.com/contact
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22
28#ifndef CLOCKGEN5_H
29#define CLOCKGEN5_H
30
31#ifdef __cplusplus
32extern "C"{
33#endif
34
35#include "drv_digital_out.h"
36#include "drv_digital_in.h"
37#include "drv_spi_master.h"
38#include "spi_specifics.h"
39
60#define CLOCKGEN5_OCT_0 0
61#define CLOCKGEN5_OCT_1 1
62#define CLOCKGEN5_OCT_2 2
63#define CLOCKGEN5_OCT_3 3
64#define CLOCKGEN5_OCT_4 4
65#define CLOCKGEN5_OCT_5 5
66#define CLOCKGEN5_OCT_6 6
67#define CLOCKGEN5_OCT_7 7
68#define CLOCKGEN5_OCT_8 8
69#define CLOCKGEN5_OCT_9 9
70#define CLOCKGEN5_OCT_10 10
71#define CLOCKGEN5_OCT_11 11
72#define CLOCKGEN5_OCT_12 12
73#define CLOCKGEN5_OCT_13 13
74#define CLOCKGEN5_OCT_14 14
75#define CLOCKGEN5_OCT_15 15
76
82#define CLOCKGEN5_OUTPUT_DISABLE 0x00
83#define CLOCKGEN5_OUTPUT_ENABLE 0x01
84
89#define CLOCKGEN5_CFG_ON_CLK_180 0x00
90#define CLOCKGEN5_CFG_OFF_ON 0x01
91#define CLOCKGEN5_CFG_ON_OFF 0x02
92#define CLOCKGEN5_CFG_POWER_DOWN 0x03
93
102#define CLOCKGEN5_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
103#define CLOCKGEN5_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
104 // clockgen5_set
106
121#define CLOCKGEN5_MAP_MIKROBUS( cfg, mikrobus ) \
122 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
123 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
124 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
125 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
126 cfg.oe = MIKROBUS( mikrobus, MIKROBUS_RST )
127 // clockgen5_map // clockgen5
130
135typedef struct
136{
137 // Output pins
138 digital_out_t oe;
140 // Modules
141 spi_master_t spi;
143 pin_name_t chip_select;
145 uint8_t dev_config;
146
148
153typedef struct
154{
155 // Communication gpio pins
156 pin_name_t miso;
157 pin_name_t mosi;
158 pin_name_t sck;
159 pin_name_t cs;
161 // Additional gpio pins
162 pin_name_t oe;
164 // static variable
165 uint32_t spi_speed;
166 spi_master_mode_t spi_mode;
167 spi_master_chip_select_polarity_t cs_polarity;
170
175typedef enum
176{
178 CLOCKGEN5_ERROR = -1
179
181
198
213
223void clockgen5_out_enable ( clockgen5_t *ctx, uint8_t en_out );
224
233void clockgen5_set_config ( clockgen5_t *ctx, uint8_t cfg );
234
243void clockgen5_set_freq ( clockgen5_t *ctx, float freq );
244
245#ifdef __cplusplus
246}
247#endif
248#endif // CLOCKGEN5_H
249 // clockgen5
251
252// ------------------------------------------------------------------------ END
clockgen5_return_value_t
Clock Gen 5 Click return value data.
Definition: clockgen5.h:176
@ CLOCKGEN5_ERROR
Definition: clockgen5.h:178
@ CLOCKGEN5_OK
Definition: clockgen5.h:177
err_t clockgen5_init(clockgen5_t *ctx, clockgen5_cfg_t *cfg)
Clock Gen 5 initialization function.
void clockgen5_out_enable(clockgen5_t *ctx, uint8_t en_out)
Enable output function.
void clockgen5_cfg_setup(clockgen5_cfg_t *cfg)
Clock Gen 5 configuration object setup function.
void clockgen5_set_config(clockgen5_t *ctx, uint8_t cfg)
Set configuration function.
void clockgen5_set_freq(clockgen5_t *ctx, float freq)
Set frequency function.
This file contains SPI specific macros, functions, etc.
Clock Gen 5 Click configuration object.
Definition: clockgen5.h:154
spi_master_chip_select_polarity_t cs_polarity
Definition: clockgen5.h:167
pin_name_t sck
Definition: clockgen5.h:158
pin_name_t oe
Definition: clockgen5.h:162
spi_master_mode_t spi_mode
Definition: clockgen5.h:166
pin_name_t mosi
Definition: clockgen5.h:157
uint32_t spi_speed
Definition: clockgen5.h:165
pin_name_t miso
Definition: clockgen5.h:156
pin_name_t cs
Definition: clockgen5.h:159
Clock Gen 5 Click context object.
Definition: clockgen5.h:136
spi_master_t spi
Definition: clockgen5.h:141
digital_out_t oe
Definition: clockgen5.h:138
uint8_t dev_config
Definition: clockgen5.h:145
pin_name_t chip_select
Definition: clockgen5.h:143