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35 #include "drv_digital_out.h"
36 #include "drv_digital_in.h"
37 #include "drv_spi_master.h"
64 #define SRAM3_OPCODE_WREN 0x06
65 #define SRAM3_OPCODE_WRDI 0x04
66 #define SRAM3_OPCODE_RDSR 0x05
67 #define SRAM3_OPCODE_WRSR 0x01
68 #define SRAM3_OPCODE_READ 0x03
69 #define SRAM3_OPCODE_SECURE_READ 0x13
70 #define SRAM3_OPCODE_WRITE 0x02
71 #define SRAM3_OPCODE_SECURE_WRITE 0x12
72 #define SRAM3_OPCODE_STORE 0x08
73 #define SRAM3_OPCODE_RECALL 0x09
74 #define SRAM3_OPCODE_WRSNR 0xC2
75 #define SRAM3_OPCODE_RDSNR 0xC3
76 #define SRAM3_OPCODE_HIBERNATE 0xB9
82 #define SRAM3_PROT_NONE 0x00
83 #define SRAM3_PROT_QUART 0x04
84 #define SRAM3_PROT_HALF 0x08
85 #define SRAM3_PROT_ALL 0x0C
91 #define SRAM3_STATS_RDY_BIT 0x01
92 #define SRAM3_STATS_WEN_BIT 0x02
93 #define SRAM3_STATS_SWM_BIT 0x10
94 #define SRAM3_STATS_PDIS_BIT 0x40
100 #define SRAM3_SERIAL_LEN 0x10
101 #define SRAM3_SECURE_BUF_SIZE 0x80
118 #define SRAM3_MAP_MIKROBUS( cfg, mikrobus ) \
119 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
120 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
121 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
122 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
123 cfg.hold = MIKROBUS( mikrobus, MIKROBUS_PWM )
140 pin_name_t chip_select;
161 spi_master_mode_t spi_mode;
162 spi_master_chip_select_polarity_t cs_polarity;
426 void sram3_read(
sram3_t *ctx, uint32_t mem_adr, uint8_t *read_buf, uint8_t buf_size );
453 void sram3_write(
sram3_t *ctx, uint32_t mem_adr, uint8_t *write_buf, uint8_t buf_size );
void sram3_write_serial(sram3_t *ctx, uint8_t *buf)
SRAM 3 writing number function.
void sram3_read_serial(sram3_t *ctx, uint8_t *buf)
SRAM 3 reading number function.
err_t sram3_secure_write(sram3_t *ctx, uint32_t mem_adr, uint8_t *write_buf)
SRAM 3 secure writing data function.
err_t sram3_secure_read(sram3_t *ctx, uint32_t mem_adr, uint8_t *read_buf)
SRAM 3 secure reading data function.
SRAM 3 Click configuration object.
Definition: sram3.h:147
void sram3_disable_pdis(sram3_t *ctx)
SRAM 3 set up disable function.
void sram3_hibernate_stop(sram3_t *ctx)
SRAM 3 changing function.
void sram3_enable_pdis(sram3_t *ctx)
SRAM 3 set up enable function.
void sram3_hold(sram3_t *ctx)
SRAM 3 changing pin state function.
void sram3_release_hold(sram3_t *ctx)
SRAM 3 changing pin state function.
void sram3_write_status(sram3_t *ctx, uint8_t status)
SRAM 3 writing function.
void sram3_read(sram3_t *ctx, uint32_t mem_adr, uint8_t *read_buf, uint8_t buf_size)
SRAM 3 reading data function.
SRAM 3 Click context object.
Definition: sram3.h:131
void sram3_hibernate_start(sram3_t *ctx)
SRAM 3 changing function.
void sram3_recall(sram3_t *ctx)
SRAM 3 relocation data function.
err_t sram3_init(sram3_t *ctx, sram3_cfg_t *cfg)
SRAM 3 initialization function.
err_t sram3_generic_read(sram3_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len)
SRAM 3 data reading function.
uint8_t sram3_read_status(sram3_t *ctx)
SRAM 3 reading function.
void sram3_store(sram3_t *ctx)
SRAM 3 relocation data function.
void sram3_write(sram3_t *ctx, uint32_t mem_adr, uint8_t *write_buf, uint8_t buf_size)
SRAM 3 writing data function.
err_t sram3_generic_write(sram3_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len)
SRAM 3 data writing function.
uint8_t buf[10]
Definition: main.c:30
void sram3_protect_memory(sram3_t *ctx, uint8_t protect_range)
SRAM 3 secures memory function.
void sram3_disable_write(sram3_t *ctx)
SRAM 3 disabling writing to memory function.
void sram3_cfg_setup(sram3_cfg_t *cfg)
SRAM 3 configuration object setup function.
sram3_return_value_t
SRAM 3 Click return value data.
Definition: sram3.h:169
void sram3_enable_write(sram3_t *ctx)
SRAM 3 enabling writing to memory function.