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35 #include "drv_digital_out.h"
36 #include "drv_digital_in.h"
37 #include "drv_spi_master.h"
60 #define HBRIDGE9_OPCODE_WRITE 0x00
61 #define HBRIDGE9_OPCODE_READ 0x40
62 #define HBRIDGE9_OPCODE_READ_CLEAR 0x80
63 #define HBRIDGE9_OPCODE_READ_DEV_INFO 0xC0
64 #define HBRIDGE9_ADV_OPCODE_SET_DEFAULT 0xFF
65 #define HBRIDGE9_ADV_OPCODE_CLEAR_STATUS 0xBF
66 #define HBRIDGE9_OPCODE_BITS_MASK 0xC0
72 #define HBRIDGE9_REG_CR0 0x00
73 #define HBRIDGE9_REG_CR1 0x01
74 #define HBRIDGE9_REG_CR2 0x02
75 #define HBRIDGE9_REG_CR3 0x03
76 #define HBRIDGE9_REG_CR4 0x04
77 #define HBRIDGE9_REG_CR5 0x05
78 #define HBRIDGE9_REG_CR6 0x06
79 #define HBRIDGE9_REG_CR7 0x07
80 #define HBRIDGE9_REG_CR8 0x08
86 #define HBRIDGE9_REG_SR0 0x10
87 #define HBRIDGE9_REG_SR1 0x11
88 #define HBRIDGE9_REG_SR2 0x12
89 #define HBRIDGE9_REG_SR3 0x13
90 #define HBRIDGE9_REG_SR4 0x14
91 #define HBRIDGE9_REG_SR5 0x15
92 #define HBRIDGE9_REG_SR6 0x16
93 #define HBRIDGE9_REG_SR7 0x17
94 #define HBRIDGE9_REG_SR8 0x18
100 #define HBRIDGE9_REG_INFO_COMPANY_CODE 0x00
101 #define HBRIDGE9_REG_INFO_DEVICE_FAMILY 0x01
102 #define HBRIDGE9_REG_INFO_DEVICE_NO_1 0x02
103 #define HBRIDGE9_REG_INFO_DEVICE_NO_2 0x03
104 #define HBRIDGE9_REG_INFO_DEVICE_NO_3 0x04
105 #define HBRIDGE9_REG_INFO_DEVICE_NO_4 0x05
106 #define HBRIDGE9_REG_INFO_SILICON_VER 0x0A
107 #define HBRIDGE9_REG_INFO_SPI_MODE 0x10
108 #define HBRIDGE9_REG_INFO_SPI_CPHA_TEST 0x20
126 #define HBRIDGE9_SPI_CPHA_TEST 0x55
132 #define HBRIDGE9_ODD_PARITY 0x01
138 #define HBRIDGE9_CR0_PWM_FREQ_10p240 0x0000
139 #define HBRIDGE9_CR0_PWM_FREQ_12p288 0x2000
140 #define HBRIDGE9_CR0_PWM_FREQ_14p336 0x4000
141 #define HBRIDGE9_CR0_PWM_FREQ_16p384 0x6000
142 #define HBRIDGE9_CR0_PWM_FREQ_18p432 0x8000
143 #define HBRIDGE9_CR0_PWM_FREQ_20p480 0xA000
144 #define HBRIDGE9_CR0_PWM_FREQ_22p528 0xC000
145 #define HBRIDGE9_CR0_PWM_FREQ_24p576 0xE000
146 #define HBRIDGE9_CR0_PWM_FREQ_MASK 0xE000
147 #define HBRIDGE9_CR0_OUT6_POL_HIGH 0x1000
148 #define HBRIDGE9_CR0_OUT6_POL_LOW 0x0040
149 #define HBRIDGE9_CR0_OUT6_POL_MASK 0x1040
150 #define HBRIDGE9_CR0_OUT5_POL_HIGH 0x0800
151 #define HBRIDGE9_CR0_OUT5_POL_LOW 0x0020
152 #define HBRIDGE9_CR0_OUT5_POL_MASK 0x0820
153 #define HBRIDGE9_CR0_OUT4_POL_HIGH 0x0400
154 #define HBRIDGE9_CR0_OUT4_POL_LOW 0x0010
155 #define HBRIDGE9_CR0_OUT4_POL_MASK 0x0410
156 #define HBRIDGE9_CR0_OUT3_POL_HIGH 0x0200
157 #define HBRIDGE9_CR0_OUT3_POL_LOW 0x0008
158 #define HBRIDGE9_CR0_OUT3_POL_MASK 0x0208
159 #define HBRIDGE9_CR0_OUT2_POL_HIGH 0x0100
160 #define HBRIDGE9_CR0_OUT2_POL_LOW 0x0004
161 #define HBRIDGE9_CR0_OUT2_POL_MASK 0x0104
162 #define HBRIDGE9_CR0_OUT1_POL_HIGH 0x0080
163 #define HBRIDGE9_CR0_OUT1_POL_LOW 0x0002
164 #define HBRIDGE9_CR0_OUT1_POL_MASK 0x0082
170 #define HBRIDGE9_CR1_EX_OUT2_ON 0x8000
171 #define HBRIDGE9_CR1_EX_OUT1_ON 0x4000
172 #define HBRIDGE9_CR1_EX_OUT_MASK 0xC000
173 #define HBRIDGE9_CR1_OUT6_ON 0x2000
174 #define HBRIDGE9_CR1_OUT5_ON 0x1000
175 #define HBRIDGE9_CR1_OUT4_ON 0x0800
176 #define HBRIDGE9_CR1_OUT3_ON 0x0400
177 #define HBRIDGE9_CR1_OUT2_ON 0x0200
178 #define HBRIDGE9_CR1_OUT1_ON 0x0100
179 #define HBRIDGE9_CR1_OUT_MASK 0x3F00
180 #define HBRIDGE9_CR1_EMCY_NORMAL_MODE 0x0000
181 #define HBRIDGE9_CR1_EMCY_EMERGENCY_MODE 0x0080
182 #define HBRIDGE9_CR1_EMCY_MASK 0x00C0
183 #define HBRIDGE9_CR1_EX_OUT2_POL_HIGH 0x0020
184 #define HBRIDGE9_CR1_EX_OUT2_POL_LOW 0x0008
185 #define HBRIDGE9_CR1_EX_OUT2_POL_MASK 0x0028
186 #define HBRIDGE9_CR1_EX_OUT1_POL_HIGH 0x0010
187 #define HBRIDGE9_CR1_EX_OUT1_POL_LOW 0x0004
188 #define HBRIDGE9_CR1_EX_OUT1_POL_MASK 0x0014
189 #define HBRIDGE9_CR1_OUT_ON 0x0002
195 #define HBRIDGE9_CR2_DBN_EX2 0x8000
196 #define HBRIDGE9_CR2_DBN_EX1 0x4000
197 #define HBRIDGE9_CR2_DBN_EX_MASK 0xC000
198 #define HBRIDGE9_CR2_DBN_6 0x2000
199 #define HBRIDGE9_CR2_DBN_5 0x1000
200 #define HBRIDGE9_CR2_DBN_4 0x0800
201 #define HBRIDGE9_CR2_DBN_3 0x0400
202 #define HBRIDGE9_CR2_DBN_2 0x0200
203 #define HBRIDGE9_CR2_DBN_1 0x0100
204 #define HBRIDGE9_CR2_DBN_MASK 0x3F00
205 #define HBRIDGE9_CR2_ON_TIME_DUR_100MS 0x0000
206 #define HBRIDGE9_CR2_ON_TIME_DUR_120MS 0x0008
207 #define HBRIDGE9_CR2_ON_TIME_DUR_140MS 0x0010
208 #define HBRIDGE9_CR2_ON_TIME_DUR_160MS 0x0018
209 #define HBRIDGE9_CR2_ON_TIME_DUR_180MS 0x0020
210 #define HBRIDGE9_CR2_ON_TIME_DUR_200MS 0x0028
211 #define HBRIDGE9_CR2_ON_TIME_DUR_220MS 0x0030
212 #define HBRIDGE9_CR2_ON_TIME_DUR_240MS 0x0038
213 #define HBRIDGE9_CR2_ON_TIME_DUR_260MS 0x0040
214 #define HBRIDGE9_CR2_ON_TIME_DUR_280MS 0x0048
215 #define HBRIDGE9_CR2_ON_TIME_DUR_300MS 0x0050
216 #define HBRIDGE9_CR2_ON_TIME_DUR_320MS 0x0058
217 #define HBRIDGE9_CR2_ON_TIME_DUR_340MS 0x0060
218 #define HBRIDGE9_CR2_ON_TIME_DUR_360MS 0x0068
219 #define HBRIDGE9_CR2_ON_TIME_DUR_380MS 0x0070
220 #define HBRIDGE9_CR2_ON_TIME_DUR_400MS 0x0078
221 #define HBRIDGE9_CR2_ON_TIME_DUR_440MS 0x0080
222 #define HBRIDGE9_CR2_ON_TIME_DUR_480MS 0x0088
223 #define HBRIDGE9_CR2_ON_TIME_DUR_520MS 0x0090
224 #define HBRIDGE9_CR2_ON_TIME_DUR_560MS 0x0098
225 #define HBRIDGE9_CR2_ON_TIME_DUR_600MS 0x00A0
226 #define HBRIDGE9_CR2_ON_TIME_DUR_640MS 0x00A8
227 #define HBRIDGE9_CR2_ON_TIME_DUR_680MS 0x00B0
228 #define HBRIDGE9_CR2_ON_TIME_DUR_720MS 0x00B8
229 #define HBRIDGE9_CR2_ON_TIME_DUR_760MS 0x00C0
230 #define HBRIDGE9_CR2_ON_TIME_DUR_800MS 0x00C8
231 #define HBRIDGE9_CR2_ON_TIME_DUR_840MS 0x00D0
232 #define HBRIDGE9_CR2_ON_TIME_DUR_880MS 0x00D8
233 #define HBRIDGE9_CR2_ON_TIME_DUR_920MS 0x00E0
234 #define HBRIDGE9_CR2_ON_TIME_DUR_960MS 0x00E8
235 #define HBRIDGE9_CR2_ON_TIME_DUR_1000MS 0x00F0
236 #define HBRIDGE9_CR2_ON_TIME_DUR_1040MS 0x00F8
237 #define HBRIDGE9_CR2_ON_TIME_DUR_MASK 0x00F8
238 #define HBRIDGE9_CR2_BRAKING_DUR_0MS 0x0000
239 #define HBRIDGE9_CR2_BRAKING_DUR_100MS 0x0002
240 #define HBRIDGE9_CR2_BRAKING_DUR_200MS 0x0004
241 #define HBRIDGE9_CR2_BRAKING_DUR_100MS_IND 0x0006
242 #define HBRIDGE9_CR2_BRAKING_DUR_MASK 0x0006
248 #define HBRIDGE9_CR3_GFI 0x0080
249 #define HBRIDGE9_CR3_TSD_ACT 0x0040
250 #define HBRIDGE9_CR3_DITHN 0x0020
251 #define HBRIDGE9_CR3_NO_GROUP 0x0000
252 #define HBRIDGE9_CR3_GROUP_1_2 0x0002
253 #define HBRIDGE9_CR3_GROUP_1_3 0x0004
254 #define HBRIDGE9_CR3_GROUP_1_2_3 0x0006
255 #define HBRIDGE9_CR3_GROUP_4_5 0x0008
256 #define HBRIDGE9_CR3_GROUP_4_6 0x0010
257 #define HBRIDGE9_CR3_GROUP_4_5_6 0x0018
258 #define HBRIDGE9_CR3_GROUP_MASK 0x001E
264 #define HBRIDGE9_CR4_OCP1_SHIFT_BITS 0x0001
265 #define HBRIDGE9_CR4_OCP2_SHIFT_BITS 0x0006
266 #define HBRIDGE9_CR4_OCP3_SHIFT_BITS 0x000B
267 #define HBRIDGE9_CR5_OCP4_SHIFT_BITS 0x0001
268 #define HBRIDGE9_CR5_OCP5_SHIFT_BITS 0x0006
269 #define HBRIDGE9_CR5_OCP6_SHIFT_BITS 0x000B
270 #define HBRIDGE9_DUTY_CYCLE_6p25 0x0000
271 #define HBRIDGE9_DUTY_CYCLE_12p5 0x0001
272 #define HBRIDGE9_DUTY_CYCLE_18p75 0x0002
273 #define HBRIDGE9_DUTY_CYCLE_25 0x0003
274 #define HBRIDGE9_DUTY_CYCLE_31p25 0x0004
275 #define HBRIDGE9_DUTY_CYCLE_37p5 0x0005
276 #define HBRIDGE9_DUTY_CYCLE_43p75 0x0006
277 #define HBRIDGE9_DUTY_CYCLE_50 0x0007
278 #define HBRIDGE9_DUTY_CYCLE_56p25 0x0008
279 #define HBRIDGE9_DUTY_CYCLE_62p5 0x0009
280 #define HBRIDGE9_DUTY_CYCLE_68p75 0x000A
281 #define HBRIDGE9_DUTY_CYCLE_75 0x000B
282 #define HBRIDGE9_DUTY_CYCLE_81p25 0x000C
283 #define HBRIDGE9_DUTY_CYCLE_87p5 0x000D
284 #define HBRIDGE9_DUTY_CYCLE_93p75 0x000E
285 #define HBRIDGE9_DUTY_CYCLE_100 0x000F
286 #define HBRIDGE9_DUTY_CYCLE_MASK 0x001F
287 #define HBRIDGE9_CURRENT_1A 0x0010
288 #define HBRIDGE9_CURRENT_1p2A 0x0011
289 #define HBRIDGE9_CURRENT_1p4A 0x0012
290 #define HBRIDGE9_CURRENT_1p6A 0x0013
291 #define HBRIDGE9_CURRENT_1p8A 0x0014
292 #define HBRIDGE9_CURRENT_2A 0x0015
293 #define HBRIDGE9_CURRENT_2p2A 0x0016
294 #define HBRIDGE9_CURRENT_2p4A 0x0017
295 #define HBRIDGE9_CURRENT_2p6A 0x0018
296 #define HBRIDGE9_CURRENT_2p8A 0x0019
297 #define HBRIDGE9_CURRENT_3A 0x001A
298 #define HBRIDGE9_CURRENT_3p2A 0x001B
299 #define HBRIDGE9_CURRENT_3p4A 0x001C
300 #define HBRIDGE9_CURRENT_3p6A 0x001D
301 #define HBRIDGE9_CURRENT_3p8A 0x001E
302 #define HBRIDGE9_CURRENT_4A 0x001F
303 #define HBRIDGE9_CURRENT_MASK 0x001F
309 #define HBRIDGE9_CR6_HBDCL2 0x8000
310 #define HBRIDGE9_CR6_HBDCH2 0x4000
311 #define HBRIDGE9_CR6_HBDC2_MASK 0xC000
312 #define HBRIDGE9_CR6_STBY1 0x2000
313 #define HBRIDGE9_CR6_EXT2_VDT_1US 0x0000
314 #define HBRIDGE9_CR6_EXT2_VDT_2US 0x0800
315 #define HBRIDGE9_CR6_EXT2_VDT_3US 0x1000
316 #define HBRIDGE9_CR6_EXT2_VDT_4US 0x1800
317 #define HBRIDGE9_CR6_EXT2_VDT_MASK 0x1800
318 #define HBRIDGE9_CR6_EXT1_VDT_1US 0x0000
319 #define HBRIDGE9_CR6_EXT1_VDT_2US 0x0200
320 #define HBRIDGE9_CR6_EXT1_VDT_3US 0x0400
321 #define HBRIDGE9_CR6_EXT1_VDT_4US 0x0600
322 #define HBRIDGE9_CR6_EXT1_VDT_MASK 0x0600
323 #define HBRIDGE9_CR6_EXT2_VDS_OFF 0x0000
324 #define HBRIDGE9_CR6_EXT2_VDS_0p25V 0x0100
325 #define HBRIDGE9_CR6_EXT2_VDS_0p5V 0x0120
326 #define HBRIDGE9_CR6_EXT2_VDS_0p75V 0x0140
327 #define HBRIDGE9_CR6_EXT2_VDS_1V 0x0160
328 #define HBRIDGE9_CR6_EXT2_VDS_1p25V 0x0180
329 #define HBRIDGE9_CR6_EXT2_VDS_1p5V 0x01A0
330 #define HBRIDGE9_CR6_EXT2_VDS_1p75V 0x01C0
331 #define HBRIDGE9_CR6_EXT2_VDS_2V 0x01E0
332 #define HBRIDGE9_CR6_EXT2_VDS_MASK 0x01E0
333 #define HBRIDGE9_CR6_EXT1_VDS_OFF 0x0000
334 #define HBRIDGE9_CR6_EXT1_VDS_0p25V 0x0010
335 #define HBRIDGE9_CR6_EXT1_VDS_0p5V 0x0012
336 #define HBRIDGE9_CR6_EXT1_VDS_0p75V 0x0014
337 #define HBRIDGE9_CR6_EXT1_VDS_1V 0x0016
338 #define HBRIDGE9_CR6_EXT1_VDS_1p25V 0x0018
339 #define HBRIDGE9_CR6_EXT1_VDS_1p5V 0x001A
340 #define HBRIDGE9_CR6_EXT1_VDS_1p75V 0x001C
341 #define HBRIDGE9_CR6_EXT1_VDS_2V 0x001E
342 #define HBRIDGE9_CR6_EXT1_VDS_MASK 0x001E
348 #define HBRIDGE9_CR7_HBDCL1 0x8000
349 #define HBRIDGE9_CR7_HBDCH1 0x4000
350 #define HBRIDGE9_CR7_HBDC1_MASK 0xC000
351 #define HBRIDGE9_CR7_STBY2 0x2000
352 #define HBRIDGE9_CR7_ODCL6 0x1000
353 #define HBRIDGE9_CR7_ODCH6 0x0800
354 #define HBRIDGE9_CR7_ODC6_MASK 0x1800
355 #define HBRIDGE9_CR7_ODCL5 0x0400
356 #define HBRIDGE9_CR7_ODCH5 0x0200
357 #define HBRIDGE9_CR7_ODC5_MASK 0x0600
358 #define HBRIDGE9_CR7_ODCL4 0x0100
359 #define HBRIDGE9_CR7_ODCH4 0x0080
360 #define HBRIDGE9_CR7_ODC4_MASK 0x0180
361 #define HBRIDGE9_CR7_ODCL3 0x0040
362 #define HBRIDGE9_CR7_ODCH3 0x0020
363 #define HBRIDGE9_CR7_ODC3_MASK 0x0060
364 #define HBRIDGE9_CR7_ODCL2 0x0010
365 #define HBRIDGE9_CR7_ODCH2 0x0008
366 #define HBRIDGE9_CR7_ODC2_MASK 0x0018
367 #define HBRIDGE9_CR7_ODCL1 0x0004
368 #define HBRIDGE9_CR7_ODCH1 0x0002
369 #define HBRIDGE9_CR7_ODC1_MASK 0x0006
375 #define HBRIDGE9_CR8_KI_GAIN_1_OVER_128 0x0000
376 #define HBRIDGE9_CR8_KI_GAIN_1_OVER_64 0x0010
377 #define HBRIDGE9_CR8_KI_GAIN_1_OVER_32 0x0020
378 #define HBRIDGE9_CR8_KI_GAIN_1_OVER_16 0x0030
379 #define HBRIDGE9_CR8_KI_GAIN_1_OVER_8 0x0040
380 #define HBRIDGE9_CR8_KI_GAIN_1_OVER_4 0x0050
381 #define HBRIDGE9_CR8_KI_GAIN_1_OVER_2 0x0060
382 #define HBRIDGE9_CR8_KI_GAIN_1 0x0070
383 #define HBRIDGE9_CR8_KI_GAIN_MASK 0x0070
384 #define HBRIDGE9_CR8_KP_GAIN_2 0x0000
385 #define HBRIDGE9_CR8_KP_GAIN_4 0x0001
386 #define HBRIDGE9_CR8_KP_GAIN_8 0x0002
387 #define HBRIDGE9_CR8_KP_GAIN_16 0x0003
388 #define HBRIDGE9_CR8_KP_GAIN_32 0x0004
389 #define HBRIDGE9_CR8_KP_GAIN_64 0x0005
390 #define HBRIDGE9_CR8_KP_GAIN_128 0x0006
391 #define HBRIDGE9_CR8_KP_GAIN_256 0x0007
392 #define HBRIDGE9_CR8_KP_GAIN_MASK 0x0007
402 #define HBRIDGE9_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
403 #define HBRIDGE9_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
421 #define HBRIDGE9_MAP_MIKROBUS( cfg, mikrobus ) \
422 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
423 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
424 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
425 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
426 cfg.en_out = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
427 cfg.dout = MIKROBUS( mikrobus, MIKROBUS_INT )
err_t hbridge9_read_info_register(hbridge9_t *ctx, uint8_t reg, uint8_t *data_out)
H-Bridge 9 read info register function.
Definition: hbridge9.h:482
err_t hbridge9_modify_register_bits(hbridge9_t *ctx, uint8_t reg, uint16_t clr_mask, uint16_t set_mask)
H-Bridge 9 modify register bits function.
err_t hbridge9_clear_all_status(hbridge9_t *ctx)
H-Bridge 9 clear all status function.
This file contains SPI specific macros, functions, etc.
err_t hbridge9_read_register_and_clear(hbridge9_t *ctx, uint8_t reg, uint16_t *data_out)
H-Bridge 9 read register and clear function.
spi_master_mode_t spi_mode
Definition: hbridge9.h:471
pin_name_t cs
Definition: hbridge9.h:463
err_t hbridge9_init(hbridge9_t *ctx, hbridge9_cfg_t *cfg)
H-Bridge 9 initialization function.
Definition: hbridge9.h:483
spi_master_t spi
Definition: hbridge9.h:445
hbridge9_return_value_t
H-Bridge 9 Click return value data.
Definition: hbridge9.h:480
spi_master_chip_select_polarity_t cs_polarity
Definition: hbridge9.h:472
pin_name_t en_out
Definition: hbridge9.h:466
err_t hbridge9_spi_transfer(hbridge9_t *ctx, uint8_t *data_in, uint8_t tx_len, uint8_t *data_out, uint8_t rx_len)
H-Bridge 9 spi transfer function.
pin_name_t chip_select
Definition: hbridge9.h:447
digital_out_t en_out
Definition: hbridge9.h:439
uint8_t global_status
Definition: hbridge9.h:449
err_t hbridge9_read_register(hbridge9_t *ctx, uint8_t reg, uint16_t *data_out)
H-Bridge 9 read register function.
H-Bridge 9 Click context object.
Definition: hbridge9.h:436
err_t hbridge9_check_communication(hbridge9_t *ctx)
H-Bridge 9 check communication function.
err_t hbridge9_write_register(hbridge9_t *ctx, uint8_t reg, uint16_t data_in)
H-Bridge 9 write register function.
pin_name_t miso
Definition: hbridge9.h:460
void hbridge9_cfg_setup(hbridge9_cfg_t *cfg)
H-Bridge 9 configuration object setup function.
pin_name_t dout
Definition: hbridge9.h:467
pin_name_t mosi
Definition: hbridge9.h:461
H-Bridge 9 Click configuration object.
Definition: hbridge9.h:457
digital_in_t dout
Definition: hbridge9.h:442
pin_name_t sck
Definition: hbridge9.h:462
void hbridge9_set_en_out_pin(hbridge9_t *ctx, uint8_t state)
H-Bridge 9 set en out pin function.
err_t hbridge9_set_default(hbridge9_t *ctx)
H-Bridge 9 set default function.
uint32_t spi_speed
Definition: hbridge9.h:470
err_t hbridge9_default_cfg(hbridge9_t *ctx)
H-Bridge 9 default configuration function.
void hbridge9_send_actuation_pulse(hbridge9_t *ctx)
H-Bridge 9 send actuation pulse function.
uint8_t hbridge9_get_dout_pin(hbridge9_t *ctx)
H-Bridge 9 get dout pin function.