sram4  2.0.0.0
sram4.h
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22 
28 #ifndef SRAM4_H
29 #define SRAM4_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
39 #ifdef PREINIT_SUPPORTED
40 #include "preinit.h"
41 #endif
42 
43 #ifdef MikroCCoreVersion
44  #if MikroCCoreVersion >= 1
45  #include "delays.h"
46  #endif
47 #endif
48 
49 #include "drv_digital_out.h"
50 #include "drv_digital_in.h"
51 #include "drv_spi_master.h"
52 #include "spi_specifics.h"
53 
74 #define SRAM4_REG_RDSR 0x05/*< Read status register*/
75 #define SRAM4_REG_FAST_RDSR 0x09/*< Fast Read status register*/
76 #define SRAM4_REG_WRSR 0x01/*< Write status register*/
77 #define SRAM4_REG_WREN 0x06/*< Set write enable latch*/
78 #define SRAM4_REG_WRDI 0x04/*< Reset write enable latch*/
79 #define SRAM4_REG_READ 0x03/*< Read data from memory array*/
80 #define SRAM4_REG_FAST_READ 0x0B/*< Fast read data*/
81 #define SRAM4_REG_WRITE 0x02/*< Write data to memory array*/
82 #define SRAM4_REG_STORE 0x3C/*< Software STORE*/
83 #define SRAM4_REG_RECALL 0x60/*< Software RECALL*/
84 #define SRAM4_REG_ASENB 0x59/*< AutoStore Enable*/
85 #define SRAM4_REG_ASDISB 0x19/*< AutoStore Disable*/
86 #define SRAM4_REG_SLEEP 0xB9/*< Sleep mode enable*/
87 #define SRAM4_REG_WRSN 0xC2/*< Write serial number*/
88 #define SRAM4_REG_RDSN 0xC3/*< Read serial number*/
89 #define SRAM4_REG_FAST_RDSN 0xC9/*< Fast serial number read*/
90 #define SRAM4_REG_RDID 0x9F/*< Read ID's*/
91 #define SRAM4_REG_FAST_RDID 0x9E/*< Fast read ID's*/
92  // sram4_reg
94 
109 #define SRAM4_DEVICE_ID 0x06818818
110 
119 #define SRAM4_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
120 #define SRAM4_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
121  // sram4_set
123 
138 #define SRAM4_MAP_MIKROBUS( cfg, mikrobus ) \
139  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
140  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
141  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
142  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
143  cfg.hold = MIKROBUS( mikrobus, MIKROBUS_PWM );
144  // sram4_map // sram4
147 
152 typedef struct
153 {
154  // Output pins
155  digital_out_t hold;
157  // Modules
158  spi_master_t spi;
160  pin_name_t chip_select;
161  uint32_t device_id;
163 } sram4_t;
164 
169 typedef struct
170 {
171  // Communication gpio pins
172  pin_name_t miso;
173  pin_name_t mosi;
174  pin_name_t sck;
175  pin_name_t cs;
177  // Additional gpio pins
178  pin_name_t hold;
180  // static variable
181  uint32_t spi_speed;
182  spi_master_mode_t spi_mode;
183  spi_master_chip_select_polarity_t cs_polarity;
185 } sram4_cfg_t;
186 
191 typedef enum
192 {
193  SRAM4_OK = 0,
194  SRAM4_ERROR = -1
195 
197 
214 
229 err_t sram4_init ( sram4_t *ctx, sram4_cfg_t *cfg );
230 
244 err_t sram4_default_cfg ( sram4_t *ctx );
245 
257 err_t sram4_generic_command ( sram4_t *ctx, uint8_t cmd );
258 
273 err_t sram4_generic_write ( sram4_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len );
274 
289 err_t sram4_generic_read ( sram4_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len );
290 
306 err_t sram4_generic_write_then_read ( sram4_t *ctx, uint8_t *data_in, uint8_t in_len, uint8_t *data_out, uint8_t out_len );
307 
321 err_t sram4_memory_write ( sram4_t *ctx, uint16_t memory_adr, uint8_t *write_data, uint8_t write_len );
322 
336 err_t sram4_memory_read ( sram4_t *ctx, uint16_t memory_adr, uint8_t *read_data, uint8_t read_len );
337 
346 void sram4_set_hold ( sram4_t *ctx, uint8_t state );
347 
348 #ifdef __cplusplus
349 }
350 #endif
351 #endif // SRAM4_H
352  // sram4
354 
355 // ------------------------------------------------------------------------ END
sram4_cfg_t::miso
pin_name_t miso
Definition: sram4.h:172
sram4_cfg_t
SRAM 4 Click configuration object.
Definition: sram4.h:170
sram4_t::spi
spi_master_t spi
Definition: sram4.h:158
sram4_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: sram4.h:183
sram4_t::device_id
uint32_t device_id
Definition: sram4.h:161
spi_specifics.h
This file contains SPI specific macros, functions, etc.
sram4_cfg_t::cs
pin_name_t cs
Definition: sram4.h:175
sram4_cfg_setup
void sram4_cfg_setup(sram4_cfg_t *cfg)
SRAM 4 configuration object setup function.
sram4_memory_write
err_t sram4_memory_write(sram4_t *ctx, uint16_t memory_adr, uint8_t *write_data, uint8_t write_len)
Write data to memory.
sram4_cfg_t::sck
pin_name_t sck
Definition: sram4.h:174
sram4_set_hold
void sram4_set_hold(sram4_t *ctx, uint8_t state)
Set HOLD pin state.
sram4_t
SRAM 4 Click context object.
Definition: sram4.h:153
sram4_memory_read
err_t sram4_memory_read(sram4_t *ctx, uint16_t memory_adr, uint8_t *read_data, uint8_t read_len)
Read data from memory.
sram4_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: sram4.h:182
sram4_init
err_t sram4_init(sram4_t *ctx, sram4_cfg_t *cfg)
SRAM 4 initialization function.
sram4_generic_write_then_read
err_t sram4_generic_write_then_read(sram4_t *ctx, uint8_t *data_in, uint8_t in_len, uint8_t *data_out, uint8_t out_len)
SRAM 4 data writing and reading function.
sram4_generic_command
err_t sram4_generic_command(sram4_t *ctx, uint8_t cmd)
SRAM 4 command writing function.
SRAM4_ERROR
@ SRAM4_ERROR
Definition: sram4.h:194
sram4_default_cfg
err_t sram4_default_cfg(sram4_t *ctx)
SRAM 4 default configuration function.
SRAM4_OK
@ SRAM4_OK
Definition: sram4.h:193
sram4_t::chip_select
pin_name_t chip_select
Definition: sram4.h:160
sram4_t::hold
digital_out_t hold
Definition: sram4.h:155
sram4_cfg_t::hold
pin_name_t hold
Definition: sram4.h:178
sram4_generic_read
err_t sram4_generic_read(sram4_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len)
SRAM 4 data reading function.
sram4_cfg_t::spi_speed
uint32_t spi_speed
Definition: sram4.h:181
sram4_return_value_t
sram4_return_value_t
SRAM 4 Click return value data.
Definition: sram4.h:192
sram4_generic_write
err_t sram4_generic_write(sram4_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len)
SRAM 4 data writing function.
sram4_cfg_t::mosi
pin_name_t mosi
Definition: sram4.h:173