daq  2.0.0.0
daq.h
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22 
28 #ifndef DAQ_H
29 #define DAQ_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
35 #include "drv_digital_out.h"
36 #include "drv_digital_in.h"
37 #include "drv_spi_master.h"
38 
59 #define DAQ_REG_CHIP_TYPE 0x03
60 #define DAQ_REG_PRODUCT_ID_L 0x04
61 #define DAQ_REG_PRODUCT_ID_H 0x05
62 #define DAQ_REG_CHIP_GRADE 0x06
63 #define DAQ_REG_SCRATCH_PAD 0x0A
64 #define DAQ_REG_VENDOR_L 0x0C
65 #define DAQ_REG_VENDOR_H 0x0D
66 #define DAQ_REG_INTERFACE_FORMAT 0x14
67 #define DAQ_REG_POWER_CLOCK 0x15
68 #define DAQ_REG_ANALOG 0x16
69 #define DAQ_REG_ANALOG2 0x17
70 #define DAQ_REG_CONVERSION 0x18
71 #define DAQ_REG_DIGITAL_FILTER 0x19
72 #define DAQ_REG_SINC3_DEC_RATE_MSB 0x1A
73 #define DAQ_REG_SINC3_DEC_RATE_LSB 0x1B
74 #define DAQ_REG_DUTY_CYCLE_RATION 0x1C
75 #define DAQ_REG_SYNC_RESET 0x1D
76 #define DAQ_REG_GPIO_CONTROL 0x1E
77 #define DAQ_REG_GPIO_WRITE 0x1F
78 #define DAQ_REG_GPIO_READ 0x20
79 #define DAQ_REG_OFFSET_HI 0x21
80 #define DAQ_REG_OFFSET_MID 0x22
81 #define DAQ_REG_OFFSET_LO 0x23
82 #define DAQ_REG_GAIN_HI 0x24
83 #define DAQ_REG_GAIN_MID 0x25
84 #define DAQ_REG_GAIN_LO 0x26
85 #define DAQ_REG_BIST_CONTROL 0x27
86 #define DAQ_REG_SPI_DIAG_ENABLE 0x28
87 #define DAQ_REG_ADC_DIAG_ENABLE 0x29
88 #define DAQ_REG_DIG_DIAG_ENABLE 0x2A
89 #define DAQ_REG_ADC_DATA 0x2C
90 #define DAQ_REG_MASTER_STATUS 0x2D
91 #define DAQ_REG_SPI_DIAG_STATUS 0x2E
92 #define DAQ_REG_ADC_DIAG_STATUS 0x2F
93 #define DAQ_REG_DIG_DIAG_STATUS 0x30
94 #define DAQ_REG_MCLK_COUNTER 0x31
95 #define DAQ_REG_COEFF_CONTROL 0x32
96 #define DAQ_REG_COEFF_DATA 0x33
97 #define DAQ_REG_ACCESS_KEY 0x34
98 
99  // daq_reg
101 
116 #define DAQ_INTERFACE_CRC_EN_MSK (0x1 << 6)
117 #define DAQ_INTERFACE_CRC_EN(x) (((x) & 0x1) << 6)
118 #define DAQ_INTERFACE_CRC_TYPE_MSK (0x1 << 5)
119 #define DAQ_INTERFACE_CRC_TYPE(x) (((x) & 0x1) << 5)
120 #define DAQ_INTERFACE_STATUS_EN_MSK (0x1 << 4)
121 #define DAQ_INTERFACE_STATUS_EN(x) (((x) & 0x1) << 4)
122 #define DAQ_INTERFACE_CONVLEN_MSK (0x1 << 3)
123 #define DAQ_INTERFACE_CONVLEN(x) (((x) & 0x1) << 3)
124 #define DAQ_INTERFACE_RDY_EN_MSK (0x1 << 2)
125 #define DAQ_INTERFACE_RDY_EN(x) (((x) & 0x1) << 3)
126 #define DAQ_INTERFACE_CONT_READ_MSK (0x1 << 0)
127 #define DAQ_INTERFACE_CONT_READ_EN(x) (((x) & 0x1) << 0)
128 #define DAQ_REG_COEFF_CONTROL 0x32
129 #define DAQ_REG_COEFF_DATA 0x33
130 #define DAQ_REG_ACCESS_KEY 0x34
131 
136 #define DAQ_POWER_CLK_PWRMODE_MSK 0x3
137 #define DAQ_POWER_CLK_PWRMODE(x) (((x) & 0x3) << 0)
138 #define DAQ_POWER_CLK_MOD_OUT_MSK (0x1 << 2)
139 #define DAQ_POWER_CLK_MOD_OUT(x) (((x) & 0x1) << 2)
140 #define DAQ_POWER_CLK_POWER_DOWN 0x08
141 #define DAQ_POWER_CLK_MCLK_DIV_MSK (0x3 << 4)
142 #define DAQ_POWER_CLK_MCLK_DIV(x) (((x) & 0x3) << 4)
143 #define DAQ_POWER_CLK_CLOCK_SEL_MSK (0x3 << 6)
144 #define DAQ_POWER_CLK_CLOCK_SEL(x) (((x) & 0x3) << 6)
145 
150 #define DAQ_CONVERSION_DIAG_MUX_MSK (0xF << 4)
151 #define DAQ_CONVERSION_DIAG_MUX_SEL(x) (((x) & 0xF) << 4)
152 #define DAQ_CONVERSION_DIAG_SEL_MSK (0x1 << 3)
153 #define DAQ_CONVERSION_DIAG_SEL(x) (((x) & 0x1) << 3)
154 #define DAQ_CONVERSION_MODE_MSK (0x7 << 0)
155 #define DAQ_CONVERSION_MODE(x) (((x) & 0x7) << 0)
156 
161 #define DAQ_ANALOG_REF_BUF_POS_MSK (0x3 << 6)
162 #define DAQ_ANALOG_REF_BUF_POS(x) (((x) & 0x3) << 6)
163 #define DAQ_ANALOG_REF_BUF_NEG_MSK (0x3 << 4)
164 #define DAQ_ANALOG_REF_BUF_NEG(x) (((x) & 0x3) << 4)
165 #define DAQ_ANALOG_AIN_BUF_POS_OFF_MSK (0x1 << 1)
166 #define DAQ_ANALOG_AIN_BUF_POS_OFF(x) (((x) & 0x1) << 1)
167 #define DAQ_ANALOG_AIN_BUF_NEG_OFF_MSK (0x1 << 0)
168 #define DAQ_ANALOG_AIN_BUF_NEG_OFF(x) (((x) & 0x1) << 0)
169 #define DAQ_ANALOG2_VCM_MSK (0x7 << 0)
170 #define DAQ_ANALOG2_VCM(x) (((x) & 0x7) << 0)
171 
176 #define DAQ_DIGI_FILTER_60HZ_REJ_EN_MSK (0x1 << 7)
177 #define DAQ_DIGI_FILTER_60HZ_REJ_EN(x) (((x) & 0x1) << 7)
178 #define DAQ_DIGI_FILTER_FILTER_MSK (0x7 << 4)
179 #define DAQ_DIGI_FILTER_FILTER(x) (((x) & 0x7) << 4)
180 #define DAQ_DIGI_FILTER_DEC_RATE_MSK (0x7 << 0)
181 #define DAQ_DIGI_FILTER_DEC_RATE(x) (((x) & 0x7) << 0)
182 
187 #define DAQ_SINC3_DEC_RATE_MSB_MSK (0x0F << 0)
188 #define DAQ_SINC3_DEC_RATE_MSB(x) (((x) & 0x0F) << 0)
189 #define DAQ_SINC3_DEC_RATE_LSB_MSK (0xFF << 0)
190 #define DAQ_SINC3_DEC_RATE_LSB(x) (((x) & 0xFF) << 0)
191 
196 #define DAQ_DC_RATIO_IDLE_TIME_MSK (0xFF << 0)
197 #define DAQ_DC_RATIO_IDLE_TIME(x) (((x) & 0xFF) << 0)
198 
203 #define DAQ_SYNC_RST_SPI_STARTB_MSK (0x1 << 7)
204 #define DAQ_SYNC_RST_SPI_STARTB(x) (((x) & 0x1) << 7)
205 #define DAQ_SYNC_RST_SYNCOUT_EDGE_MSK (0x1 << 6)
206 #define DAQ_SYNC_RST_SYNCOUT_EDGE(x) (((x) & 0x1) << 6)
207 #define DAQ_SYNC_RST_GPIO_START_EN_MSK (0x1 << 3)
208 #define DAQ_SYNC_RST_GPIO_START_EN(x) (((x) & 0x1) << 3)
209 #define DAQ_SYNC_RST_SPI_RESET_MSK (0x3 << 0)
210 #define DAQ_SYNC_RST_SPI_RESET(x) (((x) & 0x3) << 0)
211 
216 #define DAQ_GPIO_CNTRL_UGPIO_EN_MSK (0x1 << 7)
217 #define DAQ_GPIO_CNTRL_UGPIO_EN(x) (((x) & 0x1) << 7)
218 #define DAQ_GPIO_CNTRL_GPIO2_OD_EN_MSK (0x1 << 6)
219 #define DAQ_GPIO_CNTRL_GPIO2_OD_EN(x) (((x) & 0x1) << 6)
220 #define DAQ_GPIO_CNTRL_GPIO1_OD_EN_MSK (0x1 << 5)
221 #define DAQ_GPIO_CNTRL_GPIO1_OD_EN(x) (((x) & 0x1) << 5)
222 #define DAQ_GPIO_CNTRL_GPIO0_OD_EN_MSK (0x1 << 4)
223 #define DAQ_GPIO_CNTRL_GPIO0_OD_EN(x) (((x) & 0x1) << 4)
224 #define DAQ_GPIO_CNTRL_ALL_GPIOS_OD_EN_MSK (0x7 << 4)
225 #define DAQ_GPIO_CNTRL_ALL_GPIOS_OD_EN(x) (((x) & 0x7) << 4)
226 #define DAQ_GPIO_CNTRL_GPIO3_OP_EN_MSK (0x1 << 3)
227 #define DAQ_GPIO_CNTRL_GPIO3_OP_EN(x) (((x) & 0x1) << 3)
228 #define DAQ_GPIO_CNTRL_GPIO2_OP_EN_MSK (0x1 << 2)
229 #define DAQ_GPIO_CNTRL_GPIO2_OP_EN(x) (((x) & 0x1) << 2)
230 #define DAQ_GPIO_CNTRL_GPIO1_OP_EN_MSK (0x1 << 1)
231 #define DAQ_GPIO_CNTRL_GPIO1_OP_EN(x) (((x) & 0x1) << 1)
232 #define DAQ_GPIO_CNTRL_GPIO0_OP_EN_MSK (0x1 << 0)
233 #define DAQ_GPIO_CNTRL_GPIO0_OP_EN(x) (((x) & 0x1) << 0)
234 #define DAQ_GPIO_CNTRL_ALL_GPIOS_OP_EN_MSK (0xF << 0)
235 #define DAQ_GPIO_CNTRL_ALL_GPIOS_OP_EN(x) (((x) & 0xF) << 0)
236 #define DAQ_GPIO_WRITE_3_MSK (0x1 << 3)
237 #define DAQ_GPIO_WRITE_3(x) (((x) & 0x1) << 3)
238 #define DAQ_GPIO_WRITE_2_MSK (0x1 << 2)
239 #define DAQ_GPIO_WRITE_2(x) (((x) & 0x1) << 2)
240 #define DAQ_GPIO_WRITE_1_MSK (0x1 << 1)
241 #define DAQ_GPIO_WRITE_1(x) (((x) & 0x1) << 1)
242 #define DAQ_GPIO_WRITE_0_MSK (0x1 << 0)
243 #define DAQ_GPIO_WRITE_0(x) (((x) & 0x1) << 0)
244 #define DAQ_GPIO_WRITE_ALL_MSK (0xF << 0)
245 #define DAQ_GPIO_WRITE_ALL(x) (((x) & 0xF))
246 #define DAQ_GPIO_READ_3_MSK (0x1 << 3)
247 #define DAQ_GPIO_READ_2_MSK (0x1 << 2)
248 #define DAQ_GPIO_READ_1_MSK (0x1 << 1)
249 #define DAQ_GPIO_READ_0_MSK (0x1 << 0)
250 #define DAQ_GPIO_READ_ALL_MSK (0xF << 0)
251 
256 #define DAQ_OFFSET_HI_MSK (0xFF << 0)
257 #define DAQ_OFFSET_HI(x) (((x) & 0xFF) << 0)
258 #define DAQ_OFFSET_MID_MSK (0xFF << 0)
259 #define DAQ_OFFSET_MID(x) (((x) & 0xFF) << 0)
260 #define DAQ_OFFSET_LO_MSK (0xFF << 0)
261 #define DAQ_OFFSET_LO(x) (((x) & 0xFF) << 0)
262 
267 #define DAQ_GAIN_HI_MSK (0xFF << 0)
268 #define DAQ_GAIN_HI(x) (((x) & 0xFF) << 0)
269 #define DAQ_GAIN_MID_MSK (0xFF << 0)
270 #define DAQ_GAIN_MID(x) (((x) & 0xFF) << 0)
271 #define DAQ_GAIN_LOW_MSK (0xFF << 0)
272 #define DAQ_GAIN_LOW(x) (((x) & 0xFF) << 0)
273 
278 #define DAQ_SPI_DIAG_ERR_SPI_IGNORE_MSK (0x1 << 4)
279 #define DAQ_SPI_DIAG_ERR_SPI_IGNORE(x) (((x) & 0x1) << 4)
280 #define DAQ_SPI_DIAG_ERR_SPI_CLK_CNT_MSK (0x1 << 3)
281 #define DAQ_SPI_DIAG_ERR_SPI_CLK_CNT(x) (((x) & 0x1) << 3)
282 #define DAQ_SPI_DIAG_ERR_SPI_RD_MSK (0x1 << 2)
283 #define DAQ_SPI_DIAG_ERR_SPI_RD(x) (((x) & 0x1) << 2)
284 #define DAQ_SPI_DIAG_ERR_SPI_WR_MSK (0x1 << 1)
285 #define DAQ_SPI_DIAG_ERR_SPI_WR(x) (((x) & 0x1) << 1)
286 
291 #define DAQ_ADC_DIAG_ERR_DLDO_PSM_MSK (0x1 << 5)
292 #define DAQ_ADC_DIAG_ERR_DLDO_PSM(x) (((x) & 0x1) << 5)
293 #define DAQ_ADC_DIAG_ERR_ALDO_PSM_MSK (0x1 << 4)
294 #define DAQ_ADC_DIAG_ERR_ALDO_PSM(x) (((x) & 0x1) << 4)
295 #define DAQ_ADC_DIAG_ERR_FILT_SAT_MSK (0x1 << 2)
296 #define DAQ_ADC_DIAG_ERR_FILT_SAT(x) (((x) & 0x1) << 2)
297 #define DAQ_ADC_DIAG_ERR_FILT_NOT_SET_MSK (0x1 << 1)
298 #define DAQ_ADC_DIAG_ERR_FILT_NOT_SET(x) (((x) & 0x1) << 1)
299 #define DAQ_ADC_DIAG_ERR_EXT_CLK_QUAL_MSK (0x1 << 0)
300 #define DAQ_ADC_DIAG_ERR_EXT_CLK_QUAL(x) (((x) & 0x1) << 0)
301 
306 #define DAQ_DIG_DIAG_ERR_MEMMAP_CRC_MSK (0x1 << 4)
307 #define DAQ_DIG_DIAG_ERR_MEMMAP_CRC(x) (((x) & 0x1) << 4)
308 #define DAQ_DIG_DIAG_ERR_RAM_CRC_MSK (0x1 << 3)
309 #define DAQ_DIG_DIAG_ERR_RAM_CRC(x) (((x) & 0x1) << 3)
310 #define DAQ_DIG_DIAG_ERR_FUSE_CRC_MSK (0x1 << 2)
311 #define DAQ_DIG_DIAG_ERR_FUSE_CRC(x) (((x) & 0x1) << 2)
312 #define DAQ_DIG_DIAG_FREQ_COUNT_EN_MSK (0x1 << 0)
313 #define DAQ_DIG_DIAG_FREQ_COUNT_EN(x) (((x) & 0x1) << 0)
314 
319 #define DAQ_MASTER_ERROR_MSK (0x1 << 7)
320 #define DAQ_MASTER_ADC_ERROR_MSK (0x1 << 6)
321 #define DAQ_MASTER_DIG_ERROR_MSK (0x1 << 5)
322 #define DAQ_MASTER_DIG_ERR_EXT_CLK_MSK (0x1 << 4)
323 #define DAQ_MASTER_FILT_SAT_MSK (0x1 << 3)
324 #define DAQ_MASTER_FILT_NOT_SET_MSK (0x1 << 2)
325 #define DAQ_MASTER_SPI_ERROR_MSK (0x1 << 1)
326 #define DAQ_MASTER_POR_FLAG_MSK (0x1 << 0)
327 
328 /* DAQ_REG_SPI_DIAG_STATUS */
333 #define DAQ_SPI_IGNORE_ERROR_MSK (0x1 << 4)
334 #define DAQ_SPI_IGNORE_ERROR_CLR(x) (((x) & 0x1) << 4)
335 #define DAQ_SPI_CLK_CNT_ERROR_MSK (0x1 << 3)
336 #define DAQ_SPI_READ_ERROR_MSK (0x1 << 2)
337 #define DAQ_SPI_READ_ERROR_CLR(x) (((x) & 0x1) << 2)
338 #define DAQ_SPI_WRITE_ERROR_MSK (0x1 << 1)
339 #define DAQ_SPI_WRITE_ERROR_CLR(x) (((x) & 0x1) << 1)
340 #define DAQ_SPI_CRC_ERROR_MSK (0x1 << 0)
341 #define DAQ_SPI_CRC_ERROR_CLR(x) (((x) & 0x1) << 0)
342 
347 #define DAQ_ADC_DLDO_PSM_ERROR_MSK (0x1 << 5)
348 #define DAQ_ADC_ALDO_PSM_ERROR_MSK (0x1 << 4)
349 #define DAQ_ADC_REF_DET_ERROR_MSK (0x1 << 3)
350 #define DAQ_ADC_FILT_SAT_MSK (0x1 << 2)
351 #define DAQ_ADC_FILT_NOT_SET_MSK (0x1 << 1)
352 #define DAQ_ADC_DIG_ERR_EXT_CLK_MSK (0x1 << 0)
353 
358 #define DAQ_DIG_MEMMAP_CRC_ERROR_MSK (0x1 << 4)
359 #define DAQ_DIG_RAM_CRC_ERROR_MSK (0x1 << 3)
360 #define DAQ_DIG_FUS_CRC_ERROR_MSK (0x1 << 2)
361 
366 #define DAQ_MCLK_COUNTER_MSK (0xFF << 0)
367 #define DAQ_MCLK_COUNTER(x) (((x) & 0xFF) << 0)
368 
373 #define DAQ_COEF_CONTROL_COEFFACCESSEN_MSK (0x1 << 7)
374 #define DAQ_COEF_CONTROL_COEFFACCESSEN(x) (((x) & 0x1) << 7)
375 #define DAQ_COEF_CONTROL_COEFFWRITEEN_MSK (0x1 << 6)
376 #define DAQ_COEF_CONTROL_COEFFWRITEEN(x) (((x) & 0x1) << 6)
377 #define DAQ_COEF_CONTROL_COEFFADDR_MSK (0x3F << 5)
378 #define DAQ_COEF_CONTROL_COEFFADDR(x) (((x) & 0x3F) << 5)
379 
384 #define DAQ_COEFF_DATA_USERCOEFFEN_MSK (0x1 << 23)
385 #define DAQ_COEFF_DATA_USERCOEFFEN(x) (((x) & 0x1) << 23)
386 #define DAQ_COEFF_DATA_COEFFDATA_MSK (0x7FFFFF << 22)
387 #define DAQ_COEFF_DATA_COEFFDATA(x) (((x) & 0x7FFFFF) << 22)
388 
393 #define DAQ_ACCESS_KEY_MSK (0xFF << 0)
394 #define DAQ_ACCESS_KEY(x) (((x) & 0xFF) << 0)
395 #define DAQ_ACCESS_KEY_CHECK_MSK (0x1 << 0)
396 
401 #define DAQ_RESOLUTION 8388608
402 
408 {
409  DAQ_ECO = 0,
411  DAQ_FAST = 3,
412 };
413 
419 {
423  DAQ_MCLK_DIV_2 = 3
424 };
425 
431 {
436  DAQ_CONV_STANDBY = 4
437 };
438 
444 {
446  DAQ_CONV_16BIT = 1
447 };
448 
454 {
457 };
458 
464 {
468  DAQ_NEGATIVE_FS = 0xA
469 };
470 
476 {
479  DAQ_NO_CRC
480 };
481 
488 {
493  DAQ_FIR = 4
494 };
495 
502 {
509 };
510 
516 {
518  DAQ_WAKE = 0
519 };
520 
526 {
528  DAQ_AIN_DISABLED = 1
529 };
530 
536 {
540 };
541 
548 {
556  DAQ_VCM_OFF = 7
557 };
558 
564 {
567 };
568 
575 {
580  DAQ_ALL_GPIOS = 4
581 };
582 
588 {
590  DAQ_GPIO_HIGH = 1
591 };
592 
598 {
601 };
602 
609 {
612 };
613 
618 typedef enum
619 {
620  DAQ_GAIN_12p603 = 6,/*< Range: +-12.603*/
621  DAQ_GAIN_6p302 = 5,/*< Range: +-6.302*/
622  DAQ_GAIN_3p151 = 4,/*< Range: +-3.151*/
623  DAQ_GAIN_1p575 = 3,/*< Range: +-1.575*/
624  DAQ_GAIN_p788 = 2,/*< Range: +-0.788*/
625  DAQ_GAIN_p394 = 1,/*< Range: +-0.394*/
626  DAQ_GAIN_p197 = 0 /*< Range: +-0.197*/
628  // daq_set
630 
645 #define DAQ_MAP_MIKROBUS( cfg, mikrobus ) \
646  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
647  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
648  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
649  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
650  cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
651  cfg.io3 = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
652  cfg.rdy = MIKROBUS( mikrobus, MIKROBUS_INT )
653  // daq_map // daq
656 
661 typedef struct
662 {
663  // Output pins
664  digital_out_t rst;
666  // Input pins
667  digital_in_t rdy;
668  // I/O
669  digital_out_t io3;
671  // Modules
672  spi_master_t spi;
674  pin_name_t chip_select;
676  float gain;
678 } daq_t;
679 
684 typedef struct
685 {
686  // Communication gpio pins
687  pin_name_t miso;
688  pin_name_t mosi;
689  pin_name_t sck;
690  pin_name_t cs;
692  // Additional gpio pins
693  pin_name_t rst;
694  pin_name_t io3;
695  pin_name_t rdy;
697  // static variable
698  uint32_t spi_speed;
699  spi_master_mode_t spi_mode;
700  spi_master_chip_select_polarity_t cs_polarity;
701  //IO3 direction
702  uint8_t io3direction;
704 } daq_cfg_t;
705 
710 typedef enum
711 {
712  DAQ_OK = 0,
713  DAQ_ERROR = -1
714 
716 
732 void daq_cfg_setup ( daq_cfg_t *cfg );
733 
748 err_t daq_init ( daq_t *ctx, daq_cfg_t *cfg );
749 
763 err_t daq_default_cfg ( daq_t *ctx );
764 
779 err_t daq_generic_write ( daq_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len );
780 
793 err_t daq_byte_write ( daq_t *ctx, uint8_t reg, uint8_t data_in );
794 
808 err_t daq_mask_write ( daq_t *ctx, uint8_t reg, uint8_t mask, uint8_t data_in );
809 
824 err_t daq_generic_read ( daq_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len );
825 
838 err_t daq_byte_read ( daq_t *ctx, uint8_t reg, uint8_t *data_out );
839 
853 err_t daq_mask_read ( daq_t *ctx, uint8_t reg, uint8_t mask, uint8_t *data_out );
854 
867 err_t daq_raw_read ( daq_t *ctx, uint8_t *data_out, uint8_t len );
868 
876 void daq_reset ( daq_t *ctx );
877 
885 uint8_t daq_data_ready( daq_t *ctx );
886 
895 void daq_set_io3 ( daq_t *ctx, uint8_t state );
896 
904 uint8_t daq_get_iot3 ( daq_t *ctx );
905 
918 err_t daq_set_gain ( daq_t *ctx, daq_gain gain );
919 
931 err_t daq_read_data ( daq_t *ctx, int32_t *adc_data );
932 
942 void daq_calculate_voltage ( daq_t *ctx, int32_t adc_data, float *voltage );
943 
944 #ifdef __cplusplus
945 }
946 #endif
947 #endif // DAQ_H
948  // daq
950 
951 // ------------------------------------------------------------------------ END
DAQ_SINC5_FIR_DECx256
@ DAQ_SINC5_FIR_DECx256
Definition: daq.h:506
DAQ_SINC5_FIR_DECx128
@ DAQ_SINC5_FIR_DECx128
Definition: daq.h:505
DAQ_GPIO3
@ DAQ_GPIO3
Definition: daq.h:579
DAQ_GLOBAL_GPIO_DISABLE
@ DAQ_GLOBAL_GPIO_DISABLE
Definition: daq.h:566
DAQ_AIN_ENABLED
@ DAQ_AIN_ENABLED
Definition: daq.h:527
DAQ_VCM_2_05V
@ DAQ_VCM_2_05V
Definition: daq.h:551
DAQ_SINC5_FIR_DECx512
@ DAQ_SINC5_FIR_DECx512
Definition: daq.h:507
DAQ_GPIO_STRONG_DRIVER
@ DAQ_GPIO_STRONG_DRIVER
Definition: daq.h:599
DAQ_GAIN_1p575
@ DAQ_GAIN_1p575
Definition: daq.h:623
DAQ_CRC
@ DAQ_CRC
Definition: daq.h:477
daq_cfg_t::rdy
pin_name_t rdy
Definition: daq.h:695
DAQ_OK
@ DAQ_OK
Definition: daq.h:712
daq_gain
daq_gain
DAQ GAIN configuration values.
Definition: daq.h:619
daq_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: daq.h:699
daq_cfg_t
DAQ Click configuration object.
Definition: daq.h:685
daq_byte_write
err_t daq_byte_write(daq_t *ctx, uint8_t reg, uint8_t data_in)
DAQ byte writing function.
daq_ain_precharge
daq_ain_precharge
DAQ AIN precharge values.
Definition: daq.h:526
DAQ_GPIO1
@ DAQ_GPIO1
Definition: daq.h:577
daq_t::io3
digital_out_t io3
Definition: daq.h:669
DAQ_SINC5_DECx16
@ DAQ_SINC5_DECx16
Definition: daq.h:491
DAQ_GAIN_12p603
@ DAQ_GAIN_12p603
Definition: daq.h:620
daq_sinc5_fir_decimate
daq_sinc5_fir_decimate
DAQ Decimation ratios for SINC5 and FIR values.
Definition: daq.h:502
daq_cfg_t::mosi
pin_name_t mosi
Definition: daq.h:688
daq_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: daq.h:700
DAQ_TEMP_SENSOR
@ DAQ_TEMP_SENSOR
Definition: daq.h:465
DAQ_VCM_0_9V
@ DAQ_VCM_0_9V
Definition: daq.h:555
DAQ_CONV_PERIODIC
@ DAQ_CONV_PERIODIC
Definition: daq.h:435
daq_byte_read
err_t daq_byte_read(daq_t *ctx, uint8_t reg, uint8_t *data_out)
DAQ byte reading function.
DAQ_MCLK_DIV_4
@ DAQ_MCLK_DIV_4
Definition: daq.h:422
DAQ_CONV_CONTINUOUS
@ DAQ_CONV_CONTINUOUS
Definition: daq.h:432
daq_gpios
daq_gpios
DAQ global gpio numbering values.
Definition: daq.h:575
DAQ_BUF_FULL_BUFFER_ON
@ DAQ_BUF_FULL_BUFFER_ON
Definition: daq.h:539
DAQ_WAKE
@ DAQ_WAKE
Definition: daq.h:518
daq_gpio_output_type
daq_gpio_output_type
DAQ gpio output type values.
Definition: daq.h:598
daq_read_data
err_t daq_read_data(daq_t *ctx, int32_t *adc_data)
Reading adc data.
DAQ_SINC5_FIR_DECx32
@ DAQ_SINC5_FIR_DECx32
Definition: daq.h:503
daq_get_iot3
uint8_t daq_get_iot3(daq_t *ctx)
Get io3 pin.
daq_reset
void daq_reset(daq_t *ctx)
Reset function.
daq_t::spi
spi_master_t spi
Definition: daq.h:672
daq_cfg_t::miso
pin_name_t miso
Definition: daq.h:687
daq_conv_diag_mux
daq_conv_diag_mux
DAQ conversion mux values.
Definition: daq.h:464
DAQ_NEGATIVE_FS
@ DAQ_NEGATIVE_FS
Definition: daq.h:468
DAQ_RDY_DOUT_DIS
@ DAQ_RDY_DOUT_DIS
Definition: daq.h:456
DAQ_MCLK_DIV_2
@ DAQ_MCLK_DIV_2
Definition: daq.h:423
daq_default_cfg
err_t daq_default_cfg(daq_t *ctx)
DAQ default configuration function.
daq_crc_sel
daq_crc_sel
DAQ crc selection values.
Definition: daq.h:476
daq_filter_type
daq_filter_type
DAQ filter type selection values.
Definition: daq.h:488
DAQ_VCM_1_65V
@ DAQ_VCM_1_65V
Definition: daq.h:553
daq_t::gain
float gain
Definition: daq.h:676
DAQ_CONTINUOUS_READ_ENABLE
@ DAQ_CONTINUOUS_READ_ENABLE
Definition: daq.h:610
daq_cfg_t::cs
pin_name_t cs
Definition: daq.h:690
DAQ_GAIN_6p302
@ DAQ_GAIN_6p302
Definition: daq.h:621
DAQ_ALL_GPIOS
@ DAQ_ALL_GPIOS
Definition: daq.h:580
DAQ_GPIO0
@ DAQ_GPIO0
Definition: daq.h:576
DAQ_CONV_ONE_SHOT
@ DAQ_CONV_ONE_SHOT
Definition: daq.h:433
DAQ_SINC3
@ DAQ_SINC3
Definition: daq.h:492
daq_t
DAQ Click context object.
Definition: daq.h:662
DAQ_BUF_ENABLED
@ DAQ_BUF_ENABLED
Definition: daq.h:537
daq_data_ready
uint8_t daq_data_ready(daq_t *ctx)
Get data ready pin.
DAQ_MCLK_DIV_16
@ DAQ_MCLK_DIV_16
Definition: daq.h:420
daq_raw_read
err_t daq_raw_read(daq_t *ctx, uint8_t *data_out, uint8_t len)
DAQ reading function.
DAQ_FAST
@ DAQ_FAST
Definition: daq.h:411
daq_cfg_t::sck
pin_name_t sck
Definition: daq.h:689
daq_calculate_voltage
void daq_calculate_voltage(daq_t *ctx, int32_t adc_data, float *voltage)
Convert data from raw ADC to voltage.
daq_generic_read
err_t daq_generic_read(daq_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len)
DAQ data reading function.
daq_continuous_read
daq_continuous_read
DAQ continuous adc read enable values.
Definition: daq.h:609
DAQ_SINC5
@ DAQ_SINC5
Definition: daq.h:489
daq_vcm_out
daq_vcm_out
DAQ VCM output voltage values.
Definition: daq.h:548
DAQ_VCM_2_5V
@ DAQ_VCM_2_5V
Definition: daq.h:550
daq_rdy_dout
daq_rdy_dout
DAQ data ready enable values.
Definition: daq.h:454
DAQ_NO_CRC
@ DAQ_NO_CRC
Definition: daq.h:479
DAQ_BUF_DISABLED
@ DAQ_BUF_DISABLED
Definition: daq.h:538
daq_cfg_t::spi_speed
uint32_t spi_speed
Definition: daq.h:698
DAQ_FIR
@ DAQ_FIR
Definition: daq.h:493
DAQ_SINC5_FIR_DECx64
@ DAQ_SINC5_FIR_DECx64
Definition: daq.h:504
daq_mclk_div
daq_mclk_div
DAQ mclk divider values.
Definition: daq.h:419
daq_mask_read
err_t daq_mask_read(daq_t *ctx, uint8_t reg, uint8_t mask, uint8_t *data_out)
DAQ byte reading function with mask.
daq_t::rst
digital_out_t rst
Definition: daq.h:664
daq_cfg_t::rst
pin_name_t rst
Definition: daq.h:693
daq_gpio_write
daq_gpio_write
DAQ gpio state values.
Definition: daq.h:588
DAQ_AIN_SHORT
@ DAQ_AIN_SHORT
Definition: daq.h:466
daq_sleep_wake
daq_sleep_wake
DAQ power values.
Definition: daq.h:516
daq_init
err_t daq_init(daq_t *ctx, daq_cfg_t *cfg)
DAQ initialization function.
daq_set_gain
err_t daq_set_gain(daq_t *ctx, daq_gain gain)
Set gain range.
DAQ_GAIN_3p151
@ DAQ_GAIN_3p151
Definition: daq.h:622
daq_t::rdy
digital_in_t rdy
Definition: daq.h:667
DAQ_ECO
@ DAQ_ECO
Definition: daq.h:409
DAQ_RDY_DOUT_EN
@ DAQ_RDY_DOUT_EN
Definition: daq.h:455
DAQ_XOR
@ DAQ_XOR
Definition: daq.h:478
DAQ_CONV_16BIT
@ DAQ_CONV_16BIT
Definition: daq.h:446
DAQ_GAIN_p197
@ DAQ_GAIN_p197
Definition: daq.h:626
daq_generic_write
err_t daq_generic_write(daq_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len)
DAQ data writing function.
DAQ_CONV_24BIT
@ DAQ_CONV_24BIT
Definition: daq.h:445
DAQ_VCM_1_1V
@ DAQ_VCM_1_1V
Definition: daq.h:554
DAQ_CONTINUOUS_READ_DISABLE
@ DAQ_CONTINUOUS_READ_DISABLE
Definition: daq.h:611
DAQ_GAIN_p788
@ DAQ_GAIN_p788
Definition: daq.h:624
daq_return_value_t
daq_return_value_t
DAQ Click return value data.
Definition: daq.h:711
DAQ_GPIO_OPEN_DRAIN
@ DAQ_GPIO_OPEN_DRAIN
Definition: daq.h:600
DAQ_GAIN_p394
@ DAQ_GAIN_p394
Definition: daq.h:625
daq_set_io3
void daq_set_io3(daq_t *ctx, uint8_t state)
Set io3 pin.
DAQ_ERROR
@ DAQ_ERROR
Definition: daq.h:713
daq_ref_buffer
daq_ref_buffer
DAQ REF buffer values.
Definition: daq.h:536
daq_mask_write
err_t daq_mask_write(daq_t *ctx, uint8_t reg, uint8_t mask, uint8_t data_in)
DAQ byte writing function with mask.
DAQ_CONV_SINGLE
@ DAQ_CONV_SINGLE
Definition: daq.h:434
daq_cfg_t::io3direction
uint8_t io3direction
Definition: daq.h:702
daq_t::chip_select
pin_name_t chip_select
Definition: daq.h:674
DAQ_GPIO_HIGH
@ DAQ_GPIO_HIGH
Definition: daq.h:590
DAQ_GLOBAL_GPIO_ENABLE
@ DAQ_GLOBAL_GPIO_ENABLE
Definition: daq.h:565
DAQ_VCM_OFF
@ DAQ_VCM_OFF
Definition: daq.h:556
daq_conv_len
daq_conv_len
DAQ conversion length values.
Definition: daq.h:444
DAQ_CONV_STANDBY
@ DAQ_CONV_STANDBY
Definition: daq.h:436
DAQ_MEDIAN
@ DAQ_MEDIAN
Definition: daq.h:410
DAQ_SINC5_DECx8
@ DAQ_SINC5_DECx8
Definition: daq.h:490
DAQ_GPIO2
@ DAQ_GPIO2
Definition: daq.h:578
daq_cfg_t::io3
pin_name_t io3
Definition: daq.h:694
DAQ_VCM_1_9V
@ DAQ_VCM_1_9V
Definition: daq.h:552
DAQ_POSITIVE_FS
@ DAQ_POSITIVE_FS
Definition: daq.h:467
DAQ_SLEEP
@ DAQ_SLEEP
Definition: daq.h:517
DAQ_MCLK_DIV_8
@ DAQ_MCLK_DIV_8
Definition: daq.h:421
DAQ_VCM_HALF_VCC
@ DAQ_VCM_HALF_VCC
Definition: daq.h:549
DAQ_SINC5_FIR_DECx1024
@ DAQ_SINC5_FIR_DECx1024
Definition: daq.h:508
daq_cfg_setup
void daq_cfg_setup(daq_cfg_t *cfg)
DAQ configuration object setup function.
daq_conv_mode
daq_conv_mode
DAQ conversion mode values.
Definition: daq.h:431
daq_gobal_gpio_enable
daq_gobal_gpio_enable
DAQ global gpio values.
Definition: daq.h:564
DAQ_AIN_DISABLED
@ DAQ_AIN_DISABLED
Definition: daq.h:528
DAQ_GPIO_LOW
@ DAQ_GPIO_LOW
Definition: daq.h:589
daq_power_mode
daq_power_mode
DAQ power clock values.
Definition: daq.h:408