daq  2.0.0.0
daq.h
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22 
28 #ifndef DAQ_H
29 #define DAQ_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
35 #include "mikrosdk_version.h"
36 
37 #ifdef __GNUC__
38 #if mikroSDK_GET_VERSION < 20800ul
39 #include "rcu_delays.h"
40 #else
41 #include "delays.h"
42 #endif
43 #endif
44 
45 #include "drv_digital_out.h"
46 #include "drv_digital_in.h"
47 #include "drv_spi_master.h"
48 
69 #define DAQ_REG_CHIP_TYPE 0x03
70 #define DAQ_REG_PRODUCT_ID_L 0x04
71 #define DAQ_REG_PRODUCT_ID_H 0x05
72 #define DAQ_REG_CHIP_GRADE 0x06
73 #define DAQ_REG_SCRATCH_PAD 0x0A
74 #define DAQ_REG_VENDOR_L 0x0C
75 #define DAQ_REG_VENDOR_H 0x0D
76 #define DAQ_REG_INTERFACE_FORMAT 0x14
77 #define DAQ_REG_POWER_CLOCK 0x15
78 #define DAQ_REG_ANALOG 0x16
79 #define DAQ_REG_ANALOG2 0x17
80 #define DAQ_REG_CONVERSION 0x18
81 #define DAQ_REG_DIGITAL_FILTER 0x19
82 #define DAQ_REG_SINC3_DEC_RATE_MSB 0x1A
83 #define DAQ_REG_SINC3_DEC_RATE_LSB 0x1B
84 #define DAQ_REG_DUTY_CYCLE_RATION 0x1C
85 #define DAQ_REG_SYNC_RESET 0x1D
86 #define DAQ_REG_GPIO_CONTROL 0x1E
87 #define DAQ_REG_GPIO_WRITE 0x1F
88 #define DAQ_REG_GPIO_READ 0x20
89 #define DAQ_REG_OFFSET_HI 0x21
90 #define DAQ_REG_OFFSET_MID 0x22
91 #define DAQ_REG_OFFSET_LO 0x23
92 #define DAQ_REG_GAIN_HI 0x24
93 #define DAQ_REG_GAIN_MID 0x25
94 #define DAQ_REG_GAIN_LO 0x26
95 #define DAQ_REG_BIST_CONTROL 0x27
96 #define DAQ_REG_SPI_DIAG_ENABLE 0x28
97 #define DAQ_REG_ADC_DIAG_ENABLE 0x29
98 #define DAQ_REG_DIG_DIAG_ENABLE 0x2A
99 #define DAQ_REG_ADC_DATA 0x2C
100 #define DAQ_REG_MASTER_STATUS 0x2D
101 #define DAQ_REG_SPI_DIAG_STATUS 0x2E
102 #define DAQ_REG_ADC_DIAG_STATUS 0x2F
103 #define DAQ_REG_DIG_DIAG_STATUS 0x30
104 #define DAQ_REG_MCLK_COUNTER 0x31
105 #define DAQ_REG_COEFF_CONTROL 0x32
106 #define DAQ_REG_COEFF_DATA 0x33
107 #define DAQ_REG_ACCESS_KEY 0x34
108 
109  // daq_reg
111 
126 #define DAQ_INTERFACE_CRC_EN_MSK (0x1 << 6)
127 #define DAQ_INTERFACE_CRC_EN(x) (((x) & 0x1) << 6)
128 #define DAQ_INTERFACE_CRC_TYPE_MSK (0x1 << 5)
129 #define DAQ_INTERFACE_CRC_TYPE(x) (((x) & 0x1) << 5)
130 #define DAQ_INTERFACE_STATUS_EN_MSK (0x1 << 4)
131 #define DAQ_INTERFACE_STATUS_EN(x) (((x) & 0x1) << 4)
132 #define DAQ_INTERFACE_CONVLEN_MSK (0x1 << 3)
133 #define DAQ_INTERFACE_CONVLEN(x) (((x) & 0x1) << 3)
134 #define DAQ_INTERFACE_RDY_EN_MSK (0x1 << 2)
135 #define DAQ_INTERFACE_RDY_EN(x) (((x) & 0x1) << 3)
136 #define DAQ_INTERFACE_CONT_READ_MSK (0x1 << 0)
137 #define DAQ_INTERFACE_CONT_READ_EN(x) (((x) & 0x1) << 0)
138 #define DAQ_REG_COEFF_CONTROL 0x32
139 #define DAQ_REG_COEFF_DATA 0x33
140 #define DAQ_REG_ACCESS_KEY 0x34
141 
146 #define DAQ_POWER_CLK_PWRMODE_MSK 0x3
147 #define DAQ_POWER_CLK_PWRMODE(x) (((x) & 0x3) << 0)
148 #define DAQ_POWER_CLK_MOD_OUT_MSK (0x1 << 2)
149 #define DAQ_POWER_CLK_MOD_OUT(x) (((x) & 0x1) << 2)
150 #define DAQ_POWER_CLK_POWER_DOWN 0x08
151 #define DAQ_POWER_CLK_MCLK_DIV_MSK (0x3 << 4)
152 #define DAQ_POWER_CLK_MCLK_DIV(x) (((x) & 0x3) << 4)
153 #define DAQ_POWER_CLK_CLOCK_SEL_MSK (0x3 << 6)
154 #define DAQ_POWER_CLK_CLOCK_SEL(x) (((x) & 0x3) << 6)
155 
160 #define DAQ_CONVERSION_DIAG_MUX_MSK (0xF << 4)
161 #define DAQ_CONVERSION_DIAG_MUX_SEL(x) (((x) & 0xF) << 4)
162 #define DAQ_CONVERSION_DIAG_SEL_MSK (0x1 << 3)
163 #define DAQ_CONVERSION_DIAG_SEL(x) (((x) & 0x1) << 3)
164 #define DAQ_CONVERSION_MODE_MSK (0x7 << 0)
165 #define DAQ_CONVERSION_MODE(x) (((x) & 0x7) << 0)
166 
171 #define DAQ_ANALOG_REF_BUF_POS_MSK (0x3 << 6)
172 #define DAQ_ANALOG_REF_BUF_POS(x) (((x) & 0x3) << 6)
173 #define DAQ_ANALOG_REF_BUF_NEG_MSK (0x3 << 4)
174 #define DAQ_ANALOG_REF_BUF_NEG(x) (((x) & 0x3) << 4)
175 #define DAQ_ANALOG_AIN_BUF_POS_OFF_MSK (0x1 << 1)
176 #define DAQ_ANALOG_AIN_BUF_POS_OFF(x) (((x) & 0x1) << 1)
177 #define DAQ_ANALOG_AIN_BUF_NEG_OFF_MSK (0x1 << 0)
178 #define DAQ_ANALOG_AIN_BUF_NEG_OFF(x) (((x) & 0x1) << 0)
179 #define DAQ_ANALOG2_VCM_MSK (0x7 << 0)
180 #define DAQ_ANALOG2_VCM(x) (((x) & 0x7) << 0)
181 
186 #define DAQ_DIGI_FILTER_60HZ_REJ_EN_MSK (0x1 << 7)
187 #define DAQ_DIGI_FILTER_60HZ_REJ_EN(x) (((x) & 0x1) << 7)
188 #define DAQ_DIGI_FILTER_FILTER_MSK (0x7 << 4)
189 #define DAQ_DIGI_FILTER_FILTER(x) (((x) & 0x7) << 4)
190 #define DAQ_DIGI_FILTER_DEC_RATE_MSK (0x7 << 0)
191 #define DAQ_DIGI_FILTER_DEC_RATE(x) (((x) & 0x7) << 0)
192 
197 #define DAQ_SINC3_DEC_RATE_MSB_MSK (0x0F << 0)
198 #define DAQ_SINC3_DEC_RATE_MSB(x) (((x) & 0x0F) << 0)
199 #define DAQ_SINC3_DEC_RATE_LSB_MSK (0xFF << 0)
200 #define DAQ_SINC3_DEC_RATE_LSB(x) (((x) & 0xFF) << 0)
201 
206 #define DAQ_DC_RATIO_IDLE_TIME_MSK (0xFF << 0)
207 #define DAQ_DC_RATIO_IDLE_TIME(x) (((x) & 0xFF) << 0)
208 
213 #define DAQ_SYNC_RST_SPI_STARTB_MSK (0x1 << 7)
214 #define DAQ_SYNC_RST_SPI_STARTB(x) (((x) & 0x1) << 7)
215 #define DAQ_SYNC_RST_SYNCOUT_EDGE_MSK (0x1 << 6)
216 #define DAQ_SYNC_RST_SYNCOUT_EDGE(x) (((x) & 0x1) << 6)
217 #define DAQ_SYNC_RST_GPIO_START_EN_MSK (0x1 << 3)
218 #define DAQ_SYNC_RST_GPIO_START_EN(x) (((x) & 0x1) << 3)
219 #define DAQ_SYNC_RST_SPI_RESET_MSK (0x3 << 0)
220 #define DAQ_SYNC_RST_SPI_RESET(x) (((x) & 0x3) << 0)
221 
226 #define DAQ_GPIO_CNTRL_UGPIO_EN_MSK (0x1 << 7)
227 #define DAQ_GPIO_CNTRL_UGPIO_EN(x) (((x) & 0x1) << 7)
228 #define DAQ_GPIO_CNTRL_GPIO2_OD_EN_MSK (0x1 << 6)
229 #define DAQ_GPIO_CNTRL_GPIO2_OD_EN(x) (((x) & 0x1) << 6)
230 #define DAQ_GPIO_CNTRL_GPIO1_OD_EN_MSK (0x1 << 5)
231 #define DAQ_GPIO_CNTRL_GPIO1_OD_EN(x) (((x) & 0x1) << 5)
232 #define DAQ_GPIO_CNTRL_GPIO0_OD_EN_MSK (0x1 << 4)
233 #define DAQ_GPIO_CNTRL_GPIO0_OD_EN(x) (((x) & 0x1) << 4)
234 #define DAQ_GPIO_CNTRL_ALL_GPIOS_OD_EN_MSK (0x7 << 4)
235 #define DAQ_GPIO_CNTRL_ALL_GPIOS_OD_EN(x) (((x) & 0x7) << 4)
236 #define DAQ_GPIO_CNTRL_GPIO3_OP_EN_MSK (0x1 << 3)
237 #define DAQ_GPIO_CNTRL_GPIO3_OP_EN(x) (((x) & 0x1) << 3)
238 #define DAQ_GPIO_CNTRL_GPIO2_OP_EN_MSK (0x1 << 2)
239 #define DAQ_GPIO_CNTRL_GPIO2_OP_EN(x) (((x) & 0x1) << 2)
240 #define DAQ_GPIO_CNTRL_GPIO1_OP_EN_MSK (0x1 << 1)
241 #define DAQ_GPIO_CNTRL_GPIO1_OP_EN(x) (((x) & 0x1) << 1)
242 #define DAQ_GPIO_CNTRL_GPIO0_OP_EN_MSK (0x1 << 0)
243 #define DAQ_GPIO_CNTRL_GPIO0_OP_EN(x) (((x) & 0x1) << 0)
244 #define DAQ_GPIO_CNTRL_ALL_GPIOS_OP_EN_MSK (0xF << 0)
245 #define DAQ_GPIO_CNTRL_ALL_GPIOS_OP_EN(x) (((x) & 0xF) << 0)
246 #define DAQ_GPIO_WRITE_3_MSK (0x1 << 3)
247 #define DAQ_GPIO_WRITE_3(x) (((x) & 0x1) << 3)
248 #define DAQ_GPIO_WRITE_2_MSK (0x1 << 2)
249 #define DAQ_GPIO_WRITE_2(x) (((x) & 0x1) << 2)
250 #define DAQ_GPIO_WRITE_1_MSK (0x1 << 1)
251 #define DAQ_GPIO_WRITE_1(x) (((x) & 0x1) << 1)
252 #define DAQ_GPIO_WRITE_0_MSK (0x1 << 0)
253 #define DAQ_GPIO_WRITE_0(x) (((x) & 0x1) << 0)
254 #define DAQ_GPIO_WRITE_ALL_MSK (0xF << 0)
255 #define DAQ_GPIO_WRITE_ALL(x) (((x) & 0xF))
256 #define DAQ_GPIO_READ_3_MSK (0x1 << 3)
257 #define DAQ_GPIO_READ_2_MSK (0x1 << 2)
258 #define DAQ_GPIO_READ_1_MSK (0x1 << 1)
259 #define DAQ_GPIO_READ_0_MSK (0x1 << 0)
260 #define DAQ_GPIO_READ_ALL_MSK (0xF << 0)
261 
266 #define DAQ_OFFSET_HI_MSK (0xFF << 0)
267 #define DAQ_OFFSET_HI(x) (((x) & 0xFF) << 0)
268 #define DAQ_OFFSET_MID_MSK (0xFF << 0)
269 #define DAQ_OFFSET_MID(x) (((x) & 0xFF) << 0)
270 #define DAQ_OFFSET_LO_MSK (0xFF << 0)
271 #define DAQ_OFFSET_LO(x) (((x) & 0xFF) << 0)
272 
277 #define DAQ_GAIN_HI_MSK (0xFF << 0)
278 #define DAQ_GAIN_HI(x) (((x) & 0xFF) << 0)
279 #define DAQ_GAIN_MID_MSK (0xFF << 0)
280 #define DAQ_GAIN_MID(x) (((x) & 0xFF) << 0)
281 #define DAQ_GAIN_LOW_MSK (0xFF << 0)
282 #define DAQ_GAIN_LOW(x) (((x) & 0xFF) << 0)
283 
288 #define DAQ_SPI_DIAG_ERR_SPI_IGNORE_MSK (0x1 << 4)
289 #define DAQ_SPI_DIAG_ERR_SPI_IGNORE(x) (((x) & 0x1) << 4)
290 #define DAQ_SPI_DIAG_ERR_SPI_CLK_CNT_MSK (0x1 << 3)
291 #define DAQ_SPI_DIAG_ERR_SPI_CLK_CNT(x) (((x) & 0x1) << 3)
292 #define DAQ_SPI_DIAG_ERR_SPI_RD_MSK (0x1 << 2)
293 #define DAQ_SPI_DIAG_ERR_SPI_RD(x) (((x) & 0x1) << 2)
294 #define DAQ_SPI_DIAG_ERR_SPI_WR_MSK (0x1 << 1)
295 #define DAQ_SPI_DIAG_ERR_SPI_WR(x) (((x) & 0x1) << 1)
296 
301 #define DAQ_ADC_DIAG_ERR_DLDO_PSM_MSK (0x1 << 5)
302 #define DAQ_ADC_DIAG_ERR_DLDO_PSM(x) (((x) & 0x1) << 5)
303 #define DAQ_ADC_DIAG_ERR_ALDO_PSM_MSK (0x1 << 4)
304 #define DAQ_ADC_DIAG_ERR_ALDO_PSM(x) (((x) & 0x1) << 4)
305 #define DAQ_ADC_DIAG_ERR_FILT_SAT_MSK (0x1 << 2)
306 #define DAQ_ADC_DIAG_ERR_FILT_SAT(x) (((x) & 0x1) << 2)
307 #define DAQ_ADC_DIAG_ERR_FILT_NOT_SET_MSK (0x1 << 1)
308 #define DAQ_ADC_DIAG_ERR_FILT_NOT_SET(x) (((x) & 0x1) << 1)
309 #define DAQ_ADC_DIAG_ERR_EXT_CLK_QUAL_MSK (0x1 << 0)
310 #define DAQ_ADC_DIAG_ERR_EXT_CLK_QUAL(x) (((x) & 0x1) << 0)
311 
316 #define DAQ_DIG_DIAG_ERR_MEMMAP_CRC_MSK (0x1 << 4)
317 #define DAQ_DIG_DIAG_ERR_MEMMAP_CRC(x) (((x) & 0x1) << 4)
318 #define DAQ_DIG_DIAG_ERR_RAM_CRC_MSK (0x1 << 3)
319 #define DAQ_DIG_DIAG_ERR_RAM_CRC(x) (((x) & 0x1) << 3)
320 #define DAQ_DIG_DIAG_ERR_FUSE_CRC_MSK (0x1 << 2)
321 #define DAQ_DIG_DIAG_ERR_FUSE_CRC(x) (((x) & 0x1) << 2)
322 #define DAQ_DIG_DIAG_FREQ_COUNT_EN_MSK (0x1 << 0)
323 #define DAQ_DIG_DIAG_FREQ_COUNT_EN(x) (((x) & 0x1) << 0)
324 
329 #define DAQ_MASTER_ERROR_MSK (0x1 << 7)
330 #define DAQ_MASTER_ADC_ERROR_MSK (0x1 << 6)
331 #define DAQ_MASTER_DIG_ERROR_MSK (0x1 << 5)
332 #define DAQ_MASTER_DIG_ERR_EXT_CLK_MSK (0x1 << 4)
333 #define DAQ_MASTER_FILT_SAT_MSK (0x1 << 3)
334 #define DAQ_MASTER_FILT_NOT_SET_MSK (0x1 << 2)
335 #define DAQ_MASTER_SPI_ERROR_MSK (0x1 << 1)
336 #define DAQ_MASTER_POR_FLAG_MSK (0x1 << 0)
337 
338 /* DAQ_REG_SPI_DIAG_STATUS */
343 #define DAQ_SPI_IGNORE_ERROR_MSK (0x1 << 4)
344 #define DAQ_SPI_IGNORE_ERROR_CLR(x) (((x) & 0x1) << 4)
345 #define DAQ_SPI_CLK_CNT_ERROR_MSK (0x1 << 3)
346 #define DAQ_SPI_READ_ERROR_MSK (0x1 << 2)
347 #define DAQ_SPI_READ_ERROR_CLR(x) (((x) & 0x1) << 2)
348 #define DAQ_SPI_WRITE_ERROR_MSK (0x1 << 1)
349 #define DAQ_SPI_WRITE_ERROR_CLR(x) (((x) & 0x1) << 1)
350 #define DAQ_SPI_CRC_ERROR_MSK (0x1 << 0)
351 #define DAQ_SPI_CRC_ERROR_CLR(x) (((x) & 0x1) << 0)
352 
357 #define DAQ_ADC_DLDO_PSM_ERROR_MSK (0x1 << 5)
358 #define DAQ_ADC_ALDO_PSM_ERROR_MSK (0x1 << 4)
359 #define DAQ_ADC_REF_DET_ERROR_MSK (0x1 << 3)
360 #define DAQ_ADC_FILT_SAT_MSK (0x1 << 2)
361 #define DAQ_ADC_FILT_NOT_SET_MSK (0x1 << 1)
362 #define DAQ_ADC_DIG_ERR_EXT_CLK_MSK (0x1 << 0)
363 
368 #define DAQ_DIG_MEMMAP_CRC_ERROR_MSK (0x1 << 4)
369 #define DAQ_DIG_RAM_CRC_ERROR_MSK (0x1 << 3)
370 #define DAQ_DIG_FUS_CRC_ERROR_MSK (0x1 << 2)
371 
376 #define DAQ_MCLK_COUNTER_MSK (0xFF << 0)
377 #define DAQ_MCLK_COUNTER(x) (((x) & 0xFF) << 0)
378 
383 #define DAQ_COEF_CONTROL_COEFFACCESSEN_MSK (0x1 << 7)
384 #define DAQ_COEF_CONTROL_COEFFACCESSEN(x) (((x) & 0x1) << 7)
385 #define DAQ_COEF_CONTROL_COEFFWRITEEN_MSK (0x1 << 6)
386 #define DAQ_COEF_CONTROL_COEFFWRITEEN(x) (((x) & 0x1) << 6)
387 #define DAQ_COEF_CONTROL_COEFFADDR_MSK (0x3F << 5)
388 #define DAQ_COEF_CONTROL_COEFFADDR(x) (((x) & 0x3F) << 5)
389 
394 #define DAQ_COEFF_DATA_USERCOEFFEN_MSK (0x1 << 23)
395 #define DAQ_COEFF_DATA_USERCOEFFEN(x) (((x) & 0x1) << 23)
396 #define DAQ_COEFF_DATA_COEFFDATA_MSK (0x7FFFFF << 22)
397 #define DAQ_COEFF_DATA_COEFFDATA(x) (((x) & 0x7FFFFF) << 22)
398 
403 #define DAQ_ACCESS_KEY_MSK (0xFF << 0)
404 #define DAQ_ACCESS_KEY(x) (((x) & 0xFF) << 0)
405 #define DAQ_ACCESS_KEY_CHECK_MSK (0x1 << 0)
406 
411 #define DAQ_RESOLUTION 8388608
412 
418 {
419  DAQ_ECO = 0,
421  DAQ_FAST = 3,
422 };
423 
429 {
433  DAQ_MCLK_DIV_2 = 3
434 };
435 
441 {
446  DAQ_CONV_STANDBY = 4
447 };
448 
454 {
456  DAQ_CONV_16BIT = 1
457 };
458 
464 {
467 };
468 
474 {
478  DAQ_NEGATIVE_FS = 0xA
479 };
480 
486 {
489  DAQ_NO_CRC
490 };
491 
498 {
503  DAQ_FIR = 4
504 };
505 
512 {
519 };
520 
526 {
528  DAQ_WAKE = 0
529 };
530 
536 {
538  DAQ_AIN_DISABLED = 1
539 };
540 
546 {
550 };
551 
558 {
566  DAQ_VCM_OFF = 7
567 };
568 
574 {
577 };
578 
585 {
590  DAQ_ALL_GPIOS = 4
591 };
592 
598 {
600  DAQ_GPIO_HIGH = 1
601 };
602 
608 {
611 };
612 
619 {
622 };
623 
628 typedef enum
629 {
630  DAQ_GAIN_12p603 = 6,/*< Range: +-12.603*/
631  DAQ_GAIN_6p302 = 5,/*< Range: +-6.302*/
632  DAQ_GAIN_3p151 = 4,/*< Range: +-3.151*/
633  DAQ_GAIN_1p575 = 3,/*< Range: +-1.575*/
634  DAQ_GAIN_p788 = 2,/*< Range: +-0.788*/
635  DAQ_GAIN_p394 = 1,/*< Range: +-0.394*/
636  DAQ_GAIN_p197 = 0 /*< Range: +-0.197*/
638  // daq_set
640 
655 #define DAQ_MAP_MIKROBUS( cfg, mikrobus ) \
656  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
657  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
658  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
659  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
660  cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
661  cfg.io3 = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
662  cfg.rdy = MIKROBUS( mikrobus, MIKROBUS_INT )
663  // daq_map // daq
666 
671 typedef struct
672 {
673  // Output pins
674  digital_out_t rst;
676  // Input pins
677  digital_in_t rdy;
678  // I/O
679  digital_out_t io3;
681  // Modules
682  spi_master_t spi;
684  pin_name_t chip_select;
686  float gain;
688 } daq_t;
689 
694 typedef struct
695 {
696  // Communication gpio pins
697  pin_name_t miso;
698  pin_name_t mosi;
699  pin_name_t sck;
700  pin_name_t cs;
702  // Additional gpio pins
703  pin_name_t rst;
704  pin_name_t io3;
705  pin_name_t rdy;
707  // static variable
708  uint32_t spi_speed;
709  spi_master_mode_t spi_mode;
710  spi_master_chip_select_polarity_t cs_polarity;
711  //IO3 direction
712  uint8_t io3direction;
714 } daq_cfg_t;
715 
720 typedef enum
721 {
722  DAQ_OK = 0,
723  DAQ_ERROR = -1
724 
726 
742 void daq_cfg_setup ( daq_cfg_t *cfg );
743 
758 err_t daq_init ( daq_t *ctx, daq_cfg_t *cfg );
759 
773 err_t daq_default_cfg ( daq_t *ctx );
774 
789 err_t daq_generic_write ( daq_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len );
790 
803 err_t daq_byte_write ( daq_t *ctx, uint8_t reg, uint8_t data_in );
804 
818 err_t daq_mask_write ( daq_t *ctx, uint8_t reg, uint8_t mask, uint8_t data_in );
819 
834 err_t daq_generic_read ( daq_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len );
835 
848 err_t daq_byte_read ( daq_t *ctx, uint8_t reg, uint8_t *data_out );
849 
863 err_t daq_mask_read ( daq_t *ctx, uint8_t reg, uint8_t mask, uint8_t *data_out );
864 
877 err_t daq_raw_read ( daq_t *ctx, uint8_t *data_out, uint8_t len );
878 
886 void daq_reset ( daq_t *ctx );
887 
895 uint8_t daq_data_ready( daq_t *ctx );
896 
905 void daq_set_io3 ( daq_t *ctx, uint8_t state );
906 
914 uint8_t daq_get_iot3 ( daq_t *ctx );
915 
928 err_t daq_set_gain ( daq_t *ctx, daq_gain gain );
929 
941 err_t daq_read_data ( daq_t *ctx, int32_t *adc_data );
942 
952 void daq_calculate_voltage ( daq_t *ctx, int32_t adc_data, float *voltage );
953 
954 #ifdef __cplusplus
955 }
956 #endif
957 #endif // DAQ_H
958  // daq
960 
961 // ------------------------------------------------------------------------ END
DAQ_SINC5_FIR_DECx256
@ DAQ_SINC5_FIR_DECx256
Definition: daq.h:516
DAQ_SINC5_FIR_DECx128
@ DAQ_SINC5_FIR_DECx128
Definition: daq.h:515
DAQ_GPIO3
@ DAQ_GPIO3
Definition: daq.h:589
DAQ_GLOBAL_GPIO_DISABLE
@ DAQ_GLOBAL_GPIO_DISABLE
Definition: daq.h:576
DAQ_AIN_ENABLED
@ DAQ_AIN_ENABLED
Definition: daq.h:537
DAQ_VCM_2_05V
@ DAQ_VCM_2_05V
Definition: daq.h:561
DAQ_SINC5_FIR_DECx512
@ DAQ_SINC5_FIR_DECx512
Definition: daq.h:517
DAQ_GPIO_STRONG_DRIVER
@ DAQ_GPIO_STRONG_DRIVER
Definition: daq.h:609
DAQ_GAIN_1p575
@ DAQ_GAIN_1p575
Definition: daq.h:633
DAQ_CRC
@ DAQ_CRC
Definition: daq.h:487
daq_cfg_t::rdy
pin_name_t rdy
Definition: daq.h:705
DAQ_OK
@ DAQ_OK
Definition: daq.h:722
daq_gain
daq_gain
DAQ GAIN configuration values.
Definition: daq.h:629
daq_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: daq.h:709
daq_cfg_t
DAQ Click configuration object.
Definition: daq.h:695
daq_byte_write
err_t daq_byte_write(daq_t *ctx, uint8_t reg, uint8_t data_in)
DAQ byte writing function.
daq_ain_precharge
daq_ain_precharge
DAQ AIN precharge values.
Definition: daq.h:536
DAQ_GPIO1
@ DAQ_GPIO1
Definition: daq.h:587
daq_t::io3
digital_out_t io3
Definition: daq.h:679
DAQ_SINC5_DECx16
@ DAQ_SINC5_DECx16
Definition: daq.h:501
DAQ_GAIN_12p603
@ DAQ_GAIN_12p603
Definition: daq.h:630
daq_sinc5_fir_decimate
daq_sinc5_fir_decimate
DAQ Decimation ratios for SINC5 and FIR values.
Definition: daq.h:512
daq_cfg_t::mosi
pin_name_t mosi
Definition: daq.h:698
daq_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: daq.h:710
DAQ_TEMP_SENSOR
@ DAQ_TEMP_SENSOR
Definition: daq.h:475
DAQ_VCM_0_9V
@ DAQ_VCM_0_9V
Definition: daq.h:565
DAQ_CONV_PERIODIC
@ DAQ_CONV_PERIODIC
Definition: daq.h:445
daq_byte_read
err_t daq_byte_read(daq_t *ctx, uint8_t reg, uint8_t *data_out)
DAQ byte reading function.
DAQ_MCLK_DIV_4
@ DAQ_MCLK_DIV_4
Definition: daq.h:432
DAQ_CONV_CONTINUOUS
@ DAQ_CONV_CONTINUOUS
Definition: daq.h:442
daq_gpios
daq_gpios
DAQ global gpio numbering values.
Definition: daq.h:585
DAQ_BUF_FULL_BUFFER_ON
@ DAQ_BUF_FULL_BUFFER_ON
Definition: daq.h:549
DAQ_WAKE
@ DAQ_WAKE
Definition: daq.h:528
daq_gpio_output_type
daq_gpio_output_type
DAQ gpio output type values.
Definition: daq.h:608
daq_read_data
err_t daq_read_data(daq_t *ctx, int32_t *adc_data)
Reading adc data.
DAQ_SINC5_FIR_DECx32
@ DAQ_SINC5_FIR_DECx32
Definition: daq.h:513
daq_get_iot3
uint8_t daq_get_iot3(daq_t *ctx)
Get io3 pin.
daq_reset
void daq_reset(daq_t *ctx)
Reset function.
daq_t::spi
spi_master_t spi
Definition: daq.h:682
daq_cfg_t::miso
pin_name_t miso
Definition: daq.h:697
daq_conv_diag_mux
daq_conv_diag_mux
DAQ conversion mux values.
Definition: daq.h:474
DAQ_NEGATIVE_FS
@ DAQ_NEGATIVE_FS
Definition: daq.h:478
DAQ_RDY_DOUT_DIS
@ DAQ_RDY_DOUT_DIS
Definition: daq.h:466
DAQ_MCLK_DIV_2
@ DAQ_MCLK_DIV_2
Definition: daq.h:433
daq_default_cfg
err_t daq_default_cfg(daq_t *ctx)
DAQ default configuration function.
daq_crc_sel
daq_crc_sel
DAQ crc selection values.
Definition: daq.h:486
daq_filter_type
daq_filter_type
DAQ filter type selection values.
Definition: daq.h:498
DAQ_VCM_1_65V
@ DAQ_VCM_1_65V
Definition: daq.h:563
daq_t::gain
float gain
Definition: daq.h:686
DAQ_CONTINUOUS_READ_ENABLE
@ DAQ_CONTINUOUS_READ_ENABLE
Definition: daq.h:620
daq_cfg_t::cs
pin_name_t cs
Definition: daq.h:700
DAQ_GAIN_6p302
@ DAQ_GAIN_6p302
Definition: daq.h:631
DAQ_ALL_GPIOS
@ DAQ_ALL_GPIOS
Definition: daq.h:590
DAQ_GPIO0
@ DAQ_GPIO0
Definition: daq.h:586
DAQ_CONV_ONE_SHOT
@ DAQ_CONV_ONE_SHOT
Definition: daq.h:443
DAQ_SINC3
@ DAQ_SINC3
Definition: daq.h:502
daq_t
DAQ Click context object.
Definition: daq.h:672
DAQ_BUF_ENABLED
@ DAQ_BUF_ENABLED
Definition: daq.h:547
daq_data_ready
uint8_t daq_data_ready(daq_t *ctx)
Get data ready pin.
DAQ_MCLK_DIV_16
@ DAQ_MCLK_DIV_16
Definition: daq.h:430
daq_raw_read
err_t daq_raw_read(daq_t *ctx, uint8_t *data_out, uint8_t len)
DAQ reading function.
DAQ_FAST
@ DAQ_FAST
Definition: daq.h:421
daq_cfg_t::sck
pin_name_t sck
Definition: daq.h:699
daq_calculate_voltage
void daq_calculate_voltage(daq_t *ctx, int32_t adc_data, float *voltage)
Convert data from raw ADC to voltage.
daq_generic_read
err_t daq_generic_read(daq_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len)
DAQ data reading function.
daq_continuous_read
daq_continuous_read
DAQ continuous adc read enable values.
Definition: daq.h:619
DAQ_SINC5
@ DAQ_SINC5
Definition: daq.h:499
daq_vcm_out
daq_vcm_out
DAQ VCM output voltage values.
Definition: daq.h:558
DAQ_VCM_2_5V
@ DAQ_VCM_2_5V
Definition: daq.h:560
daq_rdy_dout
daq_rdy_dout
DAQ data ready enable values.
Definition: daq.h:464
DAQ_NO_CRC
@ DAQ_NO_CRC
Definition: daq.h:489
DAQ_BUF_DISABLED
@ DAQ_BUF_DISABLED
Definition: daq.h:548
daq_cfg_t::spi_speed
uint32_t spi_speed
Definition: daq.h:708
DAQ_FIR
@ DAQ_FIR
Definition: daq.h:503
DAQ_SINC5_FIR_DECx64
@ DAQ_SINC5_FIR_DECx64
Definition: daq.h:514
daq_mclk_div
daq_mclk_div
DAQ mclk divider values.
Definition: daq.h:429
daq_mask_read
err_t daq_mask_read(daq_t *ctx, uint8_t reg, uint8_t mask, uint8_t *data_out)
DAQ byte reading function with mask.
daq_t::rst
digital_out_t rst
Definition: daq.h:674
daq_cfg_t::rst
pin_name_t rst
Definition: daq.h:703
daq_gpio_write
daq_gpio_write
DAQ gpio state values.
Definition: daq.h:598
DAQ_AIN_SHORT
@ DAQ_AIN_SHORT
Definition: daq.h:476
daq_sleep_wake
daq_sleep_wake
DAQ power values.
Definition: daq.h:526
daq_init
err_t daq_init(daq_t *ctx, daq_cfg_t *cfg)
DAQ initialization function.
daq_set_gain
err_t daq_set_gain(daq_t *ctx, daq_gain gain)
Set gain range.
DAQ_GAIN_3p151
@ DAQ_GAIN_3p151
Definition: daq.h:632
daq_t::rdy
digital_in_t rdy
Definition: daq.h:677
DAQ_ECO
@ DAQ_ECO
Definition: daq.h:419
DAQ_RDY_DOUT_EN
@ DAQ_RDY_DOUT_EN
Definition: daq.h:465
DAQ_XOR
@ DAQ_XOR
Definition: daq.h:488
DAQ_CONV_16BIT
@ DAQ_CONV_16BIT
Definition: daq.h:456
DAQ_GAIN_p197
@ DAQ_GAIN_p197
Definition: daq.h:636
daq_generic_write
err_t daq_generic_write(daq_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len)
DAQ data writing function.
DAQ_CONV_24BIT
@ DAQ_CONV_24BIT
Definition: daq.h:455
DAQ_VCM_1_1V
@ DAQ_VCM_1_1V
Definition: daq.h:564
DAQ_CONTINUOUS_READ_DISABLE
@ DAQ_CONTINUOUS_READ_DISABLE
Definition: daq.h:621
DAQ_GAIN_p788
@ DAQ_GAIN_p788
Definition: daq.h:634
daq_return_value_t
daq_return_value_t
DAQ Click return value data.
Definition: daq.h:721
DAQ_GPIO_OPEN_DRAIN
@ DAQ_GPIO_OPEN_DRAIN
Definition: daq.h:610
DAQ_GAIN_p394
@ DAQ_GAIN_p394
Definition: daq.h:635
daq_set_io3
void daq_set_io3(daq_t *ctx, uint8_t state)
Set io3 pin.
DAQ_ERROR
@ DAQ_ERROR
Definition: daq.h:723
daq_ref_buffer
daq_ref_buffer
DAQ REF buffer values.
Definition: daq.h:546
daq_mask_write
err_t daq_mask_write(daq_t *ctx, uint8_t reg, uint8_t mask, uint8_t data_in)
DAQ byte writing function with mask.
DAQ_CONV_SINGLE
@ DAQ_CONV_SINGLE
Definition: daq.h:444
daq_cfg_t::io3direction
uint8_t io3direction
Definition: daq.h:712
daq_t::chip_select
pin_name_t chip_select
Definition: daq.h:684
DAQ_GPIO_HIGH
@ DAQ_GPIO_HIGH
Definition: daq.h:600
DAQ_GLOBAL_GPIO_ENABLE
@ DAQ_GLOBAL_GPIO_ENABLE
Definition: daq.h:575
DAQ_VCM_OFF
@ DAQ_VCM_OFF
Definition: daq.h:566
daq_conv_len
daq_conv_len
DAQ conversion length values.
Definition: daq.h:454
DAQ_CONV_STANDBY
@ DAQ_CONV_STANDBY
Definition: daq.h:446
DAQ_MEDIAN
@ DAQ_MEDIAN
Definition: daq.h:420
DAQ_SINC5_DECx8
@ DAQ_SINC5_DECx8
Definition: daq.h:500
DAQ_GPIO2
@ DAQ_GPIO2
Definition: daq.h:588
daq_cfg_t::io3
pin_name_t io3
Definition: daq.h:704
DAQ_VCM_1_9V
@ DAQ_VCM_1_9V
Definition: daq.h:562
DAQ_POSITIVE_FS
@ DAQ_POSITIVE_FS
Definition: daq.h:477
DAQ_SLEEP
@ DAQ_SLEEP
Definition: daq.h:527
DAQ_MCLK_DIV_8
@ DAQ_MCLK_DIV_8
Definition: daq.h:431
DAQ_VCM_HALF_VCC
@ DAQ_VCM_HALF_VCC
Definition: daq.h:559
DAQ_SINC5_FIR_DECx1024
@ DAQ_SINC5_FIR_DECx1024
Definition: daq.h:518
daq_cfg_setup
void daq_cfg_setup(daq_cfg_t *cfg)
DAQ configuration object setup function.
daq_conv_mode
daq_conv_mode
DAQ conversion mode values.
Definition: daq.h:441
daq_gobal_gpio_enable
daq_gobal_gpio_enable
DAQ global gpio values.
Definition: daq.h:574
DAQ_AIN_DISABLED
@ DAQ_AIN_DISABLED
Definition: daq.h:538
DAQ_GPIO_LOW
@ DAQ_GPIO_LOW
Definition: daq.h:599
daq_power_mode
daq_power_mode
DAQ power clock values.
Definition: daq.h:418