daq  2.0.0.0
daq.h
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22 
28 #ifndef DAQ_H
29 #define DAQ_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
39 #ifdef PREINIT_SUPPORTED
40 #include "preinit.h"
41 #endif
42 
43 #ifdef MikroCCoreVersion
44  #if MikroCCoreVersion >= 1
45  #include "delays.h"
46  #endif
47 #endif
48 
49 #include "drv_digital_out.h"
50 #include "drv_digital_in.h"
51 #include "drv_spi_master.h"
52 
73 #define DAQ_REG_CHIP_TYPE 0x03
74 #define DAQ_REG_PRODUCT_ID_L 0x04
75 #define DAQ_REG_PRODUCT_ID_H 0x05
76 #define DAQ_REG_CHIP_GRADE 0x06
77 #define DAQ_REG_SCRATCH_PAD 0x0A
78 #define DAQ_REG_VENDOR_L 0x0C
79 #define DAQ_REG_VENDOR_H 0x0D
80 #define DAQ_REG_INTERFACE_FORMAT 0x14
81 #define DAQ_REG_POWER_CLOCK 0x15
82 #define DAQ_REG_ANALOG 0x16
83 #define DAQ_REG_ANALOG2 0x17
84 #define DAQ_REG_CONVERSION 0x18
85 #define DAQ_REG_DIGITAL_FILTER 0x19
86 #define DAQ_REG_SINC3_DEC_RATE_MSB 0x1A
87 #define DAQ_REG_SINC3_DEC_RATE_LSB 0x1B
88 #define DAQ_REG_DUTY_CYCLE_RATION 0x1C
89 #define DAQ_REG_SYNC_RESET 0x1D
90 #define DAQ_REG_GPIO_CONTROL 0x1E
91 #define DAQ_REG_GPIO_WRITE 0x1F
92 #define DAQ_REG_GPIO_READ 0x20
93 #define DAQ_REG_OFFSET_HI 0x21
94 #define DAQ_REG_OFFSET_MID 0x22
95 #define DAQ_REG_OFFSET_LO 0x23
96 #define DAQ_REG_GAIN_HI 0x24
97 #define DAQ_REG_GAIN_MID 0x25
98 #define DAQ_REG_GAIN_LO 0x26
99 #define DAQ_REG_BIST_CONTROL 0x27
100 #define DAQ_REG_SPI_DIAG_ENABLE 0x28
101 #define DAQ_REG_ADC_DIAG_ENABLE 0x29
102 #define DAQ_REG_DIG_DIAG_ENABLE 0x2A
103 #define DAQ_REG_ADC_DATA 0x2C
104 #define DAQ_REG_MASTER_STATUS 0x2D
105 #define DAQ_REG_SPI_DIAG_STATUS 0x2E
106 #define DAQ_REG_ADC_DIAG_STATUS 0x2F
107 #define DAQ_REG_DIG_DIAG_STATUS 0x30
108 #define DAQ_REG_MCLK_COUNTER 0x31
109 #define DAQ_REG_COEFF_CONTROL 0x32
110 #define DAQ_REG_COEFF_DATA 0x33
111 #define DAQ_REG_ACCESS_KEY 0x34
112 
113  // daq_reg
115 
130 #define DAQ_INTERFACE_CRC_EN_MSK (0x1 << 6)
131 #define DAQ_INTERFACE_CRC_EN(x) (((x) & 0x1) << 6)
132 #define DAQ_INTERFACE_CRC_TYPE_MSK (0x1 << 5)
133 #define DAQ_INTERFACE_CRC_TYPE(x) (((x) & 0x1) << 5)
134 #define DAQ_INTERFACE_STATUS_EN_MSK (0x1 << 4)
135 #define DAQ_INTERFACE_STATUS_EN(x) (((x) & 0x1) << 4)
136 #define DAQ_INTERFACE_CONVLEN_MSK (0x1 << 3)
137 #define DAQ_INTERFACE_CONVLEN(x) (((x) & 0x1) << 3)
138 #define DAQ_INTERFACE_RDY_EN_MSK (0x1 << 2)
139 #define DAQ_INTERFACE_RDY_EN(x) (((x) & 0x1) << 3)
140 #define DAQ_INTERFACE_CONT_READ_MSK (0x1 << 0)
141 #define DAQ_INTERFACE_CONT_READ_EN(x) (((x) & 0x1) << 0)
142 #define DAQ_REG_COEFF_CONTROL 0x32
143 #define DAQ_REG_COEFF_DATA 0x33
144 #define DAQ_REG_ACCESS_KEY 0x34
145 
150 #define DAQ_POWER_CLK_PWRMODE_MSK 0x3
151 #define DAQ_POWER_CLK_PWRMODE(x) (((x) & 0x3) << 0)
152 #define DAQ_POWER_CLK_MOD_OUT_MSK (0x1 << 2)
153 #define DAQ_POWER_CLK_MOD_OUT(x) (((x) & 0x1) << 2)
154 #define DAQ_POWER_CLK_POWER_DOWN 0x08
155 #define DAQ_POWER_CLK_MCLK_DIV_MSK (0x3 << 4)
156 #define DAQ_POWER_CLK_MCLK_DIV(x) (((x) & 0x3) << 4)
157 #define DAQ_POWER_CLK_CLOCK_SEL_MSK (0x3 << 6)
158 #define DAQ_POWER_CLK_CLOCK_SEL(x) (((x) & 0x3) << 6)
159 
164 #define DAQ_CONVERSION_DIAG_MUX_MSK (0xF << 4)
165 #define DAQ_CONVERSION_DIAG_MUX_SEL(x) (((x) & 0xF) << 4)
166 #define DAQ_CONVERSION_DIAG_SEL_MSK (0x1 << 3)
167 #define DAQ_CONVERSION_DIAG_SEL(x) (((x) & 0x1) << 3)
168 #define DAQ_CONVERSION_MODE_MSK (0x7 << 0)
169 #define DAQ_CONVERSION_MODE(x) (((x) & 0x7) << 0)
170 
175 #define DAQ_ANALOG_REF_BUF_POS_MSK (0x3 << 6)
176 #define DAQ_ANALOG_REF_BUF_POS(x) (((x) & 0x3) << 6)
177 #define DAQ_ANALOG_REF_BUF_NEG_MSK (0x3 << 4)
178 #define DAQ_ANALOG_REF_BUF_NEG(x) (((x) & 0x3) << 4)
179 #define DAQ_ANALOG_AIN_BUF_POS_OFF_MSK (0x1 << 1)
180 #define DAQ_ANALOG_AIN_BUF_POS_OFF(x) (((x) & 0x1) << 1)
181 #define DAQ_ANALOG_AIN_BUF_NEG_OFF_MSK (0x1 << 0)
182 #define DAQ_ANALOG_AIN_BUF_NEG_OFF(x) (((x) & 0x1) << 0)
183 #define DAQ_ANALOG2_VCM_MSK (0x7 << 0)
184 #define DAQ_ANALOG2_VCM(x) (((x) & 0x7) << 0)
185 
190 #define DAQ_DIGI_FILTER_60HZ_REJ_EN_MSK (0x1 << 7)
191 #define DAQ_DIGI_FILTER_60HZ_REJ_EN(x) (((x) & 0x1) << 7)
192 #define DAQ_DIGI_FILTER_FILTER_MSK (0x7 << 4)
193 #define DAQ_DIGI_FILTER_FILTER(x) (((x) & 0x7) << 4)
194 #define DAQ_DIGI_FILTER_DEC_RATE_MSK (0x7 << 0)
195 #define DAQ_DIGI_FILTER_DEC_RATE(x) (((x) & 0x7) << 0)
196 
201 #define DAQ_SINC3_DEC_RATE_MSB_MSK (0x0F << 0)
202 #define DAQ_SINC3_DEC_RATE_MSB(x) (((x) & 0x0F) << 0)
203 #define DAQ_SINC3_DEC_RATE_LSB_MSK (0xFF << 0)
204 #define DAQ_SINC3_DEC_RATE_LSB(x) (((x) & 0xFF) << 0)
205 
210 #define DAQ_DC_RATIO_IDLE_TIME_MSK (0xFF << 0)
211 #define DAQ_DC_RATIO_IDLE_TIME(x) (((x) & 0xFF) << 0)
212 
217 #define DAQ_SYNC_RST_SPI_STARTB_MSK (0x1 << 7)
218 #define DAQ_SYNC_RST_SPI_STARTB(x) (((x) & 0x1) << 7)
219 #define DAQ_SYNC_RST_SYNCOUT_EDGE_MSK (0x1 << 6)
220 #define DAQ_SYNC_RST_SYNCOUT_EDGE(x) (((x) & 0x1) << 6)
221 #define DAQ_SYNC_RST_GPIO_START_EN_MSK (0x1 << 3)
222 #define DAQ_SYNC_RST_GPIO_START_EN(x) (((x) & 0x1) << 3)
223 #define DAQ_SYNC_RST_SPI_RESET_MSK (0x3 << 0)
224 #define DAQ_SYNC_RST_SPI_RESET(x) (((x) & 0x3) << 0)
225 
230 #define DAQ_GPIO_CNTRL_UGPIO_EN_MSK (0x1 << 7)
231 #define DAQ_GPIO_CNTRL_UGPIO_EN(x) (((x) & 0x1) << 7)
232 #define DAQ_GPIO_CNTRL_GPIO2_OD_EN_MSK (0x1 << 6)
233 #define DAQ_GPIO_CNTRL_GPIO2_OD_EN(x) (((x) & 0x1) << 6)
234 #define DAQ_GPIO_CNTRL_GPIO1_OD_EN_MSK (0x1 << 5)
235 #define DAQ_GPIO_CNTRL_GPIO1_OD_EN(x) (((x) & 0x1) << 5)
236 #define DAQ_GPIO_CNTRL_GPIO0_OD_EN_MSK (0x1 << 4)
237 #define DAQ_GPIO_CNTRL_GPIO0_OD_EN(x) (((x) & 0x1) << 4)
238 #define DAQ_GPIO_CNTRL_ALL_GPIOS_OD_EN_MSK (0x7 << 4)
239 #define DAQ_GPIO_CNTRL_ALL_GPIOS_OD_EN(x) (((x) & 0x7) << 4)
240 #define DAQ_GPIO_CNTRL_GPIO3_OP_EN_MSK (0x1 << 3)
241 #define DAQ_GPIO_CNTRL_GPIO3_OP_EN(x) (((x) & 0x1) << 3)
242 #define DAQ_GPIO_CNTRL_GPIO2_OP_EN_MSK (0x1 << 2)
243 #define DAQ_GPIO_CNTRL_GPIO2_OP_EN(x) (((x) & 0x1) << 2)
244 #define DAQ_GPIO_CNTRL_GPIO1_OP_EN_MSK (0x1 << 1)
245 #define DAQ_GPIO_CNTRL_GPIO1_OP_EN(x) (((x) & 0x1) << 1)
246 #define DAQ_GPIO_CNTRL_GPIO0_OP_EN_MSK (0x1 << 0)
247 #define DAQ_GPIO_CNTRL_GPIO0_OP_EN(x) (((x) & 0x1) << 0)
248 #define DAQ_GPIO_CNTRL_ALL_GPIOS_OP_EN_MSK (0xF << 0)
249 #define DAQ_GPIO_CNTRL_ALL_GPIOS_OP_EN(x) (((x) & 0xF) << 0)
250 #define DAQ_GPIO_WRITE_3_MSK (0x1 << 3)
251 #define DAQ_GPIO_WRITE_3(x) (((x) & 0x1) << 3)
252 #define DAQ_GPIO_WRITE_2_MSK (0x1 << 2)
253 #define DAQ_GPIO_WRITE_2(x) (((x) & 0x1) << 2)
254 #define DAQ_GPIO_WRITE_1_MSK (0x1 << 1)
255 #define DAQ_GPIO_WRITE_1(x) (((x) & 0x1) << 1)
256 #define DAQ_GPIO_WRITE_0_MSK (0x1 << 0)
257 #define DAQ_GPIO_WRITE_0(x) (((x) & 0x1) << 0)
258 #define DAQ_GPIO_WRITE_ALL_MSK (0xF << 0)
259 #define DAQ_GPIO_WRITE_ALL(x) (((x) & 0xF))
260 #define DAQ_GPIO_READ_3_MSK (0x1 << 3)
261 #define DAQ_GPIO_READ_2_MSK (0x1 << 2)
262 #define DAQ_GPIO_READ_1_MSK (0x1 << 1)
263 #define DAQ_GPIO_READ_0_MSK (0x1 << 0)
264 #define DAQ_GPIO_READ_ALL_MSK (0xF << 0)
265 
270 #define DAQ_OFFSET_HI_MSK (0xFF << 0)
271 #define DAQ_OFFSET_HI(x) (((x) & 0xFF) << 0)
272 #define DAQ_OFFSET_MID_MSK (0xFF << 0)
273 #define DAQ_OFFSET_MID(x) (((x) & 0xFF) << 0)
274 #define DAQ_OFFSET_LO_MSK (0xFF << 0)
275 #define DAQ_OFFSET_LO(x) (((x) & 0xFF) << 0)
276 
281 #define DAQ_GAIN_HI_MSK (0xFF << 0)
282 #define DAQ_GAIN_HI(x) (((x) & 0xFF) << 0)
283 #define DAQ_GAIN_MID_MSK (0xFF << 0)
284 #define DAQ_GAIN_MID(x) (((x) & 0xFF) << 0)
285 #define DAQ_GAIN_LOW_MSK (0xFF << 0)
286 #define DAQ_GAIN_LOW(x) (((x) & 0xFF) << 0)
287 
292 #define DAQ_SPI_DIAG_ERR_SPI_IGNORE_MSK (0x1 << 4)
293 #define DAQ_SPI_DIAG_ERR_SPI_IGNORE(x) (((x) & 0x1) << 4)
294 #define DAQ_SPI_DIAG_ERR_SPI_CLK_CNT_MSK (0x1 << 3)
295 #define DAQ_SPI_DIAG_ERR_SPI_CLK_CNT(x) (((x) & 0x1) << 3)
296 #define DAQ_SPI_DIAG_ERR_SPI_RD_MSK (0x1 << 2)
297 #define DAQ_SPI_DIAG_ERR_SPI_RD(x) (((x) & 0x1) << 2)
298 #define DAQ_SPI_DIAG_ERR_SPI_WR_MSK (0x1 << 1)
299 #define DAQ_SPI_DIAG_ERR_SPI_WR(x) (((x) & 0x1) << 1)
300 
305 #define DAQ_ADC_DIAG_ERR_DLDO_PSM_MSK (0x1 << 5)
306 #define DAQ_ADC_DIAG_ERR_DLDO_PSM(x) (((x) & 0x1) << 5)
307 #define DAQ_ADC_DIAG_ERR_ALDO_PSM_MSK (0x1 << 4)
308 #define DAQ_ADC_DIAG_ERR_ALDO_PSM(x) (((x) & 0x1) << 4)
309 #define DAQ_ADC_DIAG_ERR_FILT_SAT_MSK (0x1 << 2)
310 #define DAQ_ADC_DIAG_ERR_FILT_SAT(x) (((x) & 0x1) << 2)
311 #define DAQ_ADC_DIAG_ERR_FILT_NOT_SET_MSK (0x1 << 1)
312 #define DAQ_ADC_DIAG_ERR_FILT_NOT_SET(x) (((x) & 0x1) << 1)
313 #define DAQ_ADC_DIAG_ERR_EXT_CLK_QUAL_MSK (0x1 << 0)
314 #define DAQ_ADC_DIAG_ERR_EXT_CLK_QUAL(x) (((x) & 0x1) << 0)
315 
320 #define DAQ_DIG_DIAG_ERR_MEMMAP_CRC_MSK (0x1 << 4)
321 #define DAQ_DIG_DIAG_ERR_MEMMAP_CRC(x) (((x) & 0x1) << 4)
322 #define DAQ_DIG_DIAG_ERR_RAM_CRC_MSK (0x1 << 3)
323 #define DAQ_DIG_DIAG_ERR_RAM_CRC(x) (((x) & 0x1) << 3)
324 #define DAQ_DIG_DIAG_ERR_FUSE_CRC_MSK (0x1 << 2)
325 #define DAQ_DIG_DIAG_ERR_FUSE_CRC(x) (((x) & 0x1) << 2)
326 #define DAQ_DIG_DIAG_FREQ_COUNT_EN_MSK (0x1 << 0)
327 #define DAQ_DIG_DIAG_FREQ_COUNT_EN(x) (((x) & 0x1) << 0)
328 
333 #define DAQ_MASTER_ERROR_MSK (0x1 << 7)
334 #define DAQ_MASTER_ADC_ERROR_MSK (0x1 << 6)
335 #define DAQ_MASTER_DIG_ERROR_MSK (0x1 << 5)
336 #define DAQ_MASTER_DIG_ERR_EXT_CLK_MSK (0x1 << 4)
337 #define DAQ_MASTER_FILT_SAT_MSK (0x1 << 3)
338 #define DAQ_MASTER_FILT_NOT_SET_MSK (0x1 << 2)
339 #define DAQ_MASTER_SPI_ERROR_MSK (0x1 << 1)
340 #define DAQ_MASTER_POR_FLAG_MSK (0x1 << 0)
341 
342 /* DAQ_REG_SPI_DIAG_STATUS */
347 #define DAQ_SPI_IGNORE_ERROR_MSK (0x1 << 4)
348 #define DAQ_SPI_IGNORE_ERROR_CLR(x) (((x) & 0x1) << 4)
349 #define DAQ_SPI_CLK_CNT_ERROR_MSK (0x1 << 3)
350 #define DAQ_SPI_READ_ERROR_MSK (0x1 << 2)
351 #define DAQ_SPI_READ_ERROR_CLR(x) (((x) & 0x1) << 2)
352 #define DAQ_SPI_WRITE_ERROR_MSK (0x1 << 1)
353 #define DAQ_SPI_WRITE_ERROR_CLR(x) (((x) & 0x1) << 1)
354 #define DAQ_SPI_CRC_ERROR_MSK (0x1 << 0)
355 #define DAQ_SPI_CRC_ERROR_CLR(x) (((x) & 0x1) << 0)
356 
361 #define DAQ_ADC_DLDO_PSM_ERROR_MSK (0x1 << 5)
362 #define DAQ_ADC_ALDO_PSM_ERROR_MSK (0x1 << 4)
363 #define DAQ_ADC_REF_DET_ERROR_MSK (0x1 << 3)
364 #define DAQ_ADC_FILT_SAT_MSK (0x1 << 2)
365 #define DAQ_ADC_FILT_NOT_SET_MSK (0x1 << 1)
366 #define DAQ_ADC_DIG_ERR_EXT_CLK_MSK (0x1 << 0)
367 
372 #define DAQ_DIG_MEMMAP_CRC_ERROR_MSK (0x1 << 4)
373 #define DAQ_DIG_RAM_CRC_ERROR_MSK (0x1 << 3)
374 #define DAQ_DIG_FUS_CRC_ERROR_MSK (0x1 << 2)
375 
380 #define DAQ_MCLK_COUNTER_MSK (0xFF << 0)
381 #define DAQ_MCLK_COUNTER(x) (((x) & 0xFF) << 0)
382 
387 #define DAQ_COEF_CONTROL_COEFFACCESSEN_MSK (0x1 << 7)
388 #define DAQ_COEF_CONTROL_COEFFACCESSEN(x) (((x) & 0x1) << 7)
389 #define DAQ_COEF_CONTROL_COEFFWRITEEN_MSK (0x1 << 6)
390 #define DAQ_COEF_CONTROL_COEFFWRITEEN(x) (((x) & 0x1) << 6)
391 #define DAQ_COEF_CONTROL_COEFFADDR_MSK (0x3F << 5)
392 #define DAQ_COEF_CONTROL_COEFFADDR(x) (((x) & 0x3F) << 5)
393 
398 #define DAQ_COEFF_DATA_USERCOEFFEN_MSK (0x1 << 23)
399 #define DAQ_COEFF_DATA_USERCOEFFEN(x) (((x) & 0x1) << 23)
400 #define DAQ_COEFF_DATA_COEFFDATA_MSK (0x7FFFFF << 22)
401 #define DAQ_COEFF_DATA_COEFFDATA(x) (((x) & 0x7FFFFF) << 22)
402 
407 #define DAQ_ACCESS_KEY_MSK (0xFF << 0)
408 #define DAQ_ACCESS_KEY(x) (((x) & 0xFF) << 0)
409 #define DAQ_ACCESS_KEY_CHECK_MSK (0x1 << 0)
410 
415 #define DAQ_RESOLUTION 8388608
416 
422 {
423  DAQ_ECO = 0,
425  DAQ_FAST = 3,
426 };
427 
433 {
437  DAQ_MCLK_DIV_2 = 3
438 };
439 
445 {
450  DAQ_CONV_STANDBY = 4
451 };
452 
458 {
460  DAQ_CONV_16BIT = 1
461 };
462 
468 {
471 };
472 
478 {
482  DAQ_NEGATIVE_FS = 0xA
483 };
484 
490 {
493  DAQ_NO_CRC
494 };
495 
502 {
507  DAQ_FIR = 4
508 };
509 
516 {
523 };
524 
530 {
532  DAQ_WAKE = 0
533 };
534 
540 {
542  DAQ_AIN_DISABLED = 1
543 };
544 
550 {
554 };
555 
562 {
570  DAQ_VCM_OFF = 7
571 };
572 
578 {
581 };
582 
589 {
594  DAQ_ALL_GPIOS = 4
595 };
596 
602 {
604  DAQ_GPIO_HIGH = 1
605 };
606 
612 {
615 };
616 
623 {
626 };
627 
632 typedef enum
633 {
634  DAQ_GAIN_12p603 = 6,/*< Range: +-12.603*/
635  DAQ_GAIN_6p302 = 5,/*< Range: +-6.302*/
636  DAQ_GAIN_3p151 = 4,/*< Range: +-3.151*/
637  DAQ_GAIN_1p575 = 3,/*< Range: +-1.575*/
638  DAQ_GAIN_p788 = 2,/*< Range: +-0.788*/
639  DAQ_GAIN_p394 = 1,/*< Range: +-0.394*/
640  DAQ_GAIN_p197 = 0 /*< Range: +-0.197*/
642  // daq_set
644 
659 #define DAQ_MAP_MIKROBUS( cfg, mikrobus ) \
660  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
661  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
662  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
663  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
664  cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
665  cfg.io3 = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
666  cfg.rdy = MIKROBUS( mikrobus, MIKROBUS_INT )
667  // daq_map // daq
670 
675 typedef struct
676 {
677  // Output pins
678  digital_out_t rst;
680  // Input pins
681  digital_in_t rdy;
682  // I/O
683  digital_out_t io3;
685  // Modules
686  spi_master_t spi;
688  pin_name_t chip_select;
690  float gain;
692 } daq_t;
693 
698 typedef struct
699 {
700  // Communication gpio pins
701  pin_name_t miso;
702  pin_name_t mosi;
703  pin_name_t sck;
704  pin_name_t cs;
706  // Additional gpio pins
707  pin_name_t rst;
708  pin_name_t io3;
709  pin_name_t rdy;
711  // static variable
712  uint32_t spi_speed;
713  spi_master_mode_t spi_mode;
714  spi_master_chip_select_polarity_t cs_polarity;
715  //IO3 direction
716  uint8_t io3direction;
718 } daq_cfg_t;
719 
724 typedef enum
725 {
726  DAQ_OK = 0,
727  DAQ_ERROR = -1
728 
730 
746 void daq_cfg_setup ( daq_cfg_t *cfg );
747 
762 err_t daq_init ( daq_t *ctx, daq_cfg_t *cfg );
763 
777 err_t daq_default_cfg ( daq_t *ctx );
778 
793 err_t daq_generic_write ( daq_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len );
794 
807 err_t daq_byte_write ( daq_t *ctx, uint8_t reg, uint8_t data_in );
808 
822 err_t daq_mask_write ( daq_t *ctx, uint8_t reg, uint8_t mask, uint8_t data_in );
823 
838 err_t daq_generic_read ( daq_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len );
839 
852 err_t daq_byte_read ( daq_t *ctx, uint8_t reg, uint8_t *data_out );
853 
867 err_t daq_mask_read ( daq_t *ctx, uint8_t reg, uint8_t mask, uint8_t *data_out );
868 
881 err_t daq_raw_read ( daq_t *ctx, uint8_t *data_out, uint8_t len );
882 
890 void daq_reset ( daq_t *ctx );
891 
899 uint8_t daq_data_ready( daq_t *ctx );
900 
909 void daq_set_io3 ( daq_t *ctx, uint8_t state );
910 
918 uint8_t daq_get_iot3 ( daq_t *ctx );
919 
932 err_t daq_set_gain ( daq_t *ctx, daq_gain gain );
933 
945 err_t daq_read_data ( daq_t *ctx, int32_t *adc_data );
946 
956 void daq_calculate_voltage ( daq_t *ctx, int32_t adc_data, float *voltage );
957 
958 #ifdef __cplusplus
959 }
960 #endif
961 #endif // DAQ_H
962  // daq
964 
965 // ------------------------------------------------------------------------ END
DAQ_SINC5_FIR_DECx256
@ DAQ_SINC5_FIR_DECx256
Definition: daq.h:520
DAQ_SINC5_FIR_DECx128
@ DAQ_SINC5_FIR_DECx128
Definition: daq.h:519
DAQ_GPIO3
@ DAQ_GPIO3
Definition: daq.h:593
DAQ_GLOBAL_GPIO_DISABLE
@ DAQ_GLOBAL_GPIO_DISABLE
Definition: daq.h:580
DAQ_AIN_ENABLED
@ DAQ_AIN_ENABLED
Definition: daq.h:541
DAQ_VCM_2_05V
@ DAQ_VCM_2_05V
Definition: daq.h:565
DAQ_SINC5_FIR_DECx512
@ DAQ_SINC5_FIR_DECx512
Definition: daq.h:521
DAQ_GPIO_STRONG_DRIVER
@ DAQ_GPIO_STRONG_DRIVER
Definition: daq.h:613
DAQ_GAIN_1p575
@ DAQ_GAIN_1p575
Definition: daq.h:637
DAQ_CRC
@ DAQ_CRC
Definition: daq.h:491
daq_cfg_t::rdy
pin_name_t rdy
Definition: daq.h:709
DAQ_OK
@ DAQ_OK
Definition: daq.h:726
daq_gain
daq_gain
DAQ GAIN configuration values.
Definition: daq.h:633
daq_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: daq.h:713
daq_cfg_t
DAQ Click configuration object.
Definition: daq.h:699
daq_byte_write
err_t daq_byte_write(daq_t *ctx, uint8_t reg, uint8_t data_in)
DAQ byte writing function.
daq_ain_precharge
daq_ain_precharge
DAQ AIN precharge values.
Definition: daq.h:540
DAQ_GPIO1
@ DAQ_GPIO1
Definition: daq.h:591
daq_t::io3
digital_out_t io3
Definition: daq.h:683
DAQ_SINC5_DECx16
@ DAQ_SINC5_DECx16
Definition: daq.h:505
DAQ_GAIN_12p603
@ DAQ_GAIN_12p603
Definition: daq.h:634
daq_sinc5_fir_decimate
daq_sinc5_fir_decimate
DAQ Decimation ratios for SINC5 and FIR values.
Definition: daq.h:516
daq_cfg_t::mosi
pin_name_t mosi
Definition: daq.h:702
daq_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: daq.h:714
DAQ_TEMP_SENSOR
@ DAQ_TEMP_SENSOR
Definition: daq.h:479
DAQ_VCM_0_9V
@ DAQ_VCM_0_9V
Definition: daq.h:569
DAQ_CONV_PERIODIC
@ DAQ_CONV_PERIODIC
Definition: daq.h:449
daq_byte_read
err_t daq_byte_read(daq_t *ctx, uint8_t reg, uint8_t *data_out)
DAQ byte reading function.
DAQ_MCLK_DIV_4
@ DAQ_MCLK_DIV_4
Definition: daq.h:436
DAQ_CONV_CONTINUOUS
@ DAQ_CONV_CONTINUOUS
Definition: daq.h:446
daq_gpios
daq_gpios
DAQ global gpio numbering values.
Definition: daq.h:589
DAQ_BUF_FULL_BUFFER_ON
@ DAQ_BUF_FULL_BUFFER_ON
Definition: daq.h:553
DAQ_WAKE
@ DAQ_WAKE
Definition: daq.h:532
daq_gpio_output_type
daq_gpio_output_type
DAQ gpio output type values.
Definition: daq.h:612
daq_read_data
err_t daq_read_data(daq_t *ctx, int32_t *adc_data)
Reading adc data.
DAQ_SINC5_FIR_DECx32
@ DAQ_SINC5_FIR_DECx32
Definition: daq.h:517
daq_get_iot3
uint8_t daq_get_iot3(daq_t *ctx)
Get io3 pin.
daq_reset
void daq_reset(daq_t *ctx)
Reset function.
daq_t::spi
spi_master_t spi
Definition: daq.h:686
daq_cfg_t::miso
pin_name_t miso
Definition: daq.h:701
daq_conv_diag_mux
daq_conv_diag_mux
DAQ conversion mux values.
Definition: daq.h:478
DAQ_NEGATIVE_FS
@ DAQ_NEGATIVE_FS
Definition: daq.h:482
DAQ_RDY_DOUT_DIS
@ DAQ_RDY_DOUT_DIS
Definition: daq.h:470
DAQ_MCLK_DIV_2
@ DAQ_MCLK_DIV_2
Definition: daq.h:437
daq_default_cfg
err_t daq_default_cfg(daq_t *ctx)
DAQ default configuration function.
daq_crc_sel
daq_crc_sel
DAQ crc selection values.
Definition: daq.h:490
daq_filter_type
daq_filter_type
DAQ filter type selection values.
Definition: daq.h:502
DAQ_VCM_1_65V
@ DAQ_VCM_1_65V
Definition: daq.h:567
daq_t::gain
float gain
Definition: daq.h:690
DAQ_CONTINUOUS_READ_ENABLE
@ DAQ_CONTINUOUS_READ_ENABLE
Definition: daq.h:624
daq_cfg_t::cs
pin_name_t cs
Definition: daq.h:704
DAQ_GAIN_6p302
@ DAQ_GAIN_6p302
Definition: daq.h:635
DAQ_ALL_GPIOS
@ DAQ_ALL_GPIOS
Definition: daq.h:594
DAQ_GPIO0
@ DAQ_GPIO0
Definition: daq.h:590
DAQ_CONV_ONE_SHOT
@ DAQ_CONV_ONE_SHOT
Definition: daq.h:447
DAQ_SINC3
@ DAQ_SINC3
Definition: daq.h:506
daq_t
DAQ Click context object.
Definition: daq.h:676
DAQ_BUF_ENABLED
@ DAQ_BUF_ENABLED
Definition: daq.h:551
daq_data_ready
uint8_t daq_data_ready(daq_t *ctx)
Get data ready pin.
DAQ_MCLK_DIV_16
@ DAQ_MCLK_DIV_16
Definition: daq.h:434
daq_raw_read
err_t daq_raw_read(daq_t *ctx, uint8_t *data_out, uint8_t len)
DAQ reading function.
DAQ_FAST
@ DAQ_FAST
Definition: daq.h:425
daq_cfg_t::sck
pin_name_t sck
Definition: daq.h:703
daq_calculate_voltage
void daq_calculate_voltage(daq_t *ctx, int32_t adc_data, float *voltage)
Convert data from raw ADC to voltage.
daq_generic_read
err_t daq_generic_read(daq_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len)
DAQ data reading function.
daq_continuous_read
daq_continuous_read
DAQ continuous adc read enable values.
Definition: daq.h:623
DAQ_SINC5
@ DAQ_SINC5
Definition: daq.h:503
daq_vcm_out
daq_vcm_out
DAQ VCM output voltage values.
Definition: daq.h:562
DAQ_VCM_2_5V
@ DAQ_VCM_2_5V
Definition: daq.h:564
daq_rdy_dout
daq_rdy_dout
DAQ data ready enable values.
Definition: daq.h:468
DAQ_NO_CRC
@ DAQ_NO_CRC
Definition: daq.h:493
DAQ_BUF_DISABLED
@ DAQ_BUF_DISABLED
Definition: daq.h:552
daq_cfg_t::spi_speed
uint32_t spi_speed
Definition: daq.h:712
DAQ_FIR
@ DAQ_FIR
Definition: daq.h:507
DAQ_SINC5_FIR_DECx64
@ DAQ_SINC5_FIR_DECx64
Definition: daq.h:518
daq_mclk_div
daq_mclk_div
DAQ mclk divider values.
Definition: daq.h:433
daq_mask_read
err_t daq_mask_read(daq_t *ctx, uint8_t reg, uint8_t mask, uint8_t *data_out)
DAQ byte reading function with mask.
daq_t::rst
digital_out_t rst
Definition: daq.h:678
daq_cfg_t::rst
pin_name_t rst
Definition: daq.h:707
daq_gpio_write
daq_gpio_write
DAQ gpio state values.
Definition: daq.h:602
DAQ_AIN_SHORT
@ DAQ_AIN_SHORT
Definition: daq.h:480
daq_sleep_wake
daq_sleep_wake
DAQ power values.
Definition: daq.h:530
daq_init
err_t daq_init(daq_t *ctx, daq_cfg_t *cfg)
DAQ initialization function.
daq_set_gain
err_t daq_set_gain(daq_t *ctx, daq_gain gain)
Set gain range.
DAQ_GAIN_3p151
@ DAQ_GAIN_3p151
Definition: daq.h:636
daq_t::rdy
digital_in_t rdy
Definition: daq.h:681
DAQ_ECO
@ DAQ_ECO
Definition: daq.h:423
DAQ_RDY_DOUT_EN
@ DAQ_RDY_DOUT_EN
Definition: daq.h:469
DAQ_XOR
@ DAQ_XOR
Definition: daq.h:492
DAQ_CONV_16BIT
@ DAQ_CONV_16BIT
Definition: daq.h:460
DAQ_GAIN_p197
@ DAQ_GAIN_p197
Definition: daq.h:640
daq_generic_write
err_t daq_generic_write(daq_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len)
DAQ data writing function.
DAQ_CONV_24BIT
@ DAQ_CONV_24BIT
Definition: daq.h:459
DAQ_VCM_1_1V
@ DAQ_VCM_1_1V
Definition: daq.h:568
DAQ_CONTINUOUS_READ_DISABLE
@ DAQ_CONTINUOUS_READ_DISABLE
Definition: daq.h:625
DAQ_GAIN_p788
@ DAQ_GAIN_p788
Definition: daq.h:638
daq_return_value_t
daq_return_value_t
DAQ Click return value data.
Definition: daq.h:725
DAQ_GPIO_OPEN_DRAIN
@ DAQ_GPIO_OPEN_DRAIN
Definition: daq.h:614
DAQ_GAIN_p394
@ DAQ_GAIN_p394
Definition: daq.h:639
daq_set_io3
void daq_set_io3(daq_t *ctx, uint8_t state)
Set io3 pin.
DAQ_ERROR
@ DAQ_ERROR
Definition: daq.h:727
daq_ref_buffer
daq_ref_buffer
DAQ REF buffer values.
Definition: daq.h:550
daq_mask_write
err_t daq_mask_write(daq_t *ctx, uint8_t reg, uint8_t mask, uint8_t data_in)
DAQ byte writing function with mask.
DAQ_CONV_SINGLE
@ DAQ_CONV_SINGLE
Definition: daq.h:448
daq_cfg_t::io3direction
uint8_t io3direction
Definition: daq.h:716
daq_t::chip_select
pin_name_t chip_select
Definition: daq.h:688
DAQ_GPIO_HIGH
@ DAQ_GPIO_HIGH
Definition: daq.h:604
DAQ_GLOBAL_GPIO_ENABLE
@ DAQ_GLOBAL_GPIO_ENABLE
Definition: daq.h:579
DAQ_VCM_OFF
@ DAQ_VCM_OFF
Definition: daq.h:570
daq_conv_len
daq_conv_len
DAQ conversion length values.
Definition: daq.h:458
DAQ_CONV_STANDBY
@ DAQ_CONV_STANDBY
Definition: daq.h:450
DAQ_MEDIAN
@ DAQ_MEDIAN
Definition: daq.h:424
DAQ_SINC5_DECx8
@ DAQ_SINC5_DECx8
Definition: daq.h:504
DAQ_GPIO2
@ DAQ_GPIO2
Definition: daq.h:592
daq_cfg_t::io3
pin_name_t io3
Definition: daq.h:708
DAQ_VCM_1_9V
@ DAQ_VCM_1_9V
Definition: daq.h:566
DAQ_POSITIVE_FS
@ DAQ_POSITIVE_FS
Definition: daq.h:481
DAQ_SLEEP
@ DAQ_SLEEP
Definition: daq.h:531
DAQ_MCLK_DIV_8
@ DAQ_MCLK_DIV_8
Definition: daq.h:435
DAQ_VCM_HALF_VCC
@ DAQ_VCM_HALF_VCC
Definition: daq.h:563
DAQ_SINC5_FIR_DECx1024
@ DAQ_SINC5_FIR_DECx1024
Definition: daq.h:522
daq_cfg_setup
void daq_cfg_setup(daq_cfg_t *cfg)
DAQ configuration object setup function.
daq_conv_mode
daq_conv_mode
DAQ conversion mode values.
Definition: daq.h:445
daq_gobal_gpio_enable
daq_gobal_gpio_enable
DAQ global gpio values.
Definition: daq.h:578
DAQ_AIN_DISABLED
@ DAQ_AIN_DISABLED
Definition: daq.h:542
DAQ_GPIO_LOW
@ DAQ_GPIO_LOW
Definition: daq.h:603
daq_power_mode
daq_power_mode
DAQ power clock values.
Definition: daq.h:422