ccrf3  2.0.0.0
ccrf3.h
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22 
28 #ifndef CCRF3_H
29 #define CCRF3_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
35 #include "mikrosdk_version.h"
36 
37 #ifdef __GNUC__
38 #if mikroSDK_GET_VERSION < 20800ul
39 #include "rcu_delays.h"
40 #else
41 #include "delays.h"
42 #endif
43 #endif
44 
45 #include "drv_digital_out.h"
46 #include "drv_digital_in.h"
47 #include "drv_spi_master.h"
48 #include "spi_specifics.h"
49 
75 #define CCRF3_IOCFG3 0x0000
76 #define CCRF3_IOCFG2 0x0001
77 #define CCRF3_IOCFG1 0x0002
78 #define CCRF3_IOCFG0 0x0003
79 #define CCRF3_SYNC3 0x0004
80 #define CCRF3_SYNC2 0x0005
81 #define CCRF3_SYNC1 0x0006
82 #define CCRF3_SYNC0 0x0007
83 #define CCRF3_SYNC_CFG1 0x0008
84 #define CCRF3_SYNC_CFG0 0x0009
85 #define CCRF3_DEVIATION_M 0x000A
86 #define CCRF3_MODCFG_DEV_E 0x000B
87 #define CCRF3_DCFILT_CFG 0x000C
88 #define CCRF3_PREAMBLE_CFG1 0x000D
89 #define CCRF3_PREAMBLE_CFG0 0x000E
90 #define CCRF3_FREQ_IF_CFG 0x000F
91 #define CCRF3_IQIC 0x0010
92 #define CCRF3_CHAN_BW 0x0011
93 #define CCRF3_MDMCFG1 0x0012
94 #define CCRF3_MDMCFG0 0x0013
95 #define CCRF3_SYMBOL_RATE2 0x0014
96 #define CCRF3_SYMBOL_RATE1 0x0015
97 #define CCRF3_SYMBOL_RATE0 0x0016
98 #define CCRF3_AGC_REF 0x0017
99 #define CCRF3_AGC_CS_THR 0x0018
100 #define CCRF3_AGC_GAIN_ADJUST 0x0019
101 #define CCRF3_AGC_CFG3 0x001A
102 #define CCRF3_AGC_CFG2 0x001B
103 #define CCRF3_AGC_CFG1 0x001C
104 #define CCRF3_AGC_CFG0 0x001D
105 #define CCRF3_FIFO_CFG 0x001E
106 #define CCRF3_DEV_ADDR 0x001F
107 #define CCRF3_SETTLING_CFG 0x0020
108 #define CCRF3_FS_CFG 0x0021
109 #define CCRF3_WOR_CFG1 0x0022
110 #define CCRF3_WOR_CFG0 0x0023
111 #define CCRF3_WOR_EVENT0_MSB 0x0024
112 #define CCRF3_WOR_EVENT0_LSB 0x0025
113 #define CCRF3_PKT_CFG2 0x0026
114 #define CCRF3_PKT_CFG1 0x0027
115 #define CCRF3_PKT_CFG0 0x0028
116 #define CCRF3_RFEND_CFG1 0x0029
117 #define CCRF3_RFEND_CFG0 0x002A
118 #define CCRF3_PA_CFG2 0x002B
119 #define CCRF3_PA_CFG1 0x002C
120 #define CCRF3_PA_CFG0 0x002D
121 #define CCRF3_PKT_LEN 0x002E
122 
127 #define CCRF3_IF_MIX_CFG 0x2F00
128 #define CCRF3_FREQOFF_CFG 0x2F01
129 #define CCRF3_TOC_CFG 0x2F02
130 #define CCRF3_MARC_SPARE 0x2F03
131 #define CCRF3_ECG_CFG 0x2F04
132 #define CCRF3_CFM_DATA_CFG 0x2F05
133 #define CCRF3_EXT_CTRL 0x2F06
134 #define CCRF3_RCCAL_FINE 0x2F07
135 #define CCRF3_RCCAL_COARSE 0x2F08
136 #define CCRF3_RCCAL_OFFSET 0x2F09
137 #define CCRF3_FREQOFF1 0x2F0A
138 #define CCRF3_FREQOFF0 0x2F0B
139 #define CCRF3_FREQ2 0x2F0C
140 #define CCRF3_FREQ1 0x2F0D
141 #define CCRF3_FREQ0 0x2F0E
142 #define CCRF3_IF_ADC2 0x2F0F
143 #define CCRF3_IF_ADC1 0x2F10
144 #define CCRF3_IF_ADC0 0x2F11
145 #define CCRF3_FS_DIG1 0x2F12
146 #define CCRF3_FS_DIG0 0x2F13
147 #define CCRF3_FS_CAL3 0x2F14
148 #define CCRF3_FS_CAL2 0x2F15
149 #define CCRF3_FS_CAL1 0x2F16
150 #define CCRF3_FS_CAL0 0x2F17
151 #define CCRF3_FS_CHP 0x2F18
152 #define CCRF3_FS_DIVTWO 0x2F19
153 #define CCRF3_FS_DSM1 0x2F1A
154 #define CCRF3_FS_DSM0 0x2F1B
155 #define CCRF3_FS_DVC1 0x2F1C
156 #define CCRF3_FS_DVC0 0x2F1D
157 #define CCRF3_FS_LBI 0x2F1E
158 #define CCRF3_FS_PFD 0x2F1F
159 #define CCRF3_FS_PRE 0x2F20
160 #define CCRF3_FS_REG_DIV_CML 0x2F21
161 #define CCRF3_FS_SPARE 0x2F22
162 #define CCRF3_FS_VCO4 0x2F23
163 #define CCRF3_FS_VCO3 0x2F24
164 #define CCRF3_FS_VCO2 0x2F25
165 #define CCRF3_FS_VCO1 0x2F26
166 #define CCRF3_FS_VCO0 0x2F27
167 #define CCRF3_GBIAS6 0x2F28
168 #define CCRF3_GBIAS5 0x2F29
169 #define CCRF3_GBIAS4 0x2F2A
170 #define CCRF3_GBIAS3 0x2F2B
171 #define CCRF3_GBIAS2 0x2F2C
172 #define CCRF3_GBIAS1 0x2F2D
173 #define CCRF3_GBIAS0 0x2F2E
174 #define CCRF3_IFAMP 0x2F2F
175 #define CCRF3_LNA 0x2F30
176 #define CCRF3_RXMIX 0x2F31
177 #define CCRF3_XOSC5 0x2F32
178 #define CCRF3_XOSC4 0x2F33
179 #define CCRF3_XOSC3 0x2F34
180 #define CCRF3_XOSC2 0x2F35
181 #define CCRF3_XOSC1 0x2F36
182 #define CCRF3_XOSC0 0x2F37
183 #define CCRF3_ANALOG_SPARE 0x2F38
184 #define CCRF3_PA_CFG3 0x2F39
185 #define CCRF3_IRQ0M 0x2F3F
186 #define CCRF3_IRQ0F 0x2F40
187 
192 #define CCRF3_WOR_TIME1 0x2F64
193 #define CCRF3_WOR_TIME0 0x2F65
194 #define CCRF3_WOR_CAPTURE1 0x2F66
195 #define CCRF3_WOR_CAPTURE0 0x2F67
196 #define CCRF3_BIST 0x2F68
197 #define CCRF3_DCFILTOFFSET_I1 0x2F69
198 #define CCRF3_DCFILTOFFSET_I0 0x2F6A
199 #define CCRF3_DCFILTOFFSET_Q1 0x2F6B
200 #define CCRF3_DCFILTOFFSET_Q0 0x2F6C
201 #define CCRF3_IQIE_I1 0x2F6D
202 #define CCRF3_IQIE_I0 0x2F6E
203 #define CCRF3_IQIE_Q1 0x2F6F
204 #define CCRF3_IQIE_Q0 0x2F70
205 #define CCRF3_RSSI1 0x2F71
206 #define CCRF3_RSSI0 0x2F72
207 #define CCRF3_MARCSTATE 0x2F73
208 #define CCRF3_LQI_VAL 0x2F74
209 #define CCRF3_PQT_SYNC_ERR 0x2F75
210 #define CCRF3_DEM_STATUS 0x2F76
211 #define CCRF3_FREQOFF_EST1 0x2F77
212 #define CCRF3_FREQOFF_EST0 0x2F78
213 #define CCRF3_AGC_GAIN3 0x2F79
214 #define CCRF3_AGC_GAIN2 0x2F7A
215 #define CCRF3_AGC_GAIN1 0x2F7B
216 #define CCRF3_AGC_GAIN0 0x2F7C
217 #define CCRF3_CFM_RX_DATA_OUT 0x2F7D
218 #define CCRF3_CFM_TX_DATA_IN 0x2F7E
219 #define CCRF3_ASK_SOFT_RX_DATA 0x2F7F
220 #define CCRF3_RNDGEN 0x2F80
221 #define CCRF3_MAGN2 0x2F81
222 #define CCRF3_MAGN1 0x2F82
223 #define CCRF3_MAGN0 0x2F83
224 #define CCRF3_ANG1 0x2F84
225 #define CCRF3_ANG0 0x2F85
226 #define CCRF3_CHFILT_I2 0x2F86
227 #define CCRF3_CHFILT_I1 0x2F87
228 #define CCRF3_CHFILT_I0 0x2F88
229 #define CCRF3_CHFILT_Q2 0x2F89
230 #define CCRF3_CHFILT_Q1 0x2F8A
231 #define CCRF3_CHFILT_Q0 0x2F8B
232 #define CCRF3_GPIO_STATUS 0x2F8C
233 #define CCRF3_FSCAL_CTRL 0x2F8D
234 #define CCRF3_PHASE_ADJUST 0x2F8E
235 #define CCRF3_PARTNUMBER 0x2F8F
236 #define CCRF3_PARTVERSION 0x2F90
237 #define CCRF3_SERIAL_STATUS 0x2F91
238 #define CCRF3_MODEM_STATUS1 0x2F92
239 #define CCRF3_MODEM_STATUS0 0x2F93
240 #define CCRF3_MARC_STATUS1 0x2F94
241 #define CCRF3_MARC_STATUS0 0x2F95
242 #define CCRF3_PA_IFAMP_TEST 0x2F96
243 #define CCRF3_FSRF_TEST 0x2F97
244 #define CCRF3_PRE_TEST 0x2F98
245 #define CCRF3_PRE_OVR 0x2F99
246 #define CCRF3_ADC_TEST 0x2F9A
247 #define CCRF3_DVC_TEST 0x2F9B
248 #define CCRF3_ATEST 0x2F9C
249 #define CCRF3_ATEST_LVDS 0x2F9D
250 #define CCRF3_ATEST_MODE 0x2F9E
251 #define CCRF3_XOSC_TEST1 0x2F9F
252 #define CCRF3_XOSC_TEST0 0x2FA0
253 
254 #define CCRF3_RXFIRST 0x2FD2
255 #define CCRF3_TXFIRST 0x2FD3
256 #define CCRF3_RXLAST 0x2FD4
257 #define CCRF3_TXLAST 0x2FD5
258 #define CCRF3_NUM_TXBYTES 0x2FD6
259 #define CCRF3_NUM_RXBYTES 0x2FD7
260 #define CCRF3_FIFO_NUM_TXBYTES 0x2FD8
261 #define CCRF3_FIFO_NUM_RXBYTES 0x2FD9
262  // ccrf3_reg
264 
279 #define CCRF3_STATUS_CHIP_RDYN_BM 0x80
280 #define CCRF3_STATUS_STATE_BM 0x70
281 #define CCRF3_STATUS_FIFO_BYTES_AVA_BM 0x0F
282 
283 #define CCRF3_STATUS_ERROR 0x00
284 #define CCRF3_STATUS_OK 0x01
285 
286 #define CCRF3_IDLE_MODE 0x01
287 #define CCRF3_TX_MODE 0x02
288 #define CCRF3_RX_MODE 0x03
289 
294 #define CCRF3_SINGLE_TXFIFO 0x003F
295 #define CCRF3_BURST_TXFIFO 0x007F
296 #define CCRF3_SINGLE_RXFIFO 0x00BF
297 #define CCRF3_BURST_RXFIFO 0x00FF
298 
299 #define CCRF3_LQI_CRC_OK_BM 0x80
300 #define CCRF3_LQI_EST_BM 0x7F
301 
306 #define CCRF3_SRES 0x30
307 #define CCRF3_SFSTXON 0x31
308 #define CCRF3_SXOFF 0x32
309 #define CCRF3_SCAL 0x33
310 #define CCRF3_SRX 0x34
311 #define CCRF3_STX 0x35
312 #define CCRF3_SIDLE 0x36
313 #define CCRF3_SWOR 0x38
314 #define CCRF3_SPWD 0x39
315 #define CCRF3_SFRX 0x3A
316 #define CCRF3_SFTX 0x3B
317 #define CCRF3_SWORRST 0x3C
318 #define CCRF3_SNOP 0x3D
319 #define CCRF3_AFC 0x37
320 
325 #define CCRF3_STATE_IDLE 0x00
326 #define CCRF3_STATE_RX 0x10
327 #define CCRF3_STATE_TX 0x20
328 #define CCRF3_STATE_FSTXON 0x30
329 #define CCRF3_STATE_CALIBRATE 0x40
330 #define CCRF3_STATE_SETTLING 0x50
331 #define CCRF3_STATE_RXFIFO_ERROR 0x60
332 #define CCRF3_STATE_TXFIFO_ERROR 0x70
333 
334 #define CCRF3_RADIO_BURST_ACCESS 0x40
335 #define CCRF3_RADIO_SINGLE_ACCESS 0x00
336 #define CCRF3_RADIO_READ_ACCESS 0x80
337 #define CCRF3_RADIO_WRITE_ACCESS 0x00
338 
339 
348 #define CCRF3_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
349 #define CCRF3_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
350  // ccrf3_set
352 
367 #define CCRF3_MAP_MIKROBUS( cfg, mikrobus ) \
368  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
369  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
370  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
371  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
372  cfg.gp0 = MIKROBUS( mikrobus, MIKROBUS_AN ); \
373  cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
374  cfg.gp2 = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
375  cfg.gp3 = MIKROBUS( mikrobus, MIKROBUS_INT )
376  // ccrf3_map // ccrf3
379 
384 typedef struct
385 {
386  // Output pins
387  digital_out_t cs;
388  digital_out_t rst;
390  // Input pins
391  digital_in_t gp0;
392  digital_in_t gp2;
393  digital_in_t gp3;
394  digital_in_t miso;
396  // Modules
397  spi_master_t spi;
399  pin_name_t chip_select;
401  uint16_t packet_counter;
402 } ccrf3_t;
403 
408 typedef struct
409 {
410  // Communication gpio pins
411  pin_name_t miso;
412  pin_name_t mosi;
413  pin_name_t sck;
414  pin_name_t cs;
416  // Additional gpio pins
417  pin_name_t gp0;
418  pin_name_t rst;
419  pin_name_t gp2;
420  pin_name_t gp3;
422  // static variable
423  uint32_t spi_speed;
424  spi_master_mode_t spi_mode;
425  spi_master_chip_select_polarity_t cs_polarity;
427 } ccrf3_cfg_t;
428 
433 typedef enum
434 {
435  CCRF3_OK = 0,
436  CCRF3_ERROR = -1
437 
439 
456 
471 err_t ccrf3_init ( ccrf3_t *ctx, ccrf3_cfg_t *cfg );
472 
486 err_t ccrf3_default_cfg ( ccrf3_t *ctx );
487 
497 void ccrf3_hw_reset ( ccrf3_t *ctx );
498 
508 uint8_t ccrf3_cmd_strobe ( ccrf3_t *ctx, uint8_t cmd );
509 
521 void ccrf3_read_write_burst_single ( ccrf3_t *ctx, uint8_t reg_address, uint8_t *rw_data, uint16_t n_bytes );
522 
535 uint8_t ccrf3_8bit_reg_access ( ccrf3_t *ctx, char access_type, uint8_t reg_address, uint8_t *rw_data,
536  uint16_t n_bytes );
537 
551 uint8_t ccrf3_16bit_reg_access ( ccrf3_t *ctx, uint8_t access_type, uint8_t ext_address,
552  uint8_t reg_address, uint8_t *rw_data, uint8_t n_bytes );
553 
565 err_t ccrf3_read_reg ( ccrf3_t *ctx, uint16_t reg_address, uint8_t *read_data, uint8_t n_bytes );
566 
578 uint8_t ccrf3_write_reg ( ccrf3_t *ctx, uint16_t reg_address, uint8_t *write_data, uint8_t n_bytes );
579 
590 uint8_t ccrf3_write_reg_single( ccrf3_t *ctx, uint16_t reg_address, uint8_t write_data );
591 
602 uint8_t ccrf3_write_tx_fifo ( ccrf3_t *ctx, uint8_t *write_data, uint8_t n_bytes );
603 
614 uint8_t ccrf3_read_rx_fifo ( ccrf3_t *ctx, uint8_t *read_data, uint8_t n_bytes );
615 
625 
635 
645 
654 uint8_t ccrf3_read_gp0 ( ccrf3_t *ctx );
655 
664 uint8_t ccrf3_read_gp2 ( ccrf3_t *ctx );
665 
674 uint8_t ccrf3_read_gp3 ( ccrf3_t *ctx );
675 
686 void ccrf3_send_tx_data ( ccrf3_t *ctx, uint8_t *tx_data, uint8_t n_bytes );
687 
697 uint8_t ccrf3_receive_rx_data ( ccrf3_t *ctx, uint8_t *rx_data );
698 
699 #ifdef __cplusplus
700 }
701 #endif
702 #endif // CCRF3_H
703  // ccrf3
705 
706 // ------------------------------------------------------------------------ END
ccrf3_t::miso
digital_in_t miso
Definition: ccrf3.h:394
ccrf3_cfg_setup
void ccrf3_cfg_setup(ccrf3_cfg_t *cfg)
ccRF 3 configuration object setup function.
ccrf3_write_reg
uint8_t ccrf3_write_reg(ccrf3_t *ctx, uint16_t reg_address, uint8_t *write_data, uint8_t n_bytes)
Write sequential data function.
ccrf3_cfg_t::rst
pin_name_t rst
Definition: ccrf3.h:418
ccrf3_read_gp2
uint8_t ccrf3_read_gp2(ccrf3_t *ctx)
Read state of GP2 pin function.
spi_specifics.h
This file contains SPI specific macros, functions, etc.
ccrf3_send_tx_data
void ccrf3_send_tx_data(ccrf3_t *ctx, uint8_t *tx_data, uint8_t n_bytes)
Send TX data function.
ccrf3_read_rx_fifo
uint8_t ccrf3_read_rx_fifo(ccrf3_t *ctx, uint8_t *read_data, uint8_t n_bytes)
Read RX FIFO register function.
ccrf3_cfg_t
ccRF 3 Click configuration object.
Definition: ccrf3.h:409
ccrf3_cfg_t::spi_speed
uint32_t spi_speed
Definition: ccrf3.h:423
ccrf3_set_tx_mode
void ccrf3_set_tx_mode(ccrf3_t *ctx)
Set TX mode function.
ccrf3_t::cs
digital_out_t cs
Definition: ccrf3.h:387
ccrf3_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: ccrf3.h:424
ccrf3_cfg_t::sck
pin_name_t sck
Definition: ccrf3.h:413
CCRF3_OK
@ CCRF3_OK
Definition: ccrf3.h:435
ccrf3_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: ccrf3.h:425
ccrf3_cfg_t::gp2
pin_name_t gp2
Definition: ccrf3.h:419
ccrf3_cfg_t::gp0
pin_name_t gp0
Definition: ccrf3.h:417
ccrf3_8bit_reg_access
uint8_t ccrf3_8bit_reg_access(ccrf3_t *ctx, char access_type, uint8_t reg_address, uint8_t *rw_data, uint16_t n_bytes)
Access 8-bit register function.
ccrf3_cmd_strobe
uint8_t ccrf3_cmd_strobe(ccrf3_t *ctx, uint8_t cmd)
Set command strobe function.
ccrf3_t::spi
spi_master_t spi
Definition: ccrf3.h:397
ccrf3_t::gp0
digital_in_t gp0
Definition: ccrf3.h:391
CCRF3_ERROR
@ CCRF3_ERROR
Definition: ccrf3.h:436
ccrf3_set_rx_mode
void ccrf3_set_rx_mode(ccrf3_t *ctx)
Set RX mode function.
ccrf3_read_write_burst_single
void ccrf3_read_write_burst_single(ccrf3_t *ctx, uint8_t reg_address, uint8_t *rw_data, uint16_t n_bytes)
Read or write burst single function.
ccrf3_t::packet_counter
uint16_t packet_counter
Definition: ccrf3.h:401
ccrf3_16bit_reg_access
uint8_t ccrf3_16bit_reg_access(ccrf3_t *ctx, uint8_t access_type, uint8_t ext_address, uint8_t reg_address, uint8_t *rw_data, uint8_t n_bytes)
Access 16-bit register function.
ccrf3_default_cfg
err_t ccrf3_default_cfg(ccrf3_t *ctx)
ccRF 3 default configuration function.
ccrf3_read_reg
err_t ccrf3_read_reg(ccrf3_t *ctx, uint16_t reg_address, uint8_t *read_data, uint8_t n_bytes)
Read the byte of data function.
ccrf3_t::gp3
digital_in_t gp3
Definition: ccrf3.h:393
ccrf3_read_gp0
uint8_t ccrf3_read_gp0(ccrf3_t *ctx)
Read state of GP0 pin function.
ccrf3_write_reg_single
uint8_t ccrf3_write_reg_single(ccrf3_t *ctx, uint16_t reg_address, uint8_t write_data)
Write one byte data function.
ccrf3_cfg_t::cs
pin_name_t cs
Definition: ccrf3.h:414
ccrf3_write_tx_fifo
uint8_t ccrf3_write_tx_fifo(ccrf3_t *ctx, uint8_t *write_data, uint8_t n_bytes)
Write TX FIFO register function.
ccrf3_t::rst
digital_out_t rst
Definition: ccrf3.h:388
ccrf3_t
ccRF 3 Click context object.
Definition: ccrf3.h:385
ccrf3_init
err_t ccrf3_init(ccrf3_t *ctx, ccrf3_cfg_t *cfg)
ccRF 3 initialization function.
ccrf3_read_gp3
uint8_t ccrf3_read_gp3(ccrf3_t *ctx)
Read state of GP3 pin function.
ccrf3_receive_rx_data
uint8_t ccrf3_receive_rx_data(ccrf3_t *ctx, uint8_t *rx_data)
Receive RX data function.
ccrf3_cfg_t::mosi
pin_name_t mosi
Definition: ccrf3.h:412
ccrf3_manual_calibration
void ccrf3_manual_calibration(ccrf3_t *ctx)
Manual calibration function.
ccrf3_t::gp2
digital_in_t gp2
Definition: ccrf3.h:392
ccrf3_cfg_t::miso
pin_name_t miso
Definition: ccrf3.h:411
ccrf3_cfg_t::gp3
pin_name_t gp3
Definition: ccrf3.h:420
ccrf3_hw_reset
void ccrf3_hw_reset(ccrf3_t *ctx)
Hardware reset function.
ccrf3_return_value_t
ccrf3_return_value_t
ccRF 3 Click return value data.
Definition: ccrf3.h:434
ccrf3_t::chip_select
pin_name_t chip_select
Definition: ccrf3.h:399